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From: Mahesh J Salgaonkar <mahesh@linux.ibm.com>
To: linuxppc-dev <linuxppc-dev@lists.ozlabs.org>,
	Nicholas Piggin <npiggin@gmail.com>,
	Madhavan Srinivasan <maddy@linux.ibm.com>,
	"Ritesh Harjani (IBM)" <ritesh.list@gmail.com>,
	Praveen K Pandey <praveen@linux.ibm.com>,
	Nikhil Kumar Singh <nikhilks@linux.ibm.com>
Subject: Re: [PATCH v2 2/4] powerpc: Add Power12 raw mode
Date: Tue, 4 Aug 2026 11:22:16 +0530	[thread overview]
Message-ID: <anF9MpdSSkwzdDmH@linux.ibm.com> (raw)
In-Reply-To: <20260804002831.e8e53baf-75-amachhiw@linux.ibm.com>

On 2026-08-04 00:40:10 Tue, Amit Machhiwal wrote:
> On 2026/08/03 09:27 PM, Mahesh Salgaonkar wrote:
> > From: Nicholas Piggin <npiggin@gmail.com>
> > 
> > Add CPU table entries for raw mode.
> > 
> > Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> > Signed-off-by: Ritesh Harjani (IBM) <ritesh.list@gmail.com>
> > Signed-off-by: Mahesh Salgaonkar <mahesh@linux.ibm.com>
> > Tested-by: Praveen K Pandey <praveen@linux.ibm.com>
> > Reviewed-by: Nikhil Kumar Singh <nikhilks@linux.ibm.com>
> > ---
> > Change in v2:
> > - Added Reviewed-by from Nikhil
> > ---
> >  arch/powerpc/include/asm/cpu_setup.h      |  2 ++
> >  arch/powerpc/include/asm/cputable.h       | 17 +++++++--
> >  arch/powerpc/include/asm/mmu.h            |  1 +
> >  arch/powerpc/include/asm/reg.h            |  5 ++-
> >  arch/powerpc/include/asm/synch.h          |  6 +++-
> >  arch/powerpc/include/uapi/asm/cputable.h  |  1 +
> >  arch/powerpc/kernel/cpu_setup_power.c     | 43 +++++++++++++++++++++++
> >  arch/powerpc/kernel/cpu_specs_book3s_64.h | 22 ++++++++++++
> >  arch/powerpc/kernel/dt_cpu_ftrs.c         | 37 +++++++++++++++++++
> >  arch/powerpc/kernel/setup-common.c        |  1 +
> >  arch/powerpc/kvm/book3s_hv.c              |  9 +++--
> >  arch/powerpc/mm/book3s64/hash_native.c    | 22 ++++++++----
> >  arch/powerpc/mm/init_64.c                 |  4 ++-
> >  13 files changed, 157 insertions(+), 13 deletions(-)
> > 
> > diff --git a/arch/powerpc/include/asm/cpu_setup.h b/arch/powerpc/include/asm/cpu_setup.h
> > index 30e2fe3895024..26d2c0e2c99c6 100644
> > --- a/arch/powerpc/include/asm/cpu_setup.h
> > +++ b/arch/powerpc/include/asm/cpu_setup.h
> > @@ -9,10 +9,12 @@ void __setup_cpu_power7(unsigned long offset, struct cpu_spec *spec);
> >  void __setup_cpu_power8(unsigned long offset, struct cpu_spec *spec);
> >  void __setup_cpu_power9(unsigned long offset, struct cpu_spec *spec);
> >  void __setup_cpu_power10(unsigned long offset, struct cpu_spec *spec);
> > +void __setup_cpu_power12(unsigned long offset, struct cpu_spec *spec);
> >  void __restore_cpu_power7(void);
> >  void __restore_cpu_power8(void);
> >  void __restore_cpu_power9(void);
> >  void __restore_cpu_power10(void);
> > +void __restore_cpu_power12(void);
> >  
> >  void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec *spec);
> >  void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec *spec);
> > diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
> > index ec16c12296da8..a3be81c47df3a 100644
> > --- a/arch/powerpc/include/asm/cputable.h
> > +++ b/arch/powerpc/include/asm/cputable.h
> > @@ -194,6 +194,7 @@ static inline void cpu_feature_keys_init(void) { }
> >  #define CPU_FTR_DAWR1			LONG_ASM_CONST(0x0008000000000000)
> >  #define CPU_FTR_DEXCR_NPHIE		LONG_ASM_CONST(0x0010000000000000)
> >  #define CPU_FTR_P11_PVR			LONG_ASM_CONST(0x0020000000000000)
> > +#define CPU_FTR_ARCH_32			LONG_ASM_CONST(0x0040000000000000)
> >  
> >  #ifndef __ASSEMBLER__
> >  
> > @@ -457,6 +458,18 @@ static inline void cpu_feature_keys_init(void) { }
> >  
> >  #define CPU_FTRS_POWER11	(CPU_FTRS_POWER10 | CPU_FTR_P11_PVR)
> >  
> > +#define CPU_FTRS_POWER12 (CPU_FTR_LWSYNC | \
> > +	    CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | CPU_FTR_ARCH_206 |\
> > +	    CPU_FTR_MMCRA | CPU_FTR_SMT | \
> > +	    CPU_FTR_COHERENT_ICACHE | \
> > +	    CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \
> > +	    CPU_FTR_DSCR | \
> > +	    CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \
> > +	    CPU_FTR_CFAR | CPU_FTR_HVMODE | CPU_FTR_VMX_COPY | \
> > +	    CPU_FTR_DBELL | CPU_FTR_HAS_PPR | CPU_FTR_ARCH_207S | \
> > +	    CPU_FTR_ARCH_300 | CPU_FTR_ARCH_31 | CPU_FTR_ARCH_32 | \
> > +	    CPU_FTR_DAWR | CPU_FTR_DAWR1)
> > +
> >  #define CPU_FTRS_CELL	(CPU_FTR_LWSYNC | \
> >  	    CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
> >  	    CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
> > @@ -476,7 +489,7 @@ static inline void cpu_feature_keys_init(void) { }
> >  	    (CPU_FTRS_POWER7 | CPU_FTRS_POWER8E | CPU_FTRS_POWER8 | \
> >  	     CPU_FTR_ALTIVEC_COMP | CPU_FTR_VSX_COMP | CPU_FTRS_POWER9 | \
> >  	     CPU_FTRS_POWER9_DD2_1 | CPU_FTRS_POWER9_DD2_2 | \
> > -	     CPU_FTRS_POWER9_DD2_3 | CPU_FTRS_POWER10 | CPU_FTRS_POWER11)
> > +	     CPU_FTRS_POWER9_DD2_3 | CPU_FTRS_POWER10 | CPU_FTRS_POWER11 | CPU_FTRS_POWER12)
> 
> Line exceeds 80 columns. Please wrap CPU_FTRS_POWER12 onto its own line.
> Same applies to the #else variant below.

Linux has long lifted the 80 column restriction and increased the
default limit to 100 chars.

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=bdc48fa11e46f867ea4d75fa59ee87a7f48be144

Thanks,
-Mahesh.



  reply	other threads:[~2026-08-04  5:52 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-03 15:57 [PATCH v2 0/4] Base support for Power12 Mahesh Salgaonkar
2026-08-03 15:57 ` [PATCH v2 1/4] powerpc/pseries: Limit PVR list to 16 entries for CAS negotiation Mahesh Salgaonkar
2026-08-03 18:32   ` Amit Machhiwal
2026-08-04  6:42     ` Mahesh J Salgaonkar
2026-08-03 15:57 ` [PATCH v2 2/4] powerpc: Add Power12 raw mode Mahesh Salgaonkar
2026-08-03 19:10   ` Amit Machhiwal
2026-08-04  5:52     ` Mahesh J Salgaonkar [this message]
2026-08-04  6:13       ` Amit Machhiwal
2026-08-03 15:57 ` [PATCH v2 3/4] powerpc: Add Power12 architected mode Mahesh Salgaonkar
2026-08-03 19:17   ` Amit Machhiwal
2026-08-04  6:00     ` Mahesh J Salgaonkar
2026-08-04  6:20       ` Amit Machhiwal
2026-08-05  9:32         ` Mahesh J Salgaonkar
2026-08-03 15:57 ` [PATCH v2 4/4] powerpc/perf: Add power12 Base Performance Monitoring support Mahesh Salgaonkar
2026-08-03 19:32   ` Amit Machhiwal
2026-08-04  6:34     ` Mahesh J Salgaonkar

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