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From: Mahesh J Salgaonkar <mahesh@linux.ibm.com>
To: linuxppc-dev <linuxppc-dev@lists.ozlabs.org>,
	Madhavan Srinivasan <maddy@linux.ibm.com>,
	Praveen K Pandey <praveen@linux.ibm.com>
Subject: Re: [PATCH v2 1/4] powerpc/pseries: Limit PVR list to 16 entries for CAS negotiation
Date: Tue, 4 Aug 2026 12:12:49 +0530	[thread overview]
Message-ID: <anGJGMG7hnwdUk-g@linux.ibm.com> (raw)
In-Reply-To: <20260803235347.b630c20f-dc-amachhiw@linux.ibm.com>

On 2026-08-04 00:02:08 Tue, Amit Machhiwal wrote:
> On 2026/08/03 09:27 PM, Mahesh Salgaonkar wrote:
> > Current Power system firmware caps the PVR list array size at 16 entries
> > during CAS (Client Architecture Support) negotiation. Passing more than
> > capped size to older firmware could cause an undefined behaviour and
> > breaks compatibility.
> > 
> > Future Power system firmware releases will lift this restriction and
> > support greater than 16 array entries.
> > 
> > Ensure that when running on Power11 or below hardware, the number
> > of PVR entries passed during CAS negotiation does not exceed the
> > firmware-imposed limit of 16.
> > 
> > In prom_send_capabilities(), compute start_index to skip the oldest
> > leading pvrs[] entries when running on Power11 or below hardware, so
> > that the pointer passed to ibm,client-architecture-support points to
> > ibm_architecture_vec.pvrs[start_index], presenting exactly 16 entries to
> > firmware.
> > 
> > Signed-off-by: Mahesh Salgaonkar <mahesh@linux.ibm.com>
> > Tested-by: Praveen K Pandey <praveen@linux.ibm.com>
> > ---
> > Change in v2:
> > - Define a named macro CAS_MAX_PVR_ENTRIES
> > ---
[...]
> > @@ -1032,13 +1042,9 @@ static const struct ibm_arch_vec ibm_architecture_vec_template __initconst = {
> >  			.val  = cpu_to_be32(0x0f000003),
> >  		},
> >  		{
> > -			.mask = cpu_to_be32(0xffffffff), /* all 2.05-compliant */
> > +			.mask = cpu_to_be32(0xfffffffd), /* all 2.05-compliant */
> >  			.val  = cpu_to_be32(0x0f000002),
> >  		},
> > -		{
> > -			.mask = cpu_to_be32(0xfffffffe), /* all 2.04-compliant and earlier */
> > -			.val  = cpu_to_be32(0x0f000001),
> > -		},
> >  	},
> >  
> >  	.num_vectors = NUM_VECTORS(6),
> > @@ -1347,7 +1353,6 @@ static void __init prom_check_platform_support(void)
> >  	};
> >  	int prop_len = prom_getproplen(prom.chosen,
> >  				       "ibm,arch-vec-5-platform-support");
> > -
>  
> Nit: Looks unintentional whitespace change, please drop.

Hi Maddy,

Let me know if you want ime to send out v3 to handle this unintentional
whitespace change Or do you think you handle this while merging ?

Thanks,
-Mahesh.

> 
> >  	/*
> >  	 * First copy the architecture vec template
> >  	 *
> > @@ -1403,6 +1408,22 @@ static void __init prom_send_capabilities(void)
> >  	ihandle root;
> >  	prom_arg_t ret;
> >  	u32 cores;
> > +	int start_index = 0;
> > +
> > +	/*
> > +	 * Ensure that when running on Power11 or below hardware, the number
> > +	 * of PVR entries passed during CAS negotiation does not exceed the
> > +	 * firmware-imposed limit of 16.
> > +	 *
> > +	 * Compute the start_index to skip the oldest leading pvrs[] entries
> > +	 * when running on Power11 or below hardware, so that the pointer
> > +	 * passed to ibm,client-architecture-support points to
> > +	 * ibm_architecture_vec.pvrs[start_index], presenting exactly 16
> > +	 * entries to firmware.
> > +	 */
> > +	if ((ARRAY_SIZE(ibm_architecture_vec_template.pvrs) > CAS_MAX_PVR_ENTRIES) &&
> > +	    (PVR_VER(mfspr(SPRN_PVR)) <= PVR_POWER11))
> > +		start_index = ARRAY_SIZE(ibm_architecture_vec_template.pvrs) - CAS_MAX_PVR_ENTRIES;
> >  
> >  	/* Check ibm,arch-vec-5-platform-support and fixup vec5 if required */
> >  	prom_check_platform_support();
> > @@ -1427,7 +1448,7 @@ static void __init prom_send_capabilities(void)
> >  		if (call_prom_ret("call-method", 3, 2, &ret,
> >  				  ADDR("ibm,client-architecture-support"),
> >  				  root,
> > -				  ADDR(&ibm_architecture_vec)) == 0) {
> > +				  ADDR(&ibm_architecture_vec.pvrs[start_index])) == 0) {
> >  			/* the call exists... */
> >  			if (ret)
> >  				prom_printf("\nWARNING: ibm,client-architecture"
> > -- 
> > 2.55.0
> > 
> > 
> 

-- 
Mahesh J Salgaonkar


  reply	other threads:[~2026-08-04  6:43 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-03 15:57 [PATCH v2 0/4] Base support for Power12 Mahesh Salgaonkar
2026-08-03 15:57 ` [PATCH v2 1/4] powerpc/pseries: Limit PVR list to 16 entries for CAS negotiation Mahesh Salgaonkar
2026-08-03 18:32   ` Amit Machhiwal
2026-08-04  6:42     ` Mahesh J Salgaonkar [this message]
2026-08-03 15:57 ` [PATCH v2 2/4] powerpc: Add Power12 raw mode Mahesh Salgaonkar
2026-08-03 19:10   ` Amit Machhiwal
2026-08-04  5:52     ` Mahesh J Salgaonkar
2026-08-04  6:13       ` Amit Machhiwal
2026-08-03 15:57 ` [PATCH v2 3/4] powerpc: Add Power12 architected mode Mahesh Salgaonkar
2026-08-03 19:17   ` Amit Machhiwal
2026-08-04  6:00     ` Mahesh J Salgaonkar
2026-08-04  6:20       ` Amit Machhiwal
2026-08-05  9:32         ` Mahesh J Salgaonkar
2026-08-03 15:57 ` [PATCH v2 4/4] powerpc/perf: Add power12 Base Performance Monitoring support Mahesh Salgaonkar
2026-08-03 19:32   ` Amit Machhiwal
2026-08-04  6:34     ` Mahesh J Salgaonkar

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