* Re: [PATCH] powerpc: fix alignment problem in rh_alloc_align() with exact-sized blocks
From: Kumar Gala @ 2007-05-15 18:21 UTC (permalink / raw)
To: Timur Tabi; +Cc: linuxppc-dev
In-Reply-To: <1179160286213-git-send-email-timur@freescale.com>
On Mon, 14 May 2007, Timur Tabi wrote:
> When an rheap is created, the caller can specify the alignment to use. In
> rh_alloc_align(), if a free block is found that is the exact size needed
> (including extra space for alignment), that configured alignment value is not
> used to align the pointer. Instead, the default alignment is used. If the
> default alignment is smaller than the configured alignment, then the returned
> value will not be aligned correctly.
>
> Signed-off-by: Timur Tabi <timur@freescale.com>
> ---
> arch/powerpc/lib/rheap.c | 22 ++++++++--------------
> 1 files changed, 8 insertions(+), 14 deletions(-)
>
applied.
- k
^ permalink raw reply
* Re: zImage.elf loads but does not start
From: Miroslaw Dach @ 2007-05-15 18:49 UTC (permalink / raw)
To: Andrei Konovalov; +Cc: linuxppc-embedded
In-Reply-To: <4649F6FF.7060003@ru.mvista.com>
> Hmm...
> IIRC TEMAC is configured in FIFO mode.
> And I thought the problem could be due to small FIFOs. So that the default
> NFS reply of 4kbytes could not fit into the receive FIFO, and the CPU is not
> fast enough to read the reply out of the FIFO before it overflows.
> But your observations don't seem to confirm this is the case.
>
> Anyway, you could try adding
> nfsroot=,rsize=1024,wsize=1024
> to your cmdline just in case...
Thanks for the suggestions. I will try it tomorrow. I have the feeling
however that it might be the kernel configuration which might be not
correct.
My board has 32 Mbytes of RAM. I have configured kernel as follows:
* Initial RAM filesystem and RAM disk (initramfs/initrd) suppor
*RAM disk support
1 Default number of RAM disks
8192 Default RAM disk size (kbytes)
(1024) Default RAM disk block size (bytes)
I do not know however if the stack is properly configured since I did not
see any parameter in kernel which refers to the stack or heap.
My bsp i.e xparameteres_ml403.h contains two macros:
#define XPAR_DDR_SDRAM_1_MEM0_BASEADDR 0x00000000
#define XPAR_DDR_SDRAM_1_MEM0_HIGHADDR 0x01FFFFFF
I have the feeling that they are ignored because I did not find anywhere
in the kernel source those names.
When kernel boots it prints at the beginning:
loaded at: 00400000 004F9138
board data at: 004F7120 004F7138
relocated to: 00404064 0040407C
zimage at: 00404DF1 004F6BBB
avail ram: 004FA000 04000000
According to my understanding kernel first copies "init" to RAM and
executes it there. Maybe init and/or related libraries are copied to the
memory location beyond RAM ? This is what comes to my mind right now.
Best Regards
Mirek
^ permalink raw reply
* Re: [PATCH] powerpc: EDAC platform devices setup for Marvell/mv64x60
From: Dale Farnsworth @ 2007-05-15 18:59 UTC (permalink / raw)
To: Dave Jiang; +Cc: linuxppc-dev, paulus
In-Reply-To: <20070515165144.GA3179@blade.az.mvista.com>
On Tue, May 15, 2007 at 04:51:44PM +0000, Dave Jiang wrote:
> Creating platform devices (memory controller, sram error registers, cpu error
> registers, pci error registers) for EDAC driver on the Marvell/mv64x60 chip.
>
> Signed-off-by: Dave Jiang <djiang@mvista.com>
Acked-by: Dale Farnsworth <dale@farnsworth.org>
^ permalink raw reply
* [PATCH] iseries: fix CONFIG_VIOCONS/CONFIG_VT dependency
From: Olof Johansson @ 2007-05-15 19:03 UTC (permalink / raw)
To: paulus; +Cc: linuxppc-dev, sfr
VT already depends on !VIOCONS, but there's no restriction in the other
direction. This makes an allyesconfig not build.
Switch to a Kconfig dependency instead of a compile-time error.
Signed-off-by: Olof Johansson <olof@lixom.net>
diff --git a/arch/powerpc/platforms/iseries/Kconfig b/arch/powerpc/platforms/iseries/Kconfig
index 46c3a8e..e48f018 100644
--- a/arch/powerpc/platforms/iseries/Kconfig
+++ b/arch/powerpc/platforms/iseries/Kconfig
@@ -8,6 +8,7 @@ menu "iSeries device drivers"
config VIOCONS
tristate "iSeries Virtual Console Support (Obsolete)"
+ depends on !VT
help
This is the old virtual console driver for legacy iSeries.
You should use the iSeries Hypervisor Virtual Console
diff --git a/drivers/char/viocons.c b/drivers/char/viocons.c
index 8de6b95..c2e7a93 100644
--- a/drivers/char/viocons.c
+++ b/drivers/char/viocons.c
@@ -49,10 +49,6 @@
#include <asm/iseries/hv_lp_config.h>
#include <asm/iseries/hv_call.h>
-#ifdef CONFIG_VT
-#error You must turn off CONFIG_VT to use CONFIG_VIOCONS
-#endif
-
#define VIOTTY_MAGIC (0x0DCB)
#define VTTY_PORTS 10
^ permalink raw reply related
* Re: [PATCH] powerpc: Add Marvell mv64x60 udbg putc/getc functions
From: Mark A. Greer @ 2007-05-15 18:55 UTC (permalink / raw)
To: Dale Farnsworth; +Cc: linuxppc-dev, Paul Mackerras
In-Reply-To: <20070514195222.GA27602@xyzzy.farnsworth.org>
On Mon, May 14, 2007 at 12:52:22PM -0700, Dale Farnsworth wrote:
> [PATCH] powerpc: Add Marvell mv64x60 udbg putc/getc functions
>
> Commit 69331af, "Fixes and cleanups for earlyprintk aka boot console",
> resulted in printk output prior to the initialization of the mpsc
> console driver not being printed. That commit causes the mpsc's
> CON_PRINTBUFFER flag to be cleared since udbg should have printed
> the previous output.
>
> I guess we can no longer ignore udbg. :)
>
> This patch provides udbg_putc() and udbg_getc() functions for the
> Marvell mv64x60 chips. These functions are enabled if an mv64x60
> port is to be used as the console as determined from the device tree.
>
> Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Acked-by: Mark A. Greer <mgreer@mvista.com>
^ permalink raw reply
* Re: [PATCH 1/2] kbuild: Add "Section mismatch" warning whitelist for powerpc
From: Sam Ravnborg @ 2007-05-15 19:29 UTC (permalink / raw)
To: Li Yang-r58472; +Cc: Andrew Morton, linuxppc-dev, Linus, Linux Kernel
In-Reply-To: <989B956029373F45A0B8AF0297081890B76041@zch01exm26.fsl.freescale.net>
On Tue, May 15, 2007 at 05:36:40PM +0800, Li Yang-r58472 wrote:
> > -----Original Message-----
> > From: Kumar Gala [mailto:galak@kernel.crashing.org]
> > Sent: Monday, May 14, 2007 9:57 PM
> > To: Sam Ravnborg
> > Cc: Li Yang-r58472; Linus; Andrew Morton; Linux Kernel;
> linuxppc-dev@ozlabs.org
> > Subject: Re: [PATCH 1/2] kbuild: Add "Section mismatch" warning
> whitelist for
> > powerpc
> >
> >
> > On May 14, 2007, at 6:06 AM, Sam Ravnborg wrote:
> >
> > > On Mon, May 14, 2007 at 06:53:32PM +0800, Li Yang wrote:
> > >> This patch fixes the following "Section mismatch" warnings when
> > >> build powerpc platforms.
> > >>
> > >> -------------
> > >> WARNING: arch/powerpc/mm/built-in.o - Section mismatch: reference
> to
> > >> .init.text:early_get_page from .text between
> > >> 'pte_alloc_one_kernel' (at
> > >> offset 0xc68) and 'pte_alloc_one'
> > >> WARNING: mm/built-in.o - Section mismatch: reference to
> > >> .init.text:set_up_list3s from .text between
> > >> 'kmem_cache_create' (at offset
> > >> 0x20300) and 'cache_reap'
> > >> -------------
> >
> > This warnings should be handled by __init_refok instead.
>
> Yes. When __init_refok gets in, we can change all Pattern 9 members in
> the whitelist to use __init_refok.
I have applied the patch without the fixes for the above functions.
Will merge and push the __init_refok changes soonish.
Sam
^ permalink raw reply
* [viro@ftp.linux.org.uk: [PATCH] rpadlpar breakage - fallout of struct subsystem removal]
From: Al Viro @ 2007-05-15 19:47 UTC (permalink / raw)
To: linuxppc-dev
[oops - typo in Cc in original posting]
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
---
drivers/pci/hotplug/rpadlpar_sysfs.c | 5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/hotplug/rpadlpar_sysfs.c b/drivers/pci/hotplug/rpadlpar_sysfs.c
index 6c5be3f..df07606 100644
--- a/drivers/pci/hotplug/rpadlpar_sysfs.c
+++ b/drivers/pci/hotplug/rpadlpar_sysfs.c
@@ -129,8 +129,9 @@ struct kobj_type ktype_dlpar_io = {
};
struct kset dlpar_io_kset = {
- .subsys = &pci_hotplug_slots_subsys,
- .kobj = {.name = DLPAR_KOBJ_NAME, .ktype=&ktype_dlpar_io,},
+ .kobj = {.name = DLPAR_KOBJ_NAME,
+ .ktype = &ktype_dlpar_io,
+ .parent = &pci_hotplug_slots_subsys.kobj},
.ktype = &ktype_dlpar_io,
};
--
1.5.0-rc2.GIT
-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
----- End forwarded message -----
^ permalink raw reply related
* [PATCH] Reserve threadinfo flags for perfmon2
From: Anton Blanchard @ 2007-05-15 19:59 UTC (permalink / raw)
To: paulus; +Cc: linuxppc-dev, kevcorry
Reserve two TIF flags for perfmon2 and shift them into the low 16 bits
so we can use single assembly instructions to create constants based off
them.
Signed-off-by: Anton Blanchard <anton@samba.org>
---
diff --git a/include/asm-powerpc/thread_info.h b/include/asm-powerpc/thread_info.h
index 3f32ca8..9d9aeca 100644
--- a/include/asm-powerpc/thread_info.h
+++ b/include/asm-powerpc/thread_info.h
@@ -113,8 +113,8 @@ static inline struct thread_info *current_thread_info(void)
#define TIF_POLLING_NRFLAG 4 /* true if poll_idle() is polling
TIF_NEED_RESCHED */
#define TIF_32BIT 5 /* 32 bit binary */
-#define TIF_RUNLATCH 6 /* Is the runlatch enabled? */
-#define TIF_ABI_PENDING 7 /* 32/64 bit switch needed */
+#define TIF_PERFMON_WORK 6 /* work for pfm_handle_work() */
+#define TIF_PERFMON_CTXSW 7 /* perfmon needs ctxsw calls */
#define TIF_SYSCALL_AUDIT 8 /* syscall auditing active */
#define TIF_SINGLESTEP 9 /* singlestepping active */
#define TIF_MEMDIE 10
@@ -123,6 +123,8 @@ static inline struct thread_info *current_thread_info(void)
#define TIF_NOERROR 14 /* Force successful syscall return */
#define TIF_RESTORE_SIGMASK 15 /* Restore signal mask in do_signal */
#define TIF_FREEZE 16 /* Freezing for suspend */
+#define TIF_RUNLATCH 17 /* Is the runlatch enabled? */
+#define TIF_ABI_PENDING 18 /* 32/64 bit switch needed */
/* as above, but as bit values */
#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
@@ -131,8 +133,8 @@ static inline struct thread_info *current_thread_info(void)
#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
#define _TIF_32BIT (1<<TIF_32BIT)
-#define _TIF_RUNLATCH (1<<TIF_RUNLATCH)
-#define _TIF_ABI_PENDING (1<<TIF_ABI_PENDING)
+#define _TIF_PERFMON_WORK (1<<TIF_PERFMON_WORK)
+#define _TIF_PERFMON_CTXSW (1<<TIF_PERFMON_CTXSW)
#define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT)
#define _TIF_SINGLESTEP (1<<TIF_SINGLESTEP)
#define _TIF_SECCOMP (1<<TIF_SECCOMP)
@@ -140,6 +142,8 @@ static inline struct thread_info *current_thread_info(void)
#define _TIF_NOERROR (1<<TIF_NOERROR)
#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK)
#define _TIF_FREEZE (1<<TIF_FREEZE)
+#define _TIF_RUNLATCH (1<<TIF_RUNLATCH)
+#define _TIF_ABI_PENDING (1<<TIF_ABI_PENDING)
#define _TIF_SYSCALL_T_OR_A (_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SECCOMP)
#define _TIF_USER_WORK_MASK (_TIF_NOTIFY_RESUME | _TIF_SIGPENDING | \
^ permalink raw reply related
* Re: [RFC/PATCH] powerpc: Rewrite IO allocation & mapping on powerpc64
From: Benjamin Herrenschmidt @ 2007-05-15 20:42 UTC (permalink / raw)
To: Christoph Hellwig; +Cc: linuxppc-dev, Paul Mackerras, Anton Blanchard
In-Reply-To: <20070515105635.GA1258@lst.de>
On Tue, 2007-05-15 at 12:56 +0200, Christoph Hellwig wrote:
> Some comments:
>
> - the comment above __iounmap_at needs some updates
> - instead of the fake vm_struct in __iounmap_at just changed the
> calling conventions for unmap_vm_area to take a start and len
> value - there's only two callers including the powerpc ioremap
> code for this. At the same time it might also get a better name.
Yeah, good idea, I'll have a look.
Ben.
^ permalink raw reply
* Re: [PATCH 2/2] powerpc: Fix IO space on PCI busses created from of_platform
From: Benjamin Herrenschmidt @ 2007-05-15 20:46 UTC (permalink / raw)
To: Arnd Bergmann; +Cc: linuxppc-dev, Paul Mackerras
In-Reply-To: <200705151524.39805.arnd.bergmann@de.ibm.com>
On Tue, 2007-05-15 at 15:24 +0200, Arnd Bergmann wrote:
>
> I think this still needs some logic to make sure we have at least one
> primary PHB in the system. On a board that has all phbs probed by
> of_platform code, we never set the pci_io_base variable.
Point, I need to fix that too.
> The easiest solution might be to statically initialize pci_io_base
> to PHBS_IO_BASE. If it is different from that, we are already broken
> because we would get _negative_ I/O port numbers for PHBs below
> pci_io_base.
If we do that we need to clear it in iSeries code though.
Ben.
^ permalink raw reply
* Re: arch/powerpc/sysdev: dumping ground or only for shared drivers?
From: Kumar Gala @ 2007-05-15 21:06 UTC (permalink / raw)
To: Linas Vepstas; +Cc: Olof Johansson, linuxppc-dev, Paul Mackerras
In-Reply-To: <20070511170512.GH4452@austin.ibm.com>
On May 11, 2007, at 12:05 PM, Linas Vepstas wrote:
> On Fri, May 11, 2007 at 10:26:27AM +1000, Paul Mackerras wrote:
>> Olof Johansson writes:
>>
>>> This adds yet another set of chipset drivers under sysdev, that are
>>> only used by one platform (several board ports under that platform,
>>> but only one platforms/* directory).
>>>
>>> In my opinion, they really should go under the platform directory
>>> instead,
>>> and not clutter the shared directory.
>>
>> I disagree, actually. Having these things in a shared directory
>> makes
>> it more likely that people will look at the code. That means that
>> it's more likely that bugs will be found, and more likely that parts
>> of the code can get reused when people are doing the port to a new
>> chip or board.
>>
>> If there were hundreds of files in arch/powerpc/sysdev then I
>> would be
>> more likely to agree with you, but there aren't.
>
> I like Paul's take, it matches my gut instincts.
If this is how we are going we should move some code from arch/
powerpc/platforms into sysdev (for example the 5200 platform has its
pic code and some other bits that would be candidate to move into
sysdev).
- k
^ permalink raw reply
* Re: [PATCH 2/9] powerpc: Changes the config mechanism for rheap
From: Kumar Gala @ 2007-05-15 21:20 UTC (permalink / raw)
To: Sylvain Munaut; +Cc: Linux PPC dev ML
In-Reply-To: <11790019223880-git-send-email-tnt@246tNt.com>
On May 12, 2007, at 3:31 PM, Sylvain Munaut wrote:
> Instead of having in the makefile all the option that
> requires rheap, we define a configuration symbol
> and when needed we make sure it's selected.
>
> Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
> ---
> arch/powerpc/Kconfig | 2 ++
> arch/powerpc/lib/Kconfig | 3 +++
> arch/powerpc/lib/Makefile | 4 +---
> arch/powerpc/platforms/Kconfig | 2 ++
> 4 files changed, 8 insertions(+), 3 deletions(-)
> create mode 100644 arch/powerpc/lib/Kconfig
You need to fixup arch/ppc as well since its now using rheap from
arch/powerpc/lib.
- k
> diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
> index 56d3c0d..094e5d2 100644
> --- a/arch/powerpc/Kconfig
> +++ b/arch/powerpc/Kconfig
> @@ -193,6 +193,7 @@ config PPC_8xx
> bool "Freescale 8xx"
> select FSL_SOC
> select 8xx
> + select PPC_LIB_RHEAP
>
> config 40x
> bool "AMCC 40x"
> @@ -885,6 +886,7 @@ source "fs/Kconfig"
>
> source "arch/powerpc/sysdev/qe_lib/Kconfig"
>
> +source "arch/powerpc/lib/Kconfig"
> source "lib/Kconfig"
>
> menu "Instrumentation Support"
> diff --git a/arch/powerpc/lib/Kconfig b/arch/powerpc/lib/Kconfig
> new file mode 100644
> index 0000000..f383ad4
> --- /dev/null
> +++ b/arch/powerpc/lib/Kconfig
> @@ -0,0 +1,3 @@
> +config PPC_LIB_RHEAP
> + bool
> + default n
> diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
> index 0a486d4..a6cf399 100644
> --- a/arch/powerpc/lib/Makefile
> +++ b/arch/powerpc/lib/Makefile
> @@ -13,7 +13,6 @@ endif
>
> obj-$(CONFIG_PPC64) += checksum_64.o copypage_64.o copyuser_64.o \
> memcpy_64.o usercopy_64.o mem_64.o string.o
> -obj-$(CONFIG_QUICC_ENGINE) += rheap.o
> obj-$(CONFIG_XMON) += sstep.o
> obj-$(CONFIG_KPROBES) += sstep.o
> obj-$(CONFIG_NOT_COHERENT_CACHE) += dma-noncoherent.o
> @@ -23,5 +22,4 @@ obj-$(CONFIG_SMP) += locks.o
> endif
>
> # Temporary hack until we have migrated to asm-powerpc
> -obj-$(CONFIG_8xx) += rheap.o
> -obj-$(CONFIG_CPM2) += rheap.o
> +obj-$(CONFIG_PPC_LIB_RHEAP) += rheap.o
> diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/
> platforms/Kconfig
> index 361acfa..8432f56 100644
> --- a/arch/powerpc/platforms/Kconfig
> +++ b/arch/powerpc/platforms/Kconfig
> @@ -242,6 +242,7 @@ config TAU_AVERAGE
>
> config QUICC_ENGINE
> bool
> + select PPC_LIB_RHEAP
> help
> The QUICC Engine (QE) is a new generation of communications
> coprocessors on Freescale embedded CPUs (akin to CPM in older
> chips).
> @@ -251,6 +252,7 @@ config QUICC_ENGINE
> config CPM2
> bool
> default n
> + select PPC_LIB_RHEAP
> help
> The CPM2 (Communications Processor Module) is a coprocessor on
> embedded CPUs made by Freescale. Selecting this option means that
> --
> 1.5.1.2
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev
^ permalink raw reply
* Re: [PATCH 4/9] powerpc: BestComm core support for Freescale MPC5200
From: Kumar Gala @ 2007-05-15 21:37 UTC (permalink / raw)
To: Sylvain Munaut; +Cc: Linux PPC dev ML
In-Reply-To: <11790019234031-git-send-email-tnt@246tNt.com>
On May 12, 2007, at 3:31 PM, Sylvain Munaut wrote:
> This patch adds support for the core of the BestComm API
> for the Freescale MPC5200(b). The BestComm engine is a
> microcode-controlled / tasks-based DMA used by several
> of the onchip devices.
>
> Setting up the tasks / memory allocation and all common
> low level functions are handled by this patch.
> The specifics details of each tasks and their microcode
> are split-out in separate patches.
>
> This is not the official API, but a much cleaner one.
Can you give more detail about how the API works.
> Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
> ---
> arch/powerpc/platforms/Kconfig | 2 +
> arch/powerpc/sysdev/Makefile | 1 +
> arch/powerpc/sysdev/bestcomm/Kconfig | 18 +
> arch/powerpc/sysdev/bestcomm/Makefile | 8 +
> arch/powerpc/sysdev/bestcomm/bestcomm.c | 600 +++++++++++++++
> +++++++++++
> arch/powerpc/sysdev/bestcomm/bestcomm.h | 136 ++++++
> arch/powerpc/sysdev/bestcomm/bestcomm_priv.h | 325 ++++++++++++++
> arch/powerpc/sysdev/bestcomm/sram.c | 180 ++++++++
> arch/powerpc/sysdev/bestcomm/sram.h | 54 +++
> 9 files changed, 1324 insertions(+), 0 deletions(-)
> create mode 100644 arch/powerpc/sysdev/bestcomm/Kconfig
> create mode 100644 arch/powerpc/sysdev/bestcomm/Makefile
> create mode 100644 arch/powerpc/sysdev/bestcomm/bestcomm.c
> create mode 100644 arch/powerpc/sysdev/bestcomm/bestcomm.h
> create mode 100644 arch/powerpc/sysdev/bestcomm/bestcomm_priv.h
> create mode 100644 arch/powerpc/sysdev/bestcomm/sram.c
> create mode 100644 arch/powerpc/sysdev/bestcomm/sram.h
>
> diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/
> platforms/Kconfig
> index 8432f56..fc170a3 100644
> --- a/arch/powerpc/platforms/Kconfig
> +++ b/arch/powerpc/platforms/Kconfig
> @@ -259,4 +259,6 @@ config CPM2
> you wish to build a kernel for a machine with a CPM2 coprocessor
> on it (826x, 827x, 8560).
>
> +source "arch/powerpc/sysdev/bestcomm/Kconfig"
> +
> endmenu
> diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/
> Makefile
> index c3ce0bd..89074f8 100644
> --- a/arch/powerpc/sysdev/Makefile
> +++ b/arch/powerpc/sysdev/Makefile
> @@ -16,6 +16,7 @@ obj-$(CONFIG_FSL_SOC) += fsl_soc.o
> obj-$(CONFIG_FSL_PCIE) += fsl_pcie.o
> obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o
> obj-$(CONFIG_QUICC_ENGINE) += qe_lib/
> +obj-$(CONFIG_PPC_BESTCOMM) += bestcomm/
> mv64x60-$(CONFIG_PCI) += mv64x60_pci.o
> obj-$(CONFIG_MV64X60) += $(mv64x60-y) mv64x60_pic.o mv64x60_dev.o
>
> diff --git a/arch/powerpc/sysdev/bestcomm/Kconfig b/arch/powerpc/
> sysdev/bestcomm/Kconfig
> new file mode 100644
> index 0000000..3366e24
> --- /dev/null
> +++ b/arch/powerpc/sysdev/bestcomm/Kconfig
> @@ -0,0 +1,18 @@
> +#
> +# Kconfig options for Bestcomm
> +#
> +
> +config PPC_BESTCOMM
> + tristate "Bestcomm DMA engine support"
> + depends on PPC_MPC52xx
> + default n
> + select PPC_LIB_RHEAP
> + help
> + BestComm is the name of the communication coprocessor found
> + on the Freescale MPC5200 family of processor. It's usage is
> + optionnal for some drivers (like ATA), but required for
> + others (like FEC).
> +
> + If you want to use drivers that require DMA operations,
> + answer Y or M. Otherwise say N.
> +
> diff --git a/arch/powerpc/sysdev/bestcomm/Makefile b/arch/powerpc/
> sysdev/bestcomm/Makefile
> new file mode 100644
> index 0000000..a24aa06
> --- /dev/null
> +++ b/arch/powerpc/sysdev/bestcomm/Makefile
> @@ -0,0 +1,8 @@
> +#
> +# Makefile for BestComm & co
> +#
> +
> +bestcomm-core-objs := bestcomm.o sram.o
> +
> +obj-$(CONFIG_PPC_BESTCOMM) += bestcomm-core.o
Any reason why sram isn't on the ojb-$(CONFIG_PPC_BESTCOMM) line?
> +
> diff --git a/arch/powerpc/sysdev/bestcomm/bestcomm.c b/arch/powerpc/
> sysdev/bestcomm/bestcomm.c
> new file mode 100644
> index 0000000..0063a1e
> --- /dev/null
> +++ b/arch/powerpc/sysdev/bestcomm/bestcomm.c
> @@ -0,0 +1,600 @@
> +/*
> + * Driver for MPC52xx processor BestComm peripheral controller
> + *
> + *
> + * Copyright (C) 2006-2007 Sylvain Munaut <tnt@246tNt.com>
> + * Copyright (C) 2005 Varma Electronics Oy,
> + * ( by Andrey Volkov <avolkov@varma-
> el.com> )
> + * Copyright (C) 2003-2004 MontaVista, Software, Inc.
> + * ( by Dale Farnsworth
> <dfarnsworth@mvista.com> )
> + *
> + * This file is licensed under the terms of the GNU General Public
> License
> + * version 2. This program is licensed "as is" without any
> warranty of any
> + * kind, whether express or implied.
> + */
> +
> +#include <linux/module.h>
> +#include <linux/kernel.h>
> +#include <linux/slab.h>
> +
> +#include <asm/io.h>
> +#include <asm/irq.h>
> +#include <asm/prom.h>
> +#include <asm/mpc52xx.h>
> +
> +#include "sram.h"
> +#include "bestcomm_priv.h"
> +#include "bestcomm.h"
> +
> +#define DRIVER_NAME "bestcomm-core"
> +
> +
> +struct bcom_engine *bcom = NULL;
> +
> +
> +/*
> ======================================================================
> == */
> +/* Public and private
> API */
> +/*
> ======================================================================
> == */
> +
> +/* Debug Dump */
> +
> +#define BCOM_DPRINTK(a,b...) printk(KERN_DEBUG DRIVER_NAME ": " a,
> ## b)
We have dev_dbg and dev_printk can we not use them?
> +
> +void
> +bcom_dump_status(void)
> +{
> + int i;
> + struct mpc52xx_sdma __iomem *r = bcom->regs;
> +
> + BCOM_DPRINTK("BestComm status dump (pa=%08lx, va=%p)\n",
> + bcom->regs_base, bcom->regs);
> + BCOM_DPRINTK(" taskBar = %08x\n", in_be32(&r->taskBar));
> + BCOM_DPRINTK(" currentPointer = %08x\n", in_be32(&r-
> >currentPointer));
> + BCOM_DPRINTK(" endPointer = %08x\n", in_be32(&r->endPointer));
> + BCOM_DPRINTK(" variablePointer = %08x\n", in_be32(&r-
> >variablePointer));
> + BCOM_DPRINTK(" IntVect1 = %08x\n", (u32)in_8(&r->IntVect1));
> + BCOM_DPRINTK(" IntVect2 = %08x\n", (u32)in_8(&r->IntVect2));
> + BCOM_DPRINTK(" PtdCntrl = %08hx\n", in_be16(&r->PtdCntrl));
> + BCOM_DPRINTK(" IntPend = %08x\n", in_be32(&r->IntPend));
> + BCOM_DPRINTK(" IntMask = %08x\n", in_be32(&r->IntMask));
> +
> + BCOM_DPRINTK(" TCR dump :\n");
> +
> + for (i=0; i<16; i++) {
> + printk("%s%04hx%s",
> + (i&0x7) == 0x0 ? KERN_DEBUG "\t" : "",
> + in_be16(&r->tcr[i]),
> + (i&0x7) == 0x7 ? "\n" : " ");
> + }
> +
> + BCOM_DPRINTK(" IPR dump :\n");
> +
> + for (i=0; i<32; i++) {
> + printk("%s%02x%s",
> + (i&0x7) == 0x0 ? KERN_DEBUG "\t" : "",
> + (u32)in_8(&r->ipr[i]),
> + (i&0x7) == 0x7 ? "\n" : " ");
> + }
> +
> + BCOM_DPRINTK(" cReqSelect = %08x\n", in_be32(&r->cReqSelect));
> + BCOM_DPRINTK(" task_size0 = %08x\n", in_be32(&r->task_size0));
> + BCOM_DPRINTK(" task_size1 = %08x\n", in_be32(&r->task_size1));
> + BCOM_DPRINTK(" MDEDebug = %08x\n", in_be32(&r->MDEDebug));
> + BCOM_DPRINTK(" ADSDebug = %08x\n", in_be32(&r->ADSDebug));
> + BCOM_DPRINTK(" Value1 = %08x\n", in_be32(&r->Value1));
> + BCOM_DPRINTK(" Value2 = %08x\n", in_be32(&r->Value2));
> + BCOM_DPRINTK(" Control = %08x\n", in_be32(&r->Control));
> + BCOM_DPRINTK(" Status = %08x\n", in_be32(&r->Status));
> + BCOM_DPRINTK(" PTDDebug = %08x\n", in_be32(&r->PTDDebug));
> +}
> +
> +void
> +bcom_dump_task(int task)
> +{
> + int i;
> + u32 *p;
> + struct bcom_tdt *tdt = &bcom->tdt[task];
> +
> + BCOM_DPRINTK("Task dump %d\n", task);
> + BCOM_DPRINTK(" tcr = %04hx\n", bcom->regs->tcr[task]);
> + BCOM_DPRINTK(" tdt = %p\n", &bcom->tdt[task]);
> + BCOM_DPRINTK(" tdt->start = %08x\n", tdt->start);
> + BCOM_DPRINTK(" tdt->stop = %08x\n", tdt->stop);
> + BCOM_DPRINTK(" tdt->var = %08x\n", tdt->var);
> + BCOM_DPRINTK(" tdt->fdt = %08x\n", tdt->fdt);
> + BCOM_DPRINTK(" tdt->status = %08x\n", tdt->exec_status);
> + BCOM_DPRINTK(" tdt->mvtp = %08x\n", tdt->mvtp);
> + BCOM_DPRINTK(" tdt->context = %08x\n", tdt->context);
> + BCOM_DPRINTK(" tdt->litbase = %08x\n", tdt->litbase);
> +
> + BCOM_DPRINTK(" code :\n");
> +
> + p = bcom_task_desc(task);
> + for (i=0; i<bcom_task_num_descs(task); i++)
> + printk(KERN_DEBUG "\t%p %08x\n", &p[i], p[i]);
> +
> + BCOM_DPRINTK(" var/inc :\n");
> +
> + p = bcom_task_var(task);
> + for (i=0; i<BCOM_MAX_VAR+BCOM_MAX_INC; i++)
> + printk(KERN_DEBUG "\t%p %08x\n", &p[i], p[i]);
> +}
> +
> +void
> +bcom_dump_bdring(struct bcom_task *tsk)
> +{
> + int i, j;
> +
> + BCOM_DPRINTK("BD ring dump %d\n", tsk->tasknum);
> +
> + for (i=0; i<tsk->num_bd; i++) {
> + BCOM_DPRINTK(" BD[%02d] :\n", i);
> + BCOM_DPRINTK(" cookie : %p\n", tsk->cookie[i]);
> + BCOM_DPRINTK(" status : %08x\n", tsk->bd[i].status);
> + for (j=0; j<(tsk->bd_size/sizeof(u32))-1; j++)
> + BCOM_DPRINTK(" data[%02d] : %08x\n",
> + j, tsk->bd[i].data[j]);
> + }
> +}
> +
> +
Would all bcom_dump_status(), bcom_dump_task(), bcom_dump_bdring be
better using debugfs? At minimum there should be a Kconfig option to
enable bestcomm debug that enables this code.
> +/* Private API */
> +
What's private about it?
It would probably be good for the API functions to have DocBook style
comments. See something like drivers/rapidio/rio.c for an example.
> +struct bcom_task *
> +bcom_task_alloc(int bd_count, int bd_size, int priv_size)
> +{
> + int i, tasknum = -1;
> + struct bcom_task *tsk;
> +
> + /* Get and reserve a task num */
> + spin_lock(&bcom->lock);
> +
> + for (i=0; i<BCOM_MAX_TASKS; i++)
> + if (!bcom->tdt[i].stop) { /* we use stop as a marker */
> + bcom->tdt[i].stop = 0xfffffffful; /* dummy addr */
> + tasknum = i;
> + break;
> + }
> +
> + spin_unlock(&bcom->lock);
> +
> + if (tasknum < 0)
> + return NULL;
> +
> + /* Allocate our structure */
> + tsk = kzalloc(sizeof(struct bcom_task) + priv_size, GFP_KERNEL);
> + if (!tsk)
> + goto error;
> +
> + tsk->tasknum = tasknum;
> + if (priv_size)
> + tsk->priv = (void*)tsk + sizeof(struct bcom_task);
> +
> + /* Get IRQ of that task */
> + tsk->irq = irq_of_parse_and_map(bcom->ofnode, tsk->tasknum);
> + if (tsk->irq == NO_IRQ)
> + goto error;
> +
> + /* Init the BDs, if needed */
> + if (bd_count) {
> + tsk->cookie = kmalloc(sizeof(void*) * bd_count, GFP_KERNEL);
> + if (!tsk->cookie)
> + goto error;
> +
> + tsk->bd = bcom_sram_alloc(bd_count * bd_size, 4, &tsk->bd_pa);
> + if (!tsk->bd)
> + goto error;
> + memset(tsk->bd, 0x00, bd_count * bd_size);
> +
> + tsk->num_bd = bd_count;
> + tsk->bd_size = bd_size;
> + }
> +
> + return tsk;
> +
> +error:
> + if (tsk) {
> + if (tsk->irq != NO_IRQ)
> + irq_dispose_mapping(tsk->irq);
> + bcom_sram_free(tsk->bd);
> + kfree(tsk->cookie);
> + kfree(tsk);
> + }
> +
> + bcom->tdt[tasknum].stop = 0;
> +
> + return NULL;
> +}
> +
> +void
> +bcom_task_release(struct bcom_task *tsk)
bcom_task_free() to match alloc/free semantics?
> +{
> + /* Stop the task */
> + bcom_disable_task(tsk->tasknum);
> +
> + /* Clear TDT */
> + bcom->tdt[tsk->tasknum].start = 0;
> + bcom->tdt[tsk->tasknum].stop = 0;
> +
> + /* Free everything */
> + irq_dispose_mapping(tsk->irq);
> + bcom_sram_free(tsk->bd);
> + kfree(tsk->cookie);
> + kfree(tsk);
> +}
> +
> +int
> +bcom_load_image(int task, u32 *task_image)
> +{
> + struct bcom_task_header *hdr = (struct bcom_task_header *)
> task_image;
> + struct bcom_tdt *tdt;
> + u32 *desc, *var, *inc;
> + u32 *desc_src, *var_src, *inc_src;
> +
> + /* Safety checks */
> + if (hdr->magic != BCOM_TASK_MAGIC) {
> + printk(KERN_ERR DRIVER_NAME
> + ": Trying to load invalid microcode\n");
> + return -EINVAL;
> + }
> +
> + if ((task < 0) || (task >= BCOM_MAX_TASKS)) {
> + printk(KERN_ERR DRIVER_NAME
> + ": Trying to load invalid task %d\n", task);
> + return -EINVAL;
> + }
> +
> + /* Initial load or reload */
> + tdt = &bcom->tdt[task];
> +
> + if (tdt->start) {
> + desc = bcom_task_desc(task);
> + if (hdr->desc_size != bcom_task_num_descs(task)) {
> + printk(KERN_ERR DRIVER_NAME
> + ": Trying to reload wrong task image "
> + "(%d size %d/%d)!\n",
> + task,
> + hdr->desc_size,
> + bcom_task_num_descs(task));
> + return -EINVAL;
> + }
> + } else {
> + phys_addr_t start_pa;
> +
> + desc = bcom_sram_alloc(hdr->desc_size * sizeof(u32), 4, &start_pa);
> + if (!desc)
> + return -ENOMEM;
> +
> + tdt->start = start_pa;
> + tdt->stop = start_pa + ((hdr->desc_size-1) * sizeof(u32));
> + }
> +
> + var = bcom_task_var(task);
> + inc = bcom_task_inc(task);
> +
> + /* Clear & copy */
> + memset(var, 0x00, BCOM_VAR_SIZE);
> + memset(inc, 0x00, BCOM_INC_SIZE);
> +
> + desc_src = (u32 *)(hdr + 1);
> + var_src = desc_src + hdr->desc_size;
> + inc_src = var_src + hdr->var_size;
> +
> + memcpy(desc, desc_src, hdr->desc_size * sizeof(u32));
> + memcpy(var + hdr->first_var, var_src, hdr->var_size * sizeof(u32));
> + memcpy(inc, inc_src, hdr->inc_size * sizeof(u32));
> +
> + return 0;
> +}
> +
> +void
> +bcom_set_initiator(int task, int initiator)
> +{
> + int i;
> + int num_descs;
> + u32 *desc;
> + int next_drd_has_initiator;
> +
> + bcom_set_tcr_initiator(task, initiator);
> +
> + /* Just setting tcr is apparently not enough due to some problem */
> + /* with it. So we just go thru all the microcode and replace in */
> + /* the DRD directly */
> +
> + desc = bcom_task_desc(task);
> + next_drd_has_initiator = 1;
> + num_descs = bcom_task_num_descs(task);
> +
> + for (i=0; i<num_descs; i++, desc++) {
> + if (!bcom_desc_is_drd(*desc))
> + continue;
> + if (next_drd_has_initiator)
> + if (bcom_desc_initiator(*desc) != BCOM_INITIATOR_ALWAYS)
> + bcom_set_desc_initiator(desc, initiator);
> + next_drd_has_initiator = !bcom_drd_is_extended(*desc);
> + }
> +}
> +
> +
> +/* Public API */
> +
What's public about these?
> +void
> +bcom_enable(struct bcom_task *tsk)
> +{
> + bcom_enable_task(tsk->tasknum);
> +}
> +
> +void
> +bcom_disable(struct bcom_task *tsk)
> +{
> + bcom_disable_task(tsk->tasknum);
> +}
> +
> +
> +/*
> ======================================================================
> == */
> +/* Engine init/
> cleanup */
> +/*
> ======================================================================
> == */
> +
> +/* Function Descriptor table */
> +/* this will need to be updated if Freescale changes their task
> code FDT */
> +static u32 fdt_ops[] = {
> + 0xa0045670, /* FDT[48] - load_acc() */
> + 0x80045670, /* FDT[49] - unload_acc() */
> + 0x21800000, /* FDT[50] - and() */
> + 0x21e00000, /* FDT[51] - or() */
> + 0x21500000, /* FDT[52] - xor() */
> + 0x21400000, /* FDT[53] - andn() */
> + 0x21500000, /* FDT[54] - not() */
> + 0x20400000, /* FDT[55] - add() */
> + 0x20500000, /* FDT[56] - sub() */
> + 0x20800000, /* FDT[57] - lsh() */
> + 0x20a00000, /* FDT[58] - rsh() */
> + 0xc0170000, /* FDT[59] - crc8() */
> + 0xc0145670, /* FDT[60] - crc16() */
> + 0xc0345670, /* FDT[61] - crc32() */
> + 0xa0076540, /* FDT[62] - endian32() */
> + 0xa0000760, /* FDT[63] - endian16() */
> +};
> +
> +
> +static int __devinit
> +bcom_engine_init(void)
> +{
> + int task;
> + phys_addr_t tdt_pa, ctx_pa, var_pa, fdt_pa;
> + unsigned int tdt_size, ctx_size, var_size, fdt_size;
> +
> + /* Allocate & clear SRAM zones for FDT, TDTs, contexts and vars/
> incs */
> + tdt_size = BCOM_MAX_TASKS * sizeof(struct bcom_tdt);
> + ctx_size = BCOM_MAX_TASKS * BCOM_CTX_SIZE;
> + var_size = BCOM_MAX_TASKS * (BCOM_VAR_SIZE + BCOM_INC_SIZE);
> + fdt_size = BCOM_FDT_SIZE;
> +
> + bcom->tdt = bcom_sram_alloc(tdt_size, sizeof(u32), &tdt_pa);
> + bcom->ctx = bcom_sram_alloc(ctx_size, BCOM_CTX_ALIGN, &ctx_pa);
> + bcom->var = bcom_sram_alloc(var_size, BCOM_VAR_ALIGN, &var_pa);
> + bcom->fdt = bcom_sram_alloc(fdt_size, BCOM_FDT_ALIGN, &fdt_pa);
> +
> + if (!bcom->tdt || !bcom->ctx || !bcom->var || !bcom->fdt) {
> + printk(KERN_ERR "DMA: SRAM alloc failed in engine init !\n");
> +
> + bcom_sram_free(bcom->tdt);
> + bcom_sram_free(bcom->ctx);
> + bcom_sram_free(bcom->var);
> + bcom_sram_free(bcom->fdt);
> +
> + return -ENOMEM;
> + }
> +
> + memset(bcom->tdt, 0x00, tdt_size);
> + memset(bcom->ctx, 0x00, ctx_size);
> + memset(bcom->var, 0x00, var_size);
> + memset(bcom->fdt, 0x00, fdt_size);
> +
> + /* Copy the FDT for the EU#3 */
> + memcpy(&bcom->fdt[48], fdt_ops, sizeof(fdt_ops));
> +
> + /* Initialize Task base structure */
> + for (task=0; task<BCOM_MAX_TASKS; task++)
> + {
> + out_be16(&bcom->regs->tcr[task], 0);
> + out_8(&bcom->regs->ipr[task], 0);
> +
> + bcom->tdt[task].context = ctx_pa;
> + bcom->tdt[task].var = var_pa;
> + bcom->tdt[task].fdt = fdt_pa;
> +
> + var_pa += BCOM_VAR_SIZE + BCOM_INC_SIZE;
> + ctx_pa += BCOM_CTX_SIZE;
> + }
> +
> + out_be32(&bcom->regs->taskBar, tdt_pa);
> +
> + /* Init 'always' initiator */
> + out_8(&bcom->regs->ipr[BCOM_INITIATOR_ALWAYS], BCOM_IPR_ALWAYS);
> +
> + /* Disable COMM Bus Prefetch, apparently it's not reliable yet */
> + /* FIXME: This should be done on 5200 and not 5200B ... */
> + out_be16(&bcom->regs->PtdCntrl, in_be16(&bcom->regs->PtdCntrl) | 1);
> +
> + /* Init lock */
> + spin_lock_init(&bcom->lock);
> +
> + return 0;
> +}
> +
> +static void
> +bcom_engine_cleanup(void)
> +{
> + int task;
> +
> + /* Stop all tasks */
> + for (task=0; task<BCOM_MAX_TASKS; task++)
> + {
> + out_be16(&bcom->regs->tcr[task], 0);
> + out_8(&bcom->regs->ipr[task], 0);
> + }
> +
> + out_be32(&bcom->regs->taskBar, 0ul);
> +
> + /* Release the SRAM zones */
> + bcom_sram_free(bcom->tdt);
> + bcom_sram_free(bcom->ctx);
> + bcom_sram_free(bcom->var);
> + bcom_sram_free(bcom->fdt);
> +}
> +
> +
> +/*
> ======================================================================
> == */
> +/* System/Module init &
> cleanup */
> +/*
> ======================================================================
> == */
> +
> +static int __init
> +mpc52xx_bcom_init(void)
> +{
> + struct device_node *ofn_bcom, *ofn_sram;
> + struct resource res_bcom;
> +
> + int rv;
> +
> + /* Find the bestcomm node. If none, fails 'silently' since
> + * we may just be on another platform */
> + ofn_bcom = of_find_compatible_node(
> + NULL, "dma-controller", "mpc5200-bestcomm");
> + if (!ofn_bcom)
> + return -ENODEV;
> +
> + /* Inform user we're ok so far */
> + printk(KERN_INFO "DMA: MPC52xx BestComm driver\n");
> +
> + /* Prepare SRAM */
> + ofn_sram = of_find_compatible_node(NULL, "sram", "mpc5200-sram");
> + if (!ofn_sram) {
> + printk(KERN_ERR DRIVER_NAME ": "
> + "No SRAM found in device tree\n");
> + rv = -ENODEV;
> + goto error_ofput;
> + }
> +
> + rv = bcom_sram_init(ofn_sram, DRIVER_NAME);
> +
> + of_node_put(ofn_sram);
> +
> + if (rv) {
> + printk(KERN_ERR DRIVER_NAME ": "
> + "Error in SRAM init\n");
> + goto error_ofput;
> + }
> +
> + /* Get a clean struct */
> + bcom = kzalloc(sizeof(struct bcom_engine), GFP_KERNEL);
> + if (!bcom) {
> + printk(KERN_ERR DRIVER_NAME ": "
> + "Can't allocate state structure\n");
> + rv = -ENOMEM;
> + goto error_sramclean;
> + }
> +
> + /* Save the node */
> + bcom->ofnode = ofn_bcom;
> +
> + /* Get, reserve & map io */
> + if (of_address_to_resource(bcom->ofnode, 0, &res_bcom)) {
> + printk(KERN_ERR DRIVER_NAME ": "
> + "Can't get resource\n");
> + rv = -EINVAL;
> + goto error_sramclean;
> + }
> +
> + if (!request_mem_region(res_bcom.start, sizeof(struct mpc52xx_sdma),
> + DRIVER_NAME)) {
> + printk(KERN_ERR DRIVER_NAME ": "
> + "Can't request registers region\n");
> + rv = -EBUSY;
> + goto error_sramclean;
> + }
> +
> + bcom->regs_base = res_bcom.start;
> + bcom->regs = ioremap(res_bcom.start, sizeof(struct mpc52xx_sdma));
> + if (!bcom->regs) {
> + printk(KERN_ERR DRIVER_NAME ": "
> + "Can't map registers\n");
> + rv = -ENOMEM;
> + goto error_release;
> + }
> +
> + /* Now, do the real init */
> + rv = bcom_engine_init();
> + if (rv)
> + goto error_unmap;
> +
> + /* Done ! */
> + printk(KERN_INFO "DMA: MPC52xx BestComm engine @%08lx ok !\n",
> + bcom->regs_base);
> +
> + return 0;
> +
> + /* Error path */
> +error_unmap:
> + iounmap(bcom->regs);
> +error_release:
> + release_mem_region(res_bcom.start, sizeof(struct mpc52xx_sdma));
> +error_sramclean:
> + bcom_sram_cleanup();
> +error_ofput:
> + of_node_put(bcom->ofnode);
> +
> + printk(KERN_ERR "DMA: MPC52xx BestComm init failed !\n");
> +
> + return rv;
> +}
> +
> +static void __exit
> +mpc52xx_bcom_exit(void)
> +{
> + /* Clean up the engine */
> + bcom_engine_cleanup();
> +
> + /* Cleanup SRAM */
> + bcom_sram_cleanup();
> +
> + /* Release regs */
> + iounmap(bcom->regs);
> + release_mem_region(bcom->regs_base, sizeof(struct mpc52xx_sdma));
> +
> + /* Release the node */
> + of_node_put(bcom->ofnode);
> +
> + /* Release memory */
> + kfree(bcom);
> +}
> +
> +#ifdef MODULE
> +module_init(mpc52xx_bcom_init);
> +module_exit(mpc52xx_bcom_exit);
> +#endif
> +
> +/* If we're not a module, we must make sure everything is setup
> before anyone */
> +/* tries to use us ... */
> +#ifndef MODULE
> +subsys_initcall(mpc52xx_bcom_init);
> +#endif
> +
> +MODULE_DESCRIPTION("Freescale MPC52xx BestComm DMA");
> +MODULE_AUTHOR("Sylvain Munaut <tnt@246tNt.com>");
> +MODULE_AUTHOR("Andrey Volkov <avolkov@varma-el.com>");
> +MODULE_AUTHOR("Dale Farnsworth <dfarnsworth@mvista.com>");
> +MODULE_LICENSE("GPL v2");
> +
> +
> +EXPORT_SYMBOL(bcom);
> +EXPORT_SYMBOL(bcom_dump_status);
> +EXPORT_SYMBOL(bcom_dump_task);
> +EXPORT_SYMBOL(bcom_dump_bdring);
> +EXPORT_SYMBOL(bcom_task_alloc);
> +EXPORT_SYMBOL(bcom_task_release);
> +EXPORT_SYMBOL(bcom_load_image);
> +EXPORT_SYMBOL(bcom_set_initiator);
> +EXPORT_SYMBOL(bcom_enable);
> +EXPORT_SYMBOL(bcom_disable);
> +
> diff --git a/arch/powerpc/sysdev/bestcomm/bestcomm.h b/arch/powerpc/
> sysdev/bestcomm/bestcomm.h
> new file mode 100644
> index 0000000..eac3eec
> --- /dev/null
> +++ b/arch/powerpc/sysdev/bestcomm/bestcomm.h
> @@ -0,0 +1,136 @@
> +/*
> + * Public header for the MPC52xx processor BestComm driver
> + *
> + *
> + * Copyright (C) 2006 Sylvain Munaut <tnt@246tNt.com>
> + * Copyright (C) 2005 Varma Electronics Oy,
> + * ( by Andrey Volkov <avolkov@varma-
> el.com> )
> + * Copyright (C) 2003-2004 MontaVista, Software, Inc.
> + * ( by Dale Farnsworth
> <dfarnsworth@mvista.com> )
> + *
> + * This file is licensed under the terms of the GNU General Public
> License
> + * version 2. This program is licensed "as is" without any
> warranty of any
> + * kind, whether express or implied.
> + */
> +
> +#ifndef __BESTCOMM_H__
> +#define __BESTCOMM_H__
> +
> +struct bcom_bd; /* defined later on ... */
> +
> +
> +/*
> ======================================================================
> == */
> +/* Generic task
> managment */
> +/*
> ======================================================================
> == */
> +
> +struct bcom_task {
> + unsigned int tasknum;
> + unsigned int flags;
> + int irq;
> +
> + struct bcom_bd *bd;
> + phys_addr_t bd_pa;
> + void **cookie;
> + unsigned short index;
> + unsigned short outdex;
> + unsigned int num_bd;
> + unsigned int bd_size;
> +
> + void* priv;
> +};
> +
> +#define BCOM_FLAGS_NONE 0x00000000ul
> +#define BCOM_FLAGS_ENABLE_TASK (1ul << 0)
> +
> +
> +extern void bcom_enable(struct bcom_task *tsk);
> +extern void bcom_disable(struct bcom_task *tsk);
> +
> +static inline int
> +bcom_get_task_irq(struct bcom_task *tsk) {
> + return tsk->irq;
> +}
> +
> +
> +/* Debug dumps */
> +extern void bcom_dump_status(void);
> +extern void bcom_dump_task(int task);
> +extern void bcom_dump_bdring(struct bcom_task *tsk);
> +
> +
> +/*
> ======================================================================
> == */
> +/* BD based tasks
> helpers */
> +/*
> ======================================================================
> == */
> +
> +struct bcom_bd {
> + u32 status;
> + u32 data[1]; /* variable, but at least 1 */
> +};
> +
> +#define BCOM_BD_READY 0x40000000ul
> +
> +static inline int /* user shouldn't use this ! */
> +_bcom_next_index(struct bcom_task *tsk)
> +{
> + return ((tsk->index + 1) == tsk->num_bd) ? 0 : tsk->index + 1;
> +}
> +
> +static inline int /* user shouldn't use this ! */
> +_bcom_next_outdex(struct bcom_task *tsk)
> +{
> + return ((tsk->outdex + 1) == tsk->num_bd) ? 0 : tsk->outdex + 1;
> +}
> +
> +static inline int
> +bcom_queue_empty(struct bcom_task *tsk)
> +{
> + return tsk->index == tsk->outdex;
> +}
> +
> +static inline int
> +bcom_queue_full(struct bcom_task *tsk)
> +{
> + return tsk->outdex == _bcom_next_index(tsk);
> +}
> +
> +static inline int
> +bcom_buffer_done(struct bcom_task *tsk)
> +{
> + if (bcom_queue_empty(tsk))
> + return 0;
> + return !(tsk->bd[tsk->outdex].status & BCOM_BD_READY);
> +}
> +
> +static inline struct bcom_bd *
> +bcom_prepare_next_buffer(struct bcom_task *tsk)
> +{
> + tsk->bd[tsk->index].status = 0; /* cleanup last status */
> + return &tsk->bd[tsk->index];
> +}
> +
> +static inline void
> +bcom_submit_next_buffer(struct bcom_task *tsk, void *cookie)
> +{
> + tsk->cookie[tsk->index] = cookie;
> + mb(); /* ensure the bd is really up-to-date */
> + tsk->bd[tsk->index].status |= BCOM_BD_READY;
> + tsk->index = _bcom_next_index(tsk);
> + if (tsk->flags & BCOM_FLAGS_ENABLE_TASK)
> + bcom_enable(tsk);
> +}
> +
> +static inline void *
> +bcom_retrieve_buffer(struct bcom_task *tsk, u32 *p_status, struct
> bcom_bd **p_bd)
> +{
> + void *cookie = tsk->cookie[tsk->outdex];
> + if (p_status)
> + *p_status = tsk->bd[tsk->outdex].status;
> + if (p_bd)
> + *p_bd = &tsk->bd[tsk->outdex];
> + tsk->outdex = _bcom_next_outdex(tsk);
> + return cookie;
> +}
> +
> +
> +#endif /* __BESTCOMM_H__ */
> +
> diff --git a/arch/powerpc/sysdev/bestcomm/bestcomm_priv.h b/arch/
> powerpc/sysdev/bestcomm/bestcomm_priv.h
> new file mode 100644
> index 0000000..d43b00a
> --- /dev/null
> +++ b/arch/powerpc/sysdev/bestcomm/bestcomm_priv.h
> @@ -0,0 +1,325 @@
> +/*
> + * Private header for the MPC52xx processor BestComm driver
> + *
> + *
> + * Copyright (C) 2006 Sylvain Munaut <tnt@246tNt.com>
> + * Copyright (C) 2005 Varma Electronics Oy,
> + * ( by Andrey Volkov <avolkov@varma-
> el.com> )
> + * Copyright (C) 2003-2004 MontaVista, Software, Inc.
> + * ( by Dale Farnsworth
> <dfarnsworth@mvista.com> )
> + *
> + * This file is licensed under the terms of the GNU General Public
> License
> + * version 2. This program is licensed "as is" without any
> warranty of any
> + * kind, whether express or implied.
> + */
> +
> +#ifndef __BESTCOMM_PRIV_H__
> +#define __BESTCOMM_PRIV_H__
> +
> +#include <linux/spinlock.h>
> +#include <asm/io.h>
> +#include <asm/prom.h>
> +#include <asm/mpc52xx.h>
> +
> +#include "sram.h"
> +
> +
> +/*
> ======================================================================
> == */
> +/* Engine related
> stuff */
> +/*
> ======================================================================
> == */
> +
> +/* Zones sizes and needed alignments */
> +#define BCOM_MAX_TASKS 16
> +#define BCOM_MAX_VAR 24
> +#define BCOM_MAX_INC 8
> +#define BCOM_MAX_FDT 64
> +#define BCOM_MAX_CTX 20
> +#define BCOM_CTX_SIZE (BCOM_MAX_CTX * sizeof(u32))
> +#define BCOM_CTX_ALIGN 0x100
> +#define BCOM_VAR_SIZE (BCOM_MAX_VAR * sizeof(u32))
> +#define BCOM_INC_SIZE (BCOM_MAX_INC * sizeof(u32))
> +#define BCOM_VAR_ALIGN 0x80
> +#define BCOM_FDT_SIZE (BCOM_MAX_FDT * sizeof(u32))
> +#define BCOM_FDT_ALIGN 0x100
> +
> +/* Task Descriptor Table Entry */
> +struct bcom_tdt {
> + u32 start;
> + u32 stop;
> + u32 var;
> + u32 fdt;
> + u32 exec_status; /* used internally by BestComm engine */
> + u32 mvtp; /* used internally by BestComm engine */
> + u32 context;
> + u32 litbase;
> +};
> +
> +/* This holds all info needed globaly to handle the engine */
> +struct bcom_engine {
> + struct device_node *ofnode;
> + struct mpc52xx_sdma __iomem *regs;
> + phys_addr_t regs_base;
> +
> + struct bcom_tdt *tdt;
> + u32 *ctx;
> + u32 *var;
> + u32 *fdt;
> +
> + spinlock_t lock;
> +};
> +
> +extern struct bcom_engine *bcom;
> +
> +
> +/*
> ======================================================================
> == */
> +/* Tasks related
> stuff */
> +/*
> ======================================================================
> == */
> +
> +/* Tasks image header */
> +#define BCOM_TASK_MAGIC 0x4243544B /* 'BCTK' */
> +
> +struct bcom_task_header {
> + u32 magic;
> + u8 desc_size; /* the size fields */
> + u8 var_size; /* are given in number */
> + u8 inc_size; /* of 32-bits words */
> + u8 first_var;
> + u8 reserved[8];
> +};
> +
> +/* Descriptors stucture & co */
> +#define BCOM_DESC_NOP 0x000001f8
> +#define BCOM_LCD_MASK 0x80000000
> +#define BCOM_DRD_EXTENDED 0x40000000
> +#define BCOM_DRD_INITIATOR_SHIFT 21
> +
> +/* Tasks pragma */
> +#define BCOM_PRAGMA_BIT_RSV 7 /* reserved pragma bit */
> +#define BCOM_PRAGMA_BIT_PRECISE_INC 6 /* increment 0=when
> possible, */
> + /* 1=iter end */
> +#define BCOM_PRAGMA_BIT_RST_ERROR_NO 5 /* don't reset errors on */
> + /* task enable */
> +#define BCOM_PRAGMA_BIT_PACK 4 /* pack data enable */
> +#define BCOM_PRAGMA_BIT_INTEGER 3 /* data alignment */
> + /* 0=frac(msb), 1=int(lsb) */
> +#define BCOM_PRAGMA_BIT_SPECREAD 2 /* XLB speculative read */
> +#define BCOM_PRAGMA_BIT_CW 1 /* write line buffer enable */
> +#define BCOM_PRAGMA_BIT_RL 0 /* read line buffer enable */
> +
> + /* Looks like XLB speculative read generates XLB errors when a
> buffer
> + * is at the end of the physical memory. i.e. when accessing the
> + * lasts words, the engine tries to prefetch the next but there
> is no
> + * next ...
> + */
> +#define BCOM_STD_PRAGMA ((0 << BCOM_PRAGMA_BIT_RSV) | \
> + (0 << BCOM_PRAGMA_BIT_PRECISE_INC) | \
> + (0 << BCOM_PRAGMA_BIT_RST_ERROR_NO) | \
> + (0 << BCOM_PRAGMA_BIT_PACK) | \
> + (0 << BCOM_PRAGMA_BIT_INTEGER) | \
> + (0 << BCOM_PRAGMA_BIT_SPECREAD) | \
> + (1 << BCOM_PRAGMA_BIT_CW) | \
> + (1 << BCOM_PRAGMA_BIT_RL))
> +
> +#define BCOM_PCI_PRAGMA ((0 << BCOM_PRAGMA_BIT_RSV) | \
> + (0 << BCOM_PRAGMA_BIT_PRECISE_INC) | \
> + (0 << BCOM_PRAGMA_BIT_RST_ERROR_NO) | \
> + (0 << BCOM_PRAGMA_BIT_PACK) | \
> + (1 << BCOM_PRAGMA_BIT_INTEGER) | \
> + (0 << BCOM_PRAGMA_BIT_SPECREAD) | \
> + (1 << BCOM_PRAGMA_BIT_CW) | \
> + (1 << BCOM_PRAGMA_BIT_RL))
> +
> +#define BCOM_ATA_PRAGMA BCOM_STD_PRAGMA
> +#define BCOM_CRC16_DP_0_PRAGMA BCOM_STD_PRAGMA
> +#define BCOM_CRC16_DP_1_PRAGMA BCOM_STD_PRAGMA
> +#define BCOM_FEC_RX_BD_PRAGMA BCOM_STD_PRAGMA
> +#define BCOM_FEC_TX_BD_PRAGMA BCOM_STD_PRAGMA
> +#define BCOM_GEN_DP_0_PRAGMA BCOM_STD_PRAGMA
> +#define BCOM_GEN_DP_1_PRAGMA BCOM_STD_PRAGMA
> +#define BCOM_GEN_DP_2_PRAGMA BCOM_STD_PRAGMA
> +#define BCOM_GEN_DP_3_PRAGMA BCOM_STD_PRAGMA
> +#define BCOM_GEN_DP_BD_0_PRAGMA BCOM_STD_PRAGMA
> +#define BCOM_GEN_DP_BD_1_PRAGMA BCOM_STD_PRAGMA
> +#define BCOM_GEN_RX_BD_PRAGMA BCOM_STD_PRAGMA
> +#define BCOM_GEN_TX_BD_PRAGMA BCOM_STD_PRAGMA
> +#define BCOM_GEN_LPC_PRAGMA BCOM_STD_PRAGMA
> +#define BCOM_PCI_RX_PRAGMA BCOM_PCI_PRAGMA
> +#define BCOM_PCI_TX_PRAGMA BCOM_PCI_PRAGMA
> +
> +/* Initiators number */
> +#define BCOM_INITIATOR_ALWAYS 0
> +#define BCOM_INITIATOR_SCTMR_0 1
> +#define BCOM_INITIATOR_SCTMR_1 2
> +#define BCOM_INITIATOR_FEC_RX 3
> +#define BCOM_INITIATOR_FEC_TX 4
> +#define BCOM_INITIATOR_ATA_RX 5
> +#define BCOM_INITIATOR_ATA_TX 6
> +#define BCOM_INITIATOR_SCPCI_RX 7
> +#define BCOM_INITIATOR_SCPCI_TX 8
> +#define BCOM_INITIATOR_PSC3_RX 9
> +#define BCOM_INITIATOR_PSC3_TX 10
> +#define BCOM_INITIATOR_PSC2_RX 11
> +#define BCOM_INITIATOR_PSC2_TX 12
> +#define BCOM_INITIATOR_PSC1_RX 13
> +#define BCOM_INITIATOR_PSC1_TX 14
> +#define BCOM_INITIATOR_SCTMR_2 15
> +#define BCOM_INITIATOR_SCLPC 16
> +#define BCOM_INITIATOR_PSC5_RX 17
> +#define BCOM_INITIATOR_PSC5_TX 18
> +#define BCOM_INITIATOR_PSC4_RX 19
> +#define BCOM_INITIATOR_PSC4_TX 20
> +#define BCOM_INITIATOR_I2C2_RX 21
> +#define BCOM_INITIATOR_I2C2_TX 22
> +#define BCOM_INITIATOR_I2C1_RX 23
> +#define BCOM_INITIATOR_I2C1_TX 24
> +#define BCOM_INITIATOR_PSC6_RX 25
> +#define BCOM_INITIATOR_PSC6_TX 26
> +#define BCOM_INITIATOR_IRDA_RX 25
> +#define BCOM_INITIATOR_IRDA_TX 26
> +#define BCOM_INITIATOR_SCTMR_3 27
> +#define BCOM_INITIATOR_SCTMR_4 28
> +#define BCOM_INITIATOR_SCTMR_5 29
> +#define BCOM_INITIATOR_SCTMR_6 30
> +#define BCOM_INITIATOR_SCTMR_7 31
> +
> +/* Initiators priorities */
> +#define BCOM_IPR_ALWAYS 7
> +#define BCOM_IPR_SCTMR_0 2
> +#define BCOM_IPR_SCTMR_1 2
> +#define BCOM_IPR_FEC_RX 6
> +#define BCOM_IPR_FEC_TX 5
> +#define BCOM_IPR_ATA_RX 4
> +#define BCOM_IPR_ATA_TX 3
> +#define BCOM_IPR_SCPCI_RX 2
> +#define BCOM_IPR_SCPCI_TX 2
> +#define BCOM_IPR_PSC3_RX 2
> +#define BCOM_IPR_PSC3_TX 2
> +#define BCOM_IPR_PSC2_RX 2
> +#define BCOM_IPR_PSC2_TX 2
> +#define BCOM_IPR_PSC1_RX 2
> +#define BCOM_IPR_PSC1_TX 2
> +#define BCOM_IPR_SCTMR_2 2
> +#define BCOM_IPR_SCLPC 2
> +#define BCOM_IPR_PSC5_RX 2
> +#define BCOM_IPR_PSC5_TX 2
> +#define BCOM_IPR_PSC4_RX 2
> +#define BCOM_IPR_PSC4_TX 2
> +#define BCOM_IPR_I2C2_RX 2
> +#define BCOM_IPR_I2C2_TX 2
> +#define BCOM_IPR_I2C1_RX 2
> +#define BCOM_IPR_I2C1_TX 2
> +#define BCOM_IPR_PSC6_RX 2
> +#define BCOM_IPR_PSC6_TX 2
> +#define BCOM_IPR_IRDA_RX 2
> +#define BCOM_IPR_IRDA_TX 2
> +#define BCOM_IPR_SCTMR_3 2
> +#define BCOM_IPR_SCTMR_4 2
> +#define BCOM_IPR_SCTMR_5 2
> +#define BCOM_IPR_SCTMR_6 2
> +#define BCOM_IPR_SCTMR_7 2
> +
> +
> +/*
> ======================================================================
> == */
> +/*
> API
> */
> +/*
> ======================================================================
> == */
> +
> +extern struct bcom_task *bcom_task_alloc(int bd_count, int
> bd_size, int priv_size);
> +extern void bcom_task_release(struct bcom_task *tsk);
> +
> +extern int bcom_load_image(int task, u32 *task_image);
> +extern void bcom_set_initiator(int task, int initiator);
> +
> +
> +#define TASK_ENABLE 0x8000
> +
> +static inline void
> +bcom_enable_task(int task)
> +{
> + u16 reg;
> + reg = in_be16(&bcom->regs->tcr[task]);
> + out_be16(&bcom->regs->tcr[task], reg | TASK_ENABLE);
> +}
> +
> +static inline void
> +bcom_disable_task(int task)
> +{
> + u16 reg = in_be16(&bcom->regs->tcr[task]);
> + out_be16(&bcom->regs->tcr[task], reg & ~TASK_ENABLE);
> +}
> +
> +
> +static inline u32 *
> +bcom_task_desc(int task)
> +{
> + return bcom_sram_pa2va(bcom->tdt[task].start);
> +}
> +
> +static inline int
> +bcom_task_num_descs(int task)
> +{
> + return (bcom->tdt[task].stop - bcom->tdt[task].start)/sizeof(u32)
> + 1;
> +}
> +
> +static inline u32 *
> +bcom_task_var(int task)
> +{
> + return bcom_sram_pa2va(bcom->tdt[task].var);
> +}
> +
> +static inline u32 *
> +bcom_task_inc(int task)
> +{
> + return &bcom_task_var(task)[BCOM_MAX_VAR];
> +}
> +
> +
> +static inline int
> +bcom_drd_is_extended(u32 desc)
> +{
> + return (desc) & BCOM_DRD_EXTENDED;
> +}
> +
> +static inline int
> +bcom_desc_is_drd(u32 desc)
> +{
> + return !(desc & BCOM_LCD_MASK) && desc != BCOM_DESC_NOP;
> +}
> +
> +static inline int
> +bcom_desc_initiator(u32 desc)
> +{
> + return (desc >> BCOM_DRD_INITIATOR_SHIFT) & 0x1f;
> +}
> +
> +static inline void
> +bcom_set_desc_initiator(u32 *desc, int initiator)
> +{
> + *desc = (*desc & ~(0x1f << BCOM_DRD_INITIATOR_SHIFT)) |
> + ((initiator & 0x1f) << BCOM_DRD_INITIATOR_SHIFT);
> +}
> +
> +
> +static inline void
> +bcom_set_task_pragma(int task, int pragma)
> +{
> + u32 *fdt = &bcom->tdt[task].fdt;
> + *fdt = (*fdt & ~0xff) | pragma;
> +}
> +
> +static inline void
> +bcom_set_task_auto_start(int task, int next_task)
> +{
> + u16 __iomem *tcr = &bcom->regs->tcr[task];
> + out_be16(tcr, (in_be16(tcr) & ~0xff) | 0x00c0 | next_task);
> +}
> +
> +static inline void
> +bcom_set_tcr_initiator(int task, int initiator)
> +{
> + u16 __iomem *tcr = &bcom->regs->tcr[task];
> + out_be16(tcr, (in_be16(tcr) & ~0x1f00) | ((initiator & 0x1f) << 8));
> +}
> +
> +
> +#endif /* __BESTCOMM_PRIV_H__ */
> +
> diff --git a/arch/powerpc/sysdev/bestcomm/sram.c b/arch/powerpc/
> sysdev/bestcomm/sram.c
> new file mode 100644
> index 0000000..4f69127
> --- /dev/null
> +++ b/arch/powerpc/sysdev/bestcomm/sram.c
> @@ -0,0 +1,180 @@
> +/*
> + * Simple memory allocator for on-board SRAM
> + *
> + *
> + * Maintainer : Sylvain Munaut <tnt@246tNt.com>
> + *
> + * Copyright (C) 2005 Sylvain Munaut <tnt@246tNt.com>
> + *
> + * This file is licensed under the terms of the GNU General Public
> License
> + * version 2. This program is licensed "as is" without any
> warranty of any
> + * kind, whether express or implied.
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/slab.h>
> +#include <linux/spinlock.h>
> +#include <linux/string.h>
> +#include <linux/ioport.h>
> +
> +#include <asm/io.h>
> +#include <asm/mmu.h>
> +#include <asm/prom.h>
> +
> +#include "sram.h"
> +
> +
> +/* Struct keeping our 'state' */
> +struct bcom_sram *bcom_sram = NULL;
> +
> +
> +/*
> ======================================================================
> == */
> +/* Public
> API */
> +/*
> ======================================================================
> == */
> +/* DO NOT USE in interrupts, if needed in irq handler, we should
> use the
> + _irqsave version of the spin_locks */
> +
> +int bcom_sram_init(struct device_node *sram_node, char *owner)
> +{
> + int rv;
> + const u32 *regaddr_p;
> + u64 regaddr64, size64;
> + unsigned int psize;
> +
> + /* Create our state struct */
> + if (bcom_sram) {
> + printk(KERN_ERR "%s: bcom_sram_init: "
> + "Already initialiwed !\n", owner);
> + return -EBUSY;
> + }
> +
> + bcom_sram = kmalloc(sizeof(struct bcom_sram), GFP_KERNEL);
> + if (!bcom_sram) {
> + printk(KERN_ERR "%s: bcom_sram_init: "
> + "Couldn't allocate internal state !\n", owner);
> + return -ENOMEM;
> + }
> +
> + /* Get address and size of the sram */
> + regaddr_p = of_get_address(sram_node, 0, &size64, NULL);
> + if (!regaddr_p) {
> + printk(KERN_ERR "%s: bcom_sram_init: "
> + "Invalid device node !\n", owner);
> + rv = -EINVAL;
> + goto error_free;
> + }
> +
> + regaddr64 = of_translate_address(sram_node, regaddr_p);
> +
> + bcom_sram->base_phys = (phys_addr_t) regaddr64;
> + bcom_sram->size = (unsigned int) size64;
> +
> + /* Request region */
> + if (!request_mem_region(bcom_sram->base_phys, bcom_sram->size,
> owner)) {
> + printk(KERN_ERR "%s: bcom_sram_init: "
> + "Couln't request region !\n", owner);
> + rv = -EBUSY;
> + goto error_free;
> + }
> +
> + /* Map SRAM */
> + /* sram is not really __iomem */
> + bcom_sram->base_virt = (void*) ioremap(bcom_sram->base_phys,
> bcom_sram->size);
> +
> + if (!bcom_sram->base_virt) {
> + printk(KERN_ERR "%s: bcom_sram_init: "
> + "Map error SRAM zone 0x%08lx (0x%0x)!\n",
> + owner, bcom_sram->base_phys, bcom_sram->size );
> + rv = -ENOMEM;
> + goto error_release;
> + }
> +
> + /* Create an rheap (defaults to 32 bits word alignment) */
> + bcom_sram->rh = rh_create(4);
> +
> + /* Attach the free zones */
> +#if 0
> + /* Currently disabled ... for future use only */
> + reg_addr_p = of_get_property(sram_node, "available", &psize);
> +#else
> + regaddr_p = NULL;
> + psize = 0;
> +#endif
> +
> + if (!regaddr_p || !psize) {
> + /* Attach the whole zone */
> + rh_attach_region(bcom_sram->rh, 0, bcom_sram->size);
> + } else {
> + /* Attach each zone independently */
> + while (psize >= 2 * sizeof(u32)) {
> + phys_addr_t zbase = of_translate_address(sram_node, regaddr_p);
> + rh_attach_region(bcom_sram->rh, zbase - bcom_sram->base_phys,
> regaddr_p[1]);
> + regaddr_p += 2;
> + psize -= 2 * sizeof(u32);
> + }
> + }
> +
> + /* Init our spinlock */
> + spin_lock_init(&bcom_sram->lock);
> +
> + return 0;
> +
> +error_release:
> + release_mem_region(bcom_sram->base_phys, bcom_sram->size);
> +error_free:
> + kfree(bcom_sram);
> + bcom_sram = NULL;
> +
> + return rv;
> +}
> +
> +void bcom_sram_cleanup(void)
> +{
> + /* Free resources */
> + if (bcom_sram) {
> + rh_destroy(bcom_sram->rh);
> + iounmap((void __iomem *)bcom_sram->base_virt);
> + release_mem_region(bcom_sram->base_phys, bcom_sram->size);
> + kfree(bcom_sram);
> + bcom_sram = NULL;
> + }
> +}
> +
> +void* bcom_sram_alloc(int size, int align, phys_addr_t *phys)
> +{
> + unsigned long offset;
> +
> + spin_lock(&bcom_sram->lock);
> + offset = rh_alloc_align(bcom_sram->rh, size, align, NULL);
> + spin_unlock(&bcom_sram->lock);
> +
> + if (IS_ERR_VALUE(offset))
> + return NULL;
> +
> + *phys = bcom_sram->base_phys + offset;
> + return bcom_sram->base_virt + offset;
> +}
> +
> +void bcom_sram_free(void *ptr)
> +{
> + unsigned long offset;
> +
> + if (!ptr)
> + return;
> +
> + offset = ptr - bcom_sram->base_virt;
> +
> + spin_lock(&bcom_sram->lock);
> + rh_free(bcom_sram->rh, offset);
> + spin_unlock(&bcom_sram->lock);
> +}
> +
> +
> +EXPORT_SYMBOL(bcom_sram);
> +
> +EXPORT_SYMBOL(bcom_sram_init);
> +EXPORT_SYMBOL(bcom_sram_cleanup);
> +EXPORT_SYMBOL(bcom_sram_alloc);
> +EXPORT_SYMBOL(bcom_sram_free);
> +
> diff --git a/arch/powerpc/sysdev/bestcomm/sram.h b/arch/powerpc/
> sysdev/bestcomm/sram.h
> new file mode 100644
> index 0000000..b6d6689
> --- /dev/null
> +++ b/arch/powerpc/sysdev/bestcomm/sram.h
> @@ -0,0 +1,54 @@
> +/*
> + * Handling of a sram zone for bestcomm
> + *
> + *
> + * Copyright (C) 2007 Sylvain Munaut <tnt@246tNt.com>
> + *
> + * This file is licensed under the terms of the GNU General Public
> License
> + * version 2. This program is licensed "as is" without any
> warranty of any
> + * kind, whether express or implied.
> + */
> +
> +#ifndef __BESTCOMM_SRAM_H__
> +#define __BESTCOMM_SRAM_H__
> +
> +#include <asm/rheap.h>
> +#include <asm/mmu.h>
> +#include <linux/spinlock.h>
> +
> +
> +/* Structure used internally */
> + /* The internals are here for the inline functions
> + * sake, certainly not for the user to mess with !
> + */
> +struct bcom_sram {
> + phys_addr_t base_phys;
> + void *base_virt;
> + unsigned int size;
> + rh_info_t *rh;
> + spinlock_t lock;
> +};
> +
> +extern struct bcom_sram *bcom_sram;
> +
> +
> +/* Public API */
> +extern int bcom_sram_init(struct device_node *sram_node, char
> *owner);
> +extern void bcom_sram_cleanup(void);
> +
> +extern void* bcom_sram_alloc(int size, int align, phys_addr_t *phys);
> +extern void bcom_sram_free(void *ptr);
> +
> +static inline phys_addr_t bcom_sram_va2pa(void *va) {
> + return bcom_sram->base_phys +
> + (unsigned long)(va - bcom_sram->base_virt);
> +}
> +
> +static inline void *bcom_sram_pa2va(phys_addr_t pa) {
> + return bcom_sram->base_virt +
> + (unsigned long)(pa - bcom_sram->base_phys);
> +}
> +
> +
> +#endif /* __BESTCOMM_SRAM_H__ */
> +
> --
> 1.5.1.2
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev
^ permalink raw reply
* Re: arch/powerpc/sysdev: dumping ground or only for shared drivers?
From: Mark A. Greer @ 2007-05-15 22:06 UTC (permalink / raw)
To: Kumar Gala; +Cc: Olof Johansson, linuxppc-dev, Paul Mackerras
In-Reply-To: <FF6A6402-37F5-406F-9DA2-0C0D4D6E4D8B@kernel.crashing.org>
On Tue, May 15, 2007 at 04:06:40PM -0500, Kumar Gala wrote:
>
> On May 11, 2007, at 12:05 PM, Linas Vepstas wrote:
>
> > On Fri, May 11, 2007 at 10:26:27AM +1000, Paul Mackerras wrote:
> >> Olof Johansson writes:
> >>
> >>> This adds yet another set of chipset drivers under sysdev, that are
> >>> only used by one platform (several board ports under that platform,
> >>> but only one platforms/* directory).
> >>>
> >>> In my opinion, they really should go under the platform directory
> >>> instead,
> >>> and not clutter the shared directory.
> >>
> >> I disagree, actually. Having these things in a shared directory
> >> makes
> >> it more likely that people will look at the code. That means that
> >> it's more likely that bugs will be found, and more likely that parts
> >> of the code can get reused when people are doing the port to a new
> >> chip or board.
> >>
> >> If there were hundreds of files in arch/powerpc/sysdev then I
> >> would be
> >> more likely to agree with you, but there aren't.
> >
> > I like Paul's take, it matches my gut instincts.
>
> If this is how we are going we should move some code from arch/
> powerpc/platforms into sysdev (for example the 5200 platform has its
> pic code and some other bits that would be candidate to move into
> sysdev).
I like Paul's take as well and I don't like the idea of moving the
5200 pci code, etc. to sysdev. I just can't explain why.
But, I'll try anyway:
The 5200 is an SoC so all the portions of that chip are tighly coupled
with the 5200. It doesn't make sense to put half of the 5200 code under
platforms and the other half under sysdev (unless the code is shared
with something that isn't a 5200).
The marvell code is not tied to any particular processor family/SoC.
There are versions that work on 7xx/74xx, and 970. So, you could say
that code is shared amongst several families even though all of the
platform code that uses it happens to be under embedded6xx.
That's the best I can come up with right now. :)
Mark
^ permalink raw reply
* Re: arch/powerpc/sysdev: dumping ground or only for shared drivers?
From: Grant Likely @ 2007-05-15 22:19 UTC (permalink / raw)
To: Mark A. Greer; +Cc: Olof Johansson, linuxppc-dev, Paul Mackerras
In-Reply-To: <20070515220616.GB2433@mag.az.mvista.com>
On 5/15/07, Mark A. Greer <mgreer@mvista.com> wrote:
> On Tue, May 15, 2007 at 04:06:40PM -0500, Kumar Gala wrote:
> > If this is how we are going we should move some code from arch/
> > powerpc/platforms into sysdev (for example the 5200 platform has its
> > pic code and some other bits that would be candidate to move into
> > sysdev).
>
> I like Paul's take as well and I don't like the idea of moving the
> 5200 pci code, etc. to sysdev. I just can't explain why.
>
> But, I'll try anyway:
>
> The 5200 is an SoC so all the portions of that chip are tighly coupled
> with the 5200. It doesn't make sense to put half of the 5200 code under
> platforms and the other half under sysdev (unless the code is shared
> with something that isn't a 5200).
Actually, that's a good explaination
I must agree. If there is little chance that the code will be used by
any other platform, then don't split it up for the sake of (for
example) putting all the pic code in the same place. I think there
are fewer opportunities for confusion if only code that is actually
shared goes in the shared directory. (ie. "how worried do I need to
be about affecting other platforms when I modify this code?").
> The marvell code is not tied to any particular processor family/SoC.
> There are versions that work on 7xx/74xx, and 970. So, you could say
> that code is shared amongst several families even though all of the
> platform code that uses it happens to be under embedded6xx.
I also agree here.
g.
--
Grant Likely, B.Sc. P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195
^ permalink raw reply
* Please pull from 'for_paulus' branch
From: Kumar Gala @ 2007-05-15 22:20 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
Please pull from 'for_paulus' branch of
master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc.git for_paulus
These are fixes/cleanups intended for 2.6.22.
to receive the following updates:
arch/powerpc/boot/dts/kuroboxHD.dts | 44 +++++++------------
arch/powerpc/boot/dts/kuroboxHG.dts | 45 +++++++------------
arch/powerpc/boot/dts/lite5200.dts | 69 +++++++++++++++---------------
arch/powerpc/boot/dts/lite5200b.dts | 77 ++++++++++++++++------------------
arch/powerpc/boot/dts/mpc7448hpc2.dts | 72 ++++++++++++++-----------------
arch/powerpc/boot/dts/mpc8540ads.dts | 16 +++++++
arch/powerpc/boot/dts/mpc8541cds.dts | 16 +++++++
arch/powerpc/boot/dts/mpc8544ds.dts | 16 +++++++
arch/powerpc/boot/dts/mpc8548cds.dts | 16 +++++++
arch/powerpc/boot/dts/mpc8555cds.dts | 16 +++++++
arch/powerpc/boot/dts/mpc8560ads.dts | 18 +++++++
arch/powerpc/boot/dts/mpc8568mds.dts | 16 +++++++
arch/powerpc/kernel/cputable.c | 2
arch/powerpc/kernel/entry_32.S | 18 ++++++-
arch/powerpc/lib/rheap.c | 22 +++------
arch/powerpc/mm/hash_low_32.S | 18 ++++++-
arch/ppc/kernel/entry.S | 18 ++++++-
arch/ppc/mm/hashtable.S | 18 ++++++-
arch/ppc/syslib/pq2_sys.c | 36 ++++++++-------
drivers/char/watchdog/booke_wdt.c | 2
include/asm-powerpc/cputable.h | 6 ++
include/asm-powerpc/mpc8260.h | 6 +-
include/asm-powerpc/pmac_feature.h | 6 +-
include/asm-powerpc/tsi108_irq.h | 6 +-
include/asm-powerpc/tsi108_pci.h | 6 +-
include/asm-powerpc/unistd.h | 6 +-
26 files changed, 361 insertions(+), 230 deletions(-)
Becky Bruce (1):
[POWERPC] Change include protections to ASM_POWERPC
Dave Jiang (2):
[POWERPC] Fix comment in booke_wdt
[POWERPC] 85xx: Add device nodes for error reporting devices used by EDAC
James.Yang (1):
[POWERPC] Remove CPU_FTR_NEED_COHERENT for 7448.
Kumar Gala (4):
[POWERPC] Fix COMMON symbol warnings
[PPC] Fix COMMON symbol warnings
[POWERPC] 85xx: Add device nodes for error reporting devices used by EDAC
[POWERPC] Removed hardcoded phandles from dts
Morten Banzon (1):
[PPC] MCC2 missing in MPC826x device_list
Timur Tabi (1):
[POWERPC] Fix alignment problem in rh_alloc_align() with exact-sized blocks
diff --git a/arch/powerpc/boot/dts/kuroboxHD.dts b/arch/powerpc/boot/dts/kuroboxHD.dts
index 157dc98..a983680 100644
--- a/arch/powerpc/boot/dts/kuroboxHD.dts
+++ b/arch/powerpc/boot/dts/kuroboxHD.dts
@@ -21,19 +21,16 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHD.dtb -V 16 kuroboxHD.dts"
*/
/ {
- linux,phandle = <1000>;
model = "KuroboxHD";
compatible = "linkstation";
#address-cells = <1>;
#size-cells = <1>;
cpus {
- linux,phandle = <2000>;
#address-cells = <1>;
#size-cells = <0>;
PowerPC,603e { /* Really 8241 */
- linux,phandle = <2100>;
device_type = "cpu";
reg = <0>;
clock-frequency = <bebc200>; /* Fixed by bootwrapper */
@@ -48,13 +45,11 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHD.dtb -V 16 kuroboxHD.dts"
};
memory {
- linux,phandle = <3000>;
device_type = "memory";
reg = <00000000 04000000>;
};
soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */
- linux,phandle = <4000>;
#address-cells = <1>;
#size-cells = <1>;
#interrupt-cells = <2>;
@@ -69,38 +64,34 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHD.dtb -V 16 kuroboxHD.dts"
fef00000 fef00000 00100000>; /* pci iack */
i2c@80003000 {
- linux,phandle = <4300>;
device_type = "i2c";
compatible = "fsl-i2c";
reg = <80003000 1000>;
interrupts = <5 2>;
- interrupt-parent = <4400>;
+ interrupt-parent = <&mpic>;
};
serial@80004500 {
- linux,phandle = <4511>;
device_type = "serial";
compatible = "ns16550";
reg = <80004500 8>;
clock-frequency = <5d08d88>;
current-speed = <2580>;
interrupts = <9 2>;
- interrupt-parent = <4400>;
+ interrupt-parent = <&mpic>;
};
serial@80004600 {
- linux,phandle = <4512>;
device_type = "serial";
compatible = "ns16550";
reg = <80004600 8>;
clock-frequency = <5d08d88>;
current-speed = <e100>;
interrupts = <a 0>;
- interrupt-parent = <4400>;
+ interrupt-parent = <&mpic>;
};
- pic@80040000 {
- linux,phandle = <4400>;
+ mpic: pic@80040000 {
#interrupt-cells = <2>;
#address-cells = <0>;
device_type = "open-pic";
@@ -111,7 +102,6 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHD.dtb -V 16 kuroboxHD.dts"
};
pci@fec00000 {
- linux,phandle = <4500>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
@@ -122,24 +112,24 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHD.dtb -V 16 kuroboxHD.dts"
02000000 0 80000000 80000000 0 70000000>;
bus-range = <0 ff>;
clock-frequency = <7f28155>;
- interrupt-parent = <4400>;
+ interrupt-parent = <&mpic>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 11 - IRQ0 ETH */
- 5800 0 0 1 4400 0 1
- 5800 0 0 2 4400 1 1
- 5800 0 0 3 4400 2 1
- 5800 0 0 4 4400 3 1
+ 5800 0 0 1 &mpic 0 1
+ 5800 0 0 2 &mpic 1 1
+ 5800 0 0 3 &mpic 2 1
+ 5800 0 0 4 &mpic 3 1
/* IDSEL 12 - IRQ1 IDE0 */
- 6000 0 0 1 4400 1 1
- 6000 0 0 2 4400 2 1
- 6000 0 0 3 4400 3 1
- 6000 0 0 4 4400 0 1
+ 6000 0 0 1 &mpic 1 1
+ 6000 0 0 2 &mpic 2 1
+ 6000 0 0 3 &mpic 3 1
+ 6000 0 0 4 &mpic 0 1
/* IDSEL 14 - IRQ3 USB2.0 */
- 7000 0 0 1 4400 3 1
- 7000 0 0 2 4400 3 1
- 7000 0 0 3 4400 3 1
- 7000 0 0 4 4400 3 1
+ 7000 0 0 1 &mpic 3 1
+ 7000 0 0 2 &mpic 3 1
+ 7000 0 0 3 &mpic 3 1
+ 7000 0 0 4 &mpic 3 1
>;
};
};
diff --git a/arch/powerpc/boot/dts/kuroboxHG.dts b/arch/powerpc/boot/dts/kuroboxHG.dts
index 919eb29..5cf42dc 100644
--- a/arch/powerpc/boot/dts/kuroboxHG.dts
+++ b/arch/powerpc/boot/dts/kuroboxHG.dts
@@ -21,19 +21,16 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHG.dtb -V 16 kuroboxHG.dts"
*/
/ {
- linux,phandle = <1000>;
model = "KuroboxHG";
compatible = "linkstation";
#address-cells = <1>;
#size-cells = <1>;
cpus {
- linux,phandle = <2000>;
#address-cells = <1>;
#size-cells = <0>;
PowerPC,603e { /* Really 8241 */
- linux,phandle = <2100>;
device_type = "cpu";
reg = <0>;
clock-frequency = <fdad680>; /* Fixed by bootwrapper */
@@ -48,13 +45,11 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHG.dtb -V 16 kuroboxHG.dts"
};
memory {
- linux,phandle = <3000>;
device_type = "memory";
reg = <00000000 08000000>;
};
soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */
- linux,phandle = <4000>;
#address-cells = <1>;
#size-cells = <1>;
#interrupt-cells = <2>;
@@ -69,38 +64,35 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHG.dtb -V 16 kuroboxHG.dts"
fef00000 fef00000 00100000>; /* pci iack */
i2c@80003000 {
- linux,phandle = <4300>;
device_type = "i2c";
compatible = "fsl-i2c";
reg = <80003000 1000>;
interrupts = <5 2>;
- interrupt-parent = <4400>;
+ interrupt-parent = <&mpic>;
};
serial@80004500 {
- linux,phandle = <4511>;
device_type = "serial";
compatible = "ns16550";
reg = <80004500 8>;
clock-frequency = <7c044a8>;
current-speed = <2580>;
interrupts = <9 2>;
- interrupt-parent = <4400>;
+ interrupt-parent = <&mpic>;
};
serial@80004600 {
- linux,phandle = <4512>;
device_type = "serial";
compatible = "ns16550";
reg = <80004600 8>;
clock-frequency = <7c044a8>;
current-speed = <e100>;
interrupts = <a 0>;
- interrupt-parent = <4400>;
+ interrupt-parent = <&mpic>;
};
- pic@80040000 {
- linux,phandle = <4400>;
+ mpic: pic@80040000 {
+ interrupt-parent = <&mpic>;
#interrupt-cells = <2>;
#address-cells = <0>;
device_type = "open-pic";
@@ -111,7 +103,6 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHG.dtb -V 16 kuroboxHG.dts"
};
pci@fec00000 {
- linux,phandle = <4500>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
@@ -122,24 +113,24 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHG.dtb -V 16 kuroboxHG.dts"
02000000 0 80000000 80000000 0 70000000>;
bus-range = <0 ff>;
clock-frequency = <7f28155>;
- interrupt-parent = <4400>;
+ interrupt-parent = <&mpic>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 11 - IRQ0 ETH */
- 5800 0 0 1 4400 0 1
- 5800 0 0 2 4400 1 1
- 5800 0 0 3 4400 2 1
- 5800 0 0 4 4400 3 1
+ 5800 0 0 1 &mpic 0 1
+ 5800 0 0 2 &mpic 1 1
+ 5800 0 0 3 &mpic 2 1
+ 5800 0 0 4 &mpic 3 1
/* IDSEL 12 - IRQ1 IDE0 */
- 6000 0 0 1 4400 1 1
- 6000 0 0 2 4400 2 1
- 6000 0 0 3 4400 3 1
- 6000 0 0 4 4400 0 1
+ 6000 0 0 1 &mpic 1 1
+ 6000 0 0 2 &mpic 2 1
+ 6000 0 0 3 &mpic 3 1
+ 6000 0 0 4 &mpic 0 1
/* IDSEL 14 - IRQ3 USB2.0 */
- 7000 0 0 1 4400 3 1
- 7000 0 0 2 4400 3 1
- 7000 0 0 3 4400 3 1
- 7000 0 0 4 4400 3 1
+ 7000 0 0 1 &mpic 3 1
+ 7000 0 0 2 &mpic 3 1
+ 7000 0 0 3 &mpic 3 1
+ 7000 0 0 4 &mpic 3 1
>;
};
};
diff --git a/arch/powerpc/boot/dts/lite5200.dts b/arch/powerpc/boot/dts/lite5200.dts
index e13ac6e..eae68ab 100644
--- a/arch/powerpc/boot/dts/lite5200.dts
+++ b/arch/powerpc/boot/dts/lite5200.dts
@@ -49,7 +49,7 @@
soc5200@f0000000 {
model = "fsl,mpc5200";
compatible = "mpc5200";
- revision = "" // from bootloader
+ revision = ""; // from bootloader
#interrupt-cells = <3>;
device_type = "soc";
ranges = <0 f0000000 f0010000>;
@@ -62,13 +62,12 @@
reg = <200 38>;
};
- pic@500 {
+ mpc5200_pic: pic@500 {
// 5200 interrupts are encoded into two levels;
- linux,phandle = <500>;
interrupt-controller;
#interrupt-cells = <3>;
device_type = "interrupt-controller";
- compatible = "mpc5200-pic";
+ compatible = "mpc5200_pic";
reg = <500 80>;
built-in;
};
@@ -79,7 +78,7 @@
cell-index = <0>;
reg = <600 10>;
interrupts = <1 9 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
has-wdt;
};
@@ -89,7 +88,7 @@
cell-index = <1>;
reg = <610 10>;
interrupts = <1 a 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
};
gpt@620 { // General Purpose Timer
@@ -98,7 +97,7 @@
cell-index = <2>;
reg = <620 10>;
interrupts = <1 b 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
};
gpt@630 { // General Purpose Timer
@@ -107,7 +106,7 @@
cell-index = <3>;
reg = <630 10>;
interrupts = <1 c 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
};
gpt@640 { // General Purpose Timer
@@ -116,7 +115,7 @@
cell-index = <4>;
reg = <640 10>;
interrupts = <1 d 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
};
gpt@650 { // General Purpose Timer
@@ -125,7 +124,7 @@
cell-index = <5>;
reg = <650 10>;
interrupts = <1 e 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
};
gpt@660 { // General Purpose Timer
@@ -134,7 +133,7 @@
cell-index = <6>;
reg = <660 10>;
interrupts = <1 f 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
};
gpt@670 { // General Purpose Timer
@@ -143,7 +142,7 @@
cell-index = <7>;
reg = <670 10>;
interrupts = <1 10 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
};
rtc@800 { // Real time clock
@@ -151,7 +150,7 @@
device_type = "rtc";
reg = <800 100>;
interrupts = <1 5 0 1 6 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
};
mscan@900 {
@@ -159,7 +158,7 @@
compatible = "mpc5200-mscan";
cell-index = <0>;
interrupts = <2 11 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
reg = <900 80>;
};
@@ -168,7 +167,7 @@
compatible = "mpc5200-mscan";
cell-index = <1>;
interrupts = <2 12 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
reg = <980 80>;
};
@@ -176,14 +175,14 @@
compatible = "mpc5200-gpio";
reg = <b00 40>;
interrupts = <1 7 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
};
gpio-wkup@c00 {
compatible = "mpc5200-gpio-wkup";
reg = <c00 40>;
interrupts = <1 8 0 0 3 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
};
pci@0d00 {
@@ -194,13 +193,13 @@
compatible = "mpc5200-pci";
reg = <d00 100>;
interrupt-map-mask = <f800 0 0 7>;
- interrupt-map = <c000 0 0 1 500 0 0 3
- c000 0 0 2 500 0 0 3
- c000 0 0 3 500 0 0 3
- c000 0 0 4 500 0 0 3>;
+ interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3
+ c000 0 0 2 &mpc5200_pic 0 0 3
+ c000 0 0 3 &mpc5200_pic 0 0 3
+ c000 0 0 4 &mpc5200_pic 0 0 3>;
clock-frequency = <0>; // From boot loader
interrupts = <2 8 0 2 9 0 2 a 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
bus-range = <0 0>;
ranges = <42000000 0 80000000 80000000 0 20000000
02000000 0 a0000000 a0000000 0 10000000
@@ -212,7 +211,7 @@
compatible = "mpc5200-spi";
reg = <f00 20>;
interrupts = <2 d 0 2 e 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
};
usb@1000 {
@@ -220,7 +219,7 @@
compatible = "mpc5200-ohci\0ohci-be";
reg = <1000 ff>;
interrupts = <2 6 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
};
bestcomm@1200 {
@@ -231,7 +230,7 @@
3 4 0 3 5 0 3 6 0 3 7 0
3 8 0 3 9 0 3 a 0 3 b 0
3 c 0 3 d 0 3 e 0 3 f 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
};
xlb@1f00 {
@@ -246,7 +245,7 @@
cell-index = <0>;
reg = <2000 100>;
interrupts = <2 1 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
};
// PSC2 in ac97 mode example
@@ -256,7 +255,7 @@
// cell-index = <1>;
// reg = <2200 100>;
// interrupts = <2 2 0>;
- // interrupt-parent = <500>;
+ // interrupt-parent = <&mpc5200_pic>;
//};
// PSC3 in CODEC mode example
@@ -266,7 +265,7 @@
// cell-index = <2>;
// reg = <2400 100>;
// interrupts = <2 3 0>;
- // interrupt-parent = <500>;
+ // interrupt-parent = <&mpc5200_pic>;
//};
// PSC4 in uart mode example
@@ -276,7 +275,7 @@
// cell-index = <3>;
// reg = <2600 100>;
// interrupts = <2 b 0>;
- // interrupt-parent = <500>;
+ // interrupt-parent = <&mpc5200_pic>;
//};
// PSC5 in uart mode example
@@ -286,7 +285,7 @@
// cell-index = <4>;
// reg = <2800 100>;
// interrupts = <2 c 0>;
- // interrupt-parent = <500>;
+ // interrupt-parent = <&mpc5200_pic>;
//};
// PSC6 in spi mode example
@@ -296,7 +295,7 @@
// cell-index = <5>;
// reg = <2c00 100>;
// interrupts = <2 4 0>;
- // interrupt-parent = <500>;
+ // interrupt-parent = <&mpc5200_pic>;
//};
ethernet@3000 {
@@ -305,7 +304,7 @@
reg = <3000 800>;
mac-address = [ 02 03 04 05 06 07 ]; // Bad!
interrupts = <2 5 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
};
ata@3a00 {
@@ -313,7 +312,7 @@
compatible = "mpc5200-ata";
reg = <3a00 100>;
interrupts = <2 7 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
};
i2c@3d00 {
@@ -322,7 +321,7 @@
cell-index = <0>;
reg = <3d00 40>;
interrupts = <2 f 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
fsl5200-clocking;
};
@@ -332,7 +331,7 @@
cell-index = <1>;
reg = <3d40 40>;
interrupts = <2 10 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
fsl5200-clocking;
};
sram@8000 {
diff --git a/arch/powerpc/boot/dts/lite5200b.dts b/arch/powerpc/boot/dts/lite5200b.dts
index 00211b3..5185625 100644
--- a/arch/powerpc/boot/dts/lite5200b.dts
+++ b/arch/powerpc/boot/dts/lite5200b.dts
@@ -62,13 +62,12 @@
reg = <200 38>;
};
- pic@500 {
+ mpc5200_pic: pic@500 {
// 5200 interrupts are encoded into two levels;
- linux,phandle = <500>;
interrupt-controller;
#interrupt-cells = <3>;
device_type = "interrupt-controller";
- compatible = "mpc5200b-pic\0mpc5200-pic";
+ compatible = "mpc5200b-pic\0mpc5200_pic";
reg = <500 80>;
built-in;
};
@@ -79,7 +78,7 @@
cell-index = <0>;
reg = <600 10>;
interrupts = <1 9 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
has-wdt;
};
@@ -89,7 +88,7 @@
cell-index = <1>;
reg = <610 10>;
interrupts = <1 a 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
};
gpt@620 { // General Purpose Timer
@@ -98,7 +97,7 @@
cell-index = <2>;
reg = <620 10>;
interrupts = <1 b 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
};
gpt@630 { // General Purpose Timer
@@ -107,7 +106,7 @@
cell-index = <3>;
reg = <630 10>;
interrupts = <1 c 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
};
gpt@640 { // General Purpose Timer
@@ -116,7 +115,7 @@
cell-index = <4>;
reg = <640 10>;
interrupts = <1 d 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
};
gpt@650 { // General Purpose Timer
@@ -125,7 +124,7 @@
cell-index = <5>;
reg = <650 10>;
interrupts = <1 e 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
};
gpt@660 { // General Purpose Timer
@@ -134,7 +133,7 @@
cell-index = <6>;
reg = <660 10>;
interrupts = <1 f 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
};
gpt@670 { // General Purpose Timer
@@ -143,7 +142,7 @@
cell-index = <7>;
reg = <670 10>;
interrupts = <1 10 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
};
rtc@800 { // Real time clock
@@ -151,7 +150,7 @@
device_type = "rtc";
reg = <800 100>;
interrupts = <1 5 0 1 6 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
};
mscan@900 {
@@ -159,7 +158,7 @@
compatible = "mpc5200b-mscan\0mpc5200-mscan";
cell-index = <0>;
interrupts = <2 11 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
reg = <900 80>;
};
@@ -168,7 +167,7 @@
compatible = "mpc5200b-mscan\0mpc5200-mscan";
cell-index = <1>;
interrupts = <2 12 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
reg = <980 80>;
};
@@ -176,14 +175,14 @@
compatible = "mpc5200b-gpio\0mpc5200-gpio";
reg = <b00 40>;
interrupts = <1 7 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
};
gpio-wkup@c00 {
compatible = "mpc5200b-gpio-wkup\0mpc5200-gpio-wkup";
reg = <c00 40>;
interrupts = <1 8 0 0 3 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
};
pci@0d00 {
@@ -194,18 +193,18 @@
compatible = "mpc5200b-pci\0mpc5200-pci";
reg = <d00 100>;
interrupt-map-mask = <f800 0 0 7>;
- interrupt-map = <c000 0 0 1 500 0 0 3 // 1st slot
- c000 0 0 2 500 1 1 3
- c000 0 0 3 500 1 2 3
- c000 0 0 4 500 1 3 3
-
- c800 0 0 1 500 1 1 3 // 2nd slot
- c800 0 0 2 500 1 2 3
- c800 0 0 3 500 1 3 3
- c800 0 0 4 500 0 0 3>;
+ interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
+ c000 0 0 2 &mpc5200_pic 1 1 3
+ c000 0 0 3 &mpc5200_pic 1 2 3
+ c000 0 0 4 &mpc5200_pic 1 3 3
+
+ c800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
+ c800 0 0 2 &mpc5200_pic 1 2 3
+ c800 0 0 3 &mpc5200_pic 1 3 3
+ c800 0 0 4 &mpc5200_pic 0 0 3>;
clock-frequency = <0>; // From boot loader
interrupts = <2 8 0 2 9 0 2 a 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
bus-range = <0 0>;
ranges = <42000000 0 80000000 80000000 0 20000000
02000000 0 a0000000 a0000000 0 10000000
@@ -217,7 +216,7 @@
compatible = "mpc5200b-spi\0mpc5200-spi";
reg = <f00 20>;
interrupts = <2 d 0 2 e 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
};
usb@1000 {
@@ -225,7 +224,7 @@
compatible = "mpc5200b-ohci\0mpc5200-ohci\0ohci-be";
reg = <1000 ff>;
interrupts = <2 6 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
};
bestcomm@1200 {
@@ -236,7 +235,7 @@
3 4 0 3 5 0 3 6 0 3 7 0
3 8 0 3 9 0 3 a 0 3 b 0
3 c 0 3 d 0 3 e 0 3 f 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
};
xlb@1f00 {
@@ -251,7 +250,7 @@
cell-index = <0>;
reg = <2000 100>;
interrupts = <2 1 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
};
// PSC2 in ac97 mode example
@@ -261,7 +260,7 @@
// cell-index = <1>;
// reg = <2200 100>;
// interrupts = <2 2 0>;
- // interrupt-parent = <500>;
+ // interrupt-parent = <&mpc5200_pic>;
//};
// PSC3 in CODEC mode example
@@ -271,7 +270,7 @@
// cell-index = <2>;
// reg = <2400 100>;
// interrupts = <2 3 0>;
- // interrupt-parent = <500>;
+ // interrupt-parent = <&mpc5200_pic>;
//};
// PSC4 in uart mode example
@@ -281,7 +280,7 @@
// cell-index = <3>;
// reg = <2600 100>;
// interrupts = <2 b 0>;
- // interrupt-parent = <500>;
+ // interrupt-parent = <&mpc5200_pic>;
//};
// PSC5 in uart mode example
@@ -291,7 +290,7 @@
// cell-index = <4>;
// reg = <2800 100>;
// interrupts = <2 c 0>;
- // interrupt-parent = <500>;
+ // interrupt-parent = <&mpc5200_pic>;
//};
// PSC6 in spi mode example
@@ -301,7 +300,7 @@
// cell-index = <5>;
// reg = <2c00 100>;
// interrupts = <2 4 0>;
- // interrupt-parent = <500>;
+ // interrupt-parent = <&mpc5200_pic>;
//};
ethernet@3000 {
@@ -310,7 +309,7 @@
reg = <3000 800>;
mac-address = [ 02 03 04 05 06 07 ]; // Bad!
interrupts = <2 5 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
};
ata@3a00 {
@@ -318,7 +317,7 @@
compatible = "mpc5200b-ata\0mpc5200-ata";
reg = <3a00 100>;
interrupts = <2 7 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
};
i2c@3d00 {
@@ -327,7 +326,7 @@
cell-index = <0>;
reg = <3d00 40>;
interrupts = <2 f 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
fsl5200-clocking;
};
@@ -337,7 +336,7 @@
cell-index = <1>;
reg = <3d40 40>;
interrupts = <2 10 0>;
- interrupt-parent = <500>;
+ interrupt-parent = <&mpc5200_pic>;
fsl5200-clocking;
};
sram@8000 {
diff --git a/arch/powerpc/boot/dts/mpc7448hpc2.dts b/arch/powerpc/boot/dts/mpc7448hpc2.dts
index 6fa3754..765c306 100644
--- a/arch/powerpc/boot/dts/mpc7448hpc2.dts
+++ b/arch/powerpc/boot/dts/mpc7448hpc2.dts
@@ -16,12 +16,10 @@
compatible = "mpc74xx";
#address-cells = <1>;
#size-cells = <1>;
- linux,phandle = <100>;
cpus {
#address-cells = <1>;
#size-cells =<0>;
- linux,phandle = <200>;
PowerPC,7448@0 {
device_type = "cpu";
@@ -34,13 +32,11 @@
clock-frequency = <0>; // From U-Boot
bus-frequency = <0>; // From U-Boot
32-bit;
- linux,phandle = <201>;
};
};
memory {
device_type = "memory";
- linux,phandle = <300>;
reg = <00000000 20000000 // DDR2 512M at 0
>;
};
@@ -55,7 +51,7 @@
bus-frequency = <0>;
i2c@7000 {
- interrupt-parent = <7400>;
+ interrupt-parent = <&mpic>;
interrupts = <E 0>;
reg = <7000 400>;
device_type = "i2c";
@@ -66,18 +62,16 @@
device_type = "mdio";
compatible = "tsi-ethernet";
- ethernet-phy@6000 {
- linux,phandle = <6000>;
- interrupt-parent = <7400>;
+ phy8: ethernet-phy@6000 {
+ interrupt-parent = <&mpic>;
interrupts = <2 1>;
reg = <6000 50>;
phy-id = <8>;
device_type = "ethernet-phy";
};
- ethernet-phy@6400 {
- linux,phandle = <6400>;
- interrupt-parent = <7400>;
+ phy9: ethernet-phy@6400 {
+ interrupt-parent = <&mpic>;
interrupts = <2 1>;
reg = <6000 50>;
phy-id = <9>;
@@ -94,8 +88,8 @@
reg = <6000 200>;
address = [ 00 06 D2 00 00 01 ];
interrupts = <10 2>;
- interrupt-parent = <7400>;
- phy-handle = <6000>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy8>;
};
ethernet@6600 {
@@ -107,8 +101,8 @@
reg = <6400 200>;
address = [ 00 06 D2 00 00 02 ];
interrupts = <11 2>;
- interrupt-parent = <7400>;
- phy-handle = <6400>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy9>;
};
serial@7808 {
@@ -117,7 +111,7 @@
reg = <7808 200>;
clock-frequency = <3f6b5a00>;
interrupts = <c 0>;
- interrupt-parent = <7400>;
+ interrupt-parent = <&mpic>;
};
serial@7c08 {
@@ -126,11 +120,10 @@
reg = <7c08 200>;
clock-frequency = <3f6b5a00>;
interrupts = <d 0>;
- interrupt-parent = <7400>;
+ interrupt-parent = <&mpic>;
};
- pic@7400 {
- linux,phandle = <7400>;
+ mpic: pic@7400 {
clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
@@ -144,7 +137,6 @@
pci@1000 {
compatible = "tsi10x";
device_type = "pci";
- linux,phandle = <1000>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
@@ -153,37 +145,37 @@
ranges = <02000000 0 e0000000 e0000000 0 1A000000
01000000 0 00000000 fa000000 0 00010000>;
clock-frequency = <7f28154>;
- interrupt-parent = <7400>;
+ interrupt-parent = <&mpic>;
interrupts = <17 2>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x11 */
- 0800 0 0 1 1180 24 0
- 0800 0 0 2 1180 25 0
- 0800 0 0 3 1180 26 0
- 0800 0 0 4 1180 27 0
+ 0800 0 0 1 &RT0 24 0
+ 0800 0 0 2 &RT0 25 0
+ 0800 0 0 3 &RT0 26 0
+ 0800 0 0 4 &RT0 27 0
/* IDSEL 0x12 */
- 1000 0 0 1 1180 25 0
- 1000 0 0 2 1180 26 0
- 1000 0 0 3 1180 27 0
- 1000 0 0 4 1180 24 0
+ 1000 0 0 1 &RT0 25 0
+ 1000 0 0 2 &RT0 26 0
+ 1000 0 0 3 &RT0 27 0
+ 1000 0 0 4 &RT0 24 0
/* IDSEL 0x13 */
- 1800 0 0 1 1180 26 0
- 1800 0 0 2 1180 27 0
- 1800 0 0 3 1180 24 0
- 1800 0 0 4 1180 25 0
+ 1800 0 0 1 &RT0 26 0
+ 1800 0 0 2 &RT0 27 0
+ 1800 0 0 3 &RT0 24 0
+ 1800 0 0 4 &RT0 25 0
/* IDSEL 0x14 */
- 2000 0 0 1 1180 27 0
- 2000 0 0 2 1180 24 0
- 2000 0 0 3 1180 25 0
- 2000 0 0 4 1180 26 0
+ 2000 0 0 1 &RT0 27 0
+ 2000 0 0 2 &RT0 24 0
+ 2000 0 0 3 &RT0 25 0
+ 2000 0 0 4 &RT0 26 0
>;
- router@1180 {
- linux,phandle = <1180>;
+
+ RT0: router@1180 {
clock-frequency = <0>;
interrupt-controller;
device_type = "pic-router";
@@ -192,7 +184,7 @@
built-in;
big-endian;
interrupts = <17 2>;
- interrupt-parent = <7400>;
+ interrupt-parent = <&mpic>;
};
};
};
diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts
index f261d64..d91e81c 100644
--- a/arch/powerpc/boot/dts/mpc8540ads.dts
+++ b/arch/powerpc/boot/dts/mpc8540ads.dts
@@ -48,6 +48,22 @@
reg = <e0000000 00100000>; // CCSRBAR 1M
bus-frequency = <0>;
+ memory-controller@2000 {
+ compatible = "fsl,8540-memory-controller";
+ reg = <2000 1000>;
+ interrupt-parent = <&mpic>;
+ interrupts = <2 2>;
+ };
+
+ l2-cache-controller@20000 {
+ compatible = "fsl,8540-l2-cache-controller";
+ reg = <20000 1000>;
+ cache-line-size = <20>; // 32 bytes
+ cache-size = <40000>; // L2, 256K
+ interrupt-parent = <&mpic>;
+ interrupts = <0 2>;
+ };
+
i2c@3000 {
device_type = "i2c";
compatible = "fsl-i2c";
diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts
index 5fdcb69..4f2c3af 100644
--- a/arch/powerpc/boot/dts/mpc8541cds.dts
+++ b/arch/powerpc/boot/dts/mpc8541cds.dts
@@ -48,6 +48,22 @@
reg = <e0000000 00100000>; // CCSRBAR 1M
bus-frequency = <0>;
+ memory-controller@2000 {
+ compatible = "fsl,8541-memory-controller";
+ reg = <2000 1000>;
+ interrupt-parent = <&mpic>;
+ interrupts = <2 2>;
+ };
+
+ l2-cache-controller@20000 {
+ compatible = "fsl,8541-l2-cache-controller";
+ reg = <20000 1000>;
+ cache-line-size = <20>; // 32 bytes
+ cache-size = <40000>; // L2, 256K
+ interrupt-parent = <&mpic>;
+ interrupts = <0 2>;
+ };
+
i2c@3000 {
device_type = "i2c";
compatible = "fsl-i2c";
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/mpc8544ds.dts
index 6b08460..3033599 100644
--- a/arch/powerpc/boot/dts/mpc8544ds.dts
+++ b/arch/powerpc/boot/dts/mpc8544ds.dts
@@ -48,6 +48,22 @@
reg = <e0000000 00100000>; // CCSRBAR 1M
bus-frequency = <0>; // Filled out by uboot.
+ memory-controller@2000 {
+ compatible = "fsl,8544-memory-controller";
+ reg = <2000 1000>;
+ interrupt-parent = <&mpic>;
+ interrupts = <2 2>;
+ };
+
+ l2-cache-controller@20000 {
+ compatible = "fsl,8544-l2-cache-controller";
+ reg = <20000 1000>;
+ cache-line-size = <20>; // 32 bytes
+ cache-size = <40000>; // L2, 256K
+ interrupt-parent = <&mpic>;
+ interrupts = <0 2>;
+ };
+
i2c@3000 {
device_type = "i2c";
compatible = "fsl-i2c";
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts
index b2b2200..ad96381 100644
--- a/arch/powerpc/boot/dts/mpc8548cds.dts
+++ b/arch/powerpc/boot/dts/mpc8548cds.dts
@@ -48,6 +48,22 @@
reg = <e0000000 00100000>; // CCSRBAR 1M
bus-frequency = <0>;
+ memory-controller@2000 {
+ compatible = "fsl,8548-memory-controller";
+ reg = <2000 1000>;
+ interrupt-parent = <&mpic>;
+ interrupts = <2 2>;
+ };
+
+ l2-cache-controller@20000 {
+ compatible = "fsl,8548-l2-cache-controller";
+ reg = <20000 1000>;
+ cache-line-size = <20>; // 32 bytes
+ cache-size = <80000>; // L2, 512K
+ interrupt-parent = <&mpic>;
+ interrupts = <0 2>;
+ };
+
i2c@3000 {
device_type = "i2c";
compatible = "fsl-i2c";
diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts
index 68a4795..951ed92 100644
--- a/arch/powerpc/boot/dts/mpc8555cds.dts
+++ b/arch/powerpc/boot/dts/mpc8555cds.dts
@@ -48,6 +48,22 @@
reg = <e0000000 00100000>; // CCSRBAR 1M
bus-frequency = <0>;
+ memory-controller@2000 {
+ compatible = "fsl,8555-memory-controller";
+ reg = <2000 1000>;
+ interrupt-parent = <&mpic>;
+ interrupts = <2 2>;
+ };
+
+ l2-cache-controller@20000 {
+ compatible = "fsl,8555-l2-cache-controller";
+ reg = <20000 1000>;
+ cache-line-size = <20>; // 32 bytes
+ cache-size = <40000>; // L2, 256K
+ interrupt-parent = <&mpic>;
+ interrupts = <0 2>;
+ };
+
i2c@3000 {
device_type = "i2c";
compatible = "fsl-i2c";
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts
index 1f2afe9..8068215 100644
--- a/arch/powerpc/boot/dts/mpc8560ads.dts
+++ b/arch/powerpc/boot/dts/mpc8560ads.dts
@@ -48,6 +48,22 @@
reg = <e0000000 00000200>;
bus-frequency = <13ab6680>;
+ memory-controller@2000 {
+ compatible = "fsl,8540-memory-controller";
+ reg = <2000 1000>;
+ interrupt-parent = <&mpic>;
+ interrupts = <2 2>;
+ };
+
+ l2-cache-controller@20000 {
+ compatible = "fsl,8540-l2-cache-controller";
+ reg = <20000 1000>;
+ cache-line-size = <20>; // 32 bytes
+ cache-size = <40000>; // L2, 256K
+ interrupt-parent = <&mpic>;
+ interrupts = <0 2>;
+ };
+
mdio@24520 {
device_type = "mdio";
compatible = "gianfar";
@@ -110,7 +126,7 @@
#address-cells = <3>;
compatible = "85xx";
device_type = "pci";
- reg = <8000 400>;
+ reg = <8000 1000>;
clock-frequency = <3f940aa>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts
index 948a3b6..a123ec9 100644
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -57,6 +57,22 @@
reg = <e0000000 00100000>;
bus-frequency = <0>;
+ memory-controller@2000 {
+ compatible = "fsl,8568-memory-controller";
+ reg = <2000 1000>;
+ interrupt-parent = <&mpic>;
+ interrupts = <2 2>;
+ };
+
+ l2-cache-controller@20000 {
+ compatible = "fsl,8568-l2-cache-controller";
+ reg = <20000 1000>;
+ cache-line-size = <20>; // 32 bytes
+ cache-size = <80000>; // L2, 512K
+ interrupt-parent = <&mpic>;
+ interrupts = <0 2>;
+ };
+
i2c@3000 {
device_type = "i2c";
compatible = "fsl-i2c";
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 9cb24d2..6ef87fb 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -836,7 +836,7 @@ static struct cpu_spec cpu_specs[] = {
.pvr_mask = 0xffff0000,
.pvr_value = 0x80040000,
.cpu_name = "7448",
- .cpu_features = CPU_FTRS_7447A,
+ .cpu_features = CPU_FTRS_7448,
.cpu_user_features = COMMON_USER |
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
.icache_bsize = 32,
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index c29d165..4074c0b 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -596,7 +596,11 @@ fast_exception_return:
mr r12,r4 /* restart at exc_exit_restart */
b 2b
- .comm fee_restarts,4
+ .section .bss
+ .align 2
+fee_restarts:
+ .space 4
+ .previous
/* aargh, a nonrecoverable interrupt, panic */
/* aargh, we don't know which trap this is */
@@ -851,7 +855,11 @@ load_dbcr0:
mtspr SPRN_DBSR,r11 /* clear all pending debug events */
blr
- .comm global_dbcr0,8
+ .section .bss
+ .align 4
+global_dbcr0:
+ .space 8
+ .previous
#endif /* !(CONFIG_4xx || CONFIG_BOOKE) */
do_work: /* r10 contains MSR_KERNEL here */
@@ -926,7 +934,11 @@ END_FTR_SECTION_IFSET(CPU_FTR_601)
/* shouldn't return */
b 4b
- .comm ee_restarts,4
+ .section .bss
+ .align 2
+ee_restarts:
+ .space 4
+ .previous
/*
* PROM code for specific machines follows. Put it
diff --git a/arch/powerpc/lib/rheap.c b/arch/powerpc/lib/rheap.c
index b2f6dcc..180ee29 100644
--- a/arch/powerpc/lib/rheap.c
+++ b/arch/powerpc/lib/rheap.c
@@ -468,25 +468,19 @@ unsigned long rh_alloc_align(rh_info_t * info, int size, int alignment, const ch
if (blk->size == size) {
/* Move from free list to taken list */
list_del(&blk->list);
- blk->owner = owner;
- start = blk->start;
-
- attach_taken_block(info, blk);
+ newblk = blk;
+ } else {
+ newblk = get_slot(info);
+ newblk->start = blk->start;
+ newblk->size = size;
- return start;
+ /* blk still in free list, with updated start, size */
+ blk->start += size;
+ blk->size -= size;
}
- newblk = get_slot(info);
- newblk->start = blk->start;
- newblk->size = size;
newblk->owner = owner;
-
- /* blk still in free list, with updated start, size */
- blk->start += size;
- blk->size -= size;
-
start = newblk->start;
-
attach_taken_block(info, newblk);
/* for larger alignment return fixed up pointer */
diff --git a/arch/powerpc/mm/hash_low_32.S b/arch/powerpc/mm/hash_low_32.S
index ddceefc..7f830a4 100644
--- a/arch/powerpc/mm/hash_low_32.S
+++ b/arch/powerpc/mm/hash_low_32.S
@@ -30,7 +30,11 @@
#include <asm/asm-offsets.h>
#ifdef CONFIG_SMP
- .comm mmu_hash_lock,4
+ .section .bss
+ .align 2
+ .globl mmu_hash_lock
+mmu_hash_lock:
+ .space 4
#endif /* CONFIG_SMP */
/*
@@ -455,9 +459,15 @@ found_slot:
sync /* make sure pte updates get to memory */
blr
- .comm next_slot,4
- .comm primary_pteg_full,4
- .comm htab_hash_searches,4
+ .section .bss
+ .align 2
+next_slot:
+ .space 4
+primary_pteg_full:
+ .space 4
+htab_hash_searches:
+ .space 4
+ .previous
/*
* Flush the entry for a particular page from the hash table.
diff --git a/arch/ppc/kernel/entry.S b/arch/ppc/kernel/entry.S
index ab64256..fba7ca1 100644
--- a/arch/ppc/kernel/entry.S
+++ b/arch/ppc/kernel/entry.S
@@ -596,7 +596,11 @@ fast_exception_return:
mr r12,r4 /* restart at exc_exit_restart */
b 2b
- .comm fee_restarts,4
+ .section .bss
+ .align 2
+fee_restarts:
+ .space 4
+ .previous
/* aargh, a nonrecoverable interrupt, panic */
/* aargh, we don't know which trap this is */
@@ -851,7 +855,11 @@ load_dbcr0:
mtspr SPRN_DBSR,r11 /* clear all pending debug events */
blr
- .comm global_dbcr0,8
+ .section .bss
+ .align 4
+global_dbcr0:
+ .space 8
+ .previous
#endif /* !(CONFIG_4xx || CONFIG_BOOKE) */
do_work: /* r10 contains MSR_KERNEL here */
@@ -926,4 +934,8 @@ END_FTR_SECTION_IFSET(CPU_FTR_601)
/* shouldn't return */
b 4b
- .comm ee_restarts,4
+ .section .bss
+ .align 2
+ee_restarts:
+ .space 4
+ .previous
diff --git a/arch/ppc/mm/hashtable.S b/arch/ppc/mm/hashtable.S
index e756942..fc30b6f 100644
--- a/arch/ppc/mm/hashtable.S
+++ b/arch/ppc/mm/hashtable.S
@@ -30,7 +30,11 @@
#include <asm/asm-offsets.h>
#ifdef CONFIG_SMP
- .comm mmu_hash_lock,4
+ .section .bss
+ .align 2
+ .globl mmu_hash_lock
+mmu_hash_lock:
+ .space 4
#endif /* CONFIG_SMP */
/*
@@ -461,9 +465,15 @@ found_slot:
sync /* make sure pte updates get to memory */
blr
- .comm next_slot,4
- .comm primary_pteg_full,4
- .comm htab_hash_searches,4
+ .section .bss
+ .align 2
+next_slot:
+ .space 4
+primary_pteg_full:
+ .space 4
+htab_hash_searches:
+ .space 4
+ .previous
/*
* Flush the entry for a particular page from the hash table.
diff --git a/arch/ppc/syslib/pq2_sys.c b/arch/ppc/syslib/pq2_sys.c
index f52600c..9c85300 100644
--- a/arch/ppc/syslib/pq2_sys.c
+++ b/arch/ppc/syslib/pq2_sys.c
@@ -26,7 +26,7 @@ struct ppc_sys_spec ppc_sys_specs[] = {
{
MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
- MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
+ MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC2, MPC82xx_CPM_SMC1,
MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
}
},
@@ -39,7 +39,7 @@ struct ppc_sys_spec ppc_sys_specs[] = {
{
MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SCC4,
- MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2,
+ MPC82xx_CPM_MCC2, MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2,
MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
}
},
@@ -47,52 +47,56 @@ struct ppc_sys_spec ppc_sys_specs[] = {
.ppc_sys_name = "8260",
.mask = 0x0000ff00,
.value = 0x00000000,
- .num_devices = 12,
+ .num_devices = 13,
.device_list = (enum ppc_sys_devices[])
{
MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
- MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
- MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
+ MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_MCC2,
+ MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI,
+ MPC82xx_CPM_I2C,
}
},
{
.ppc_sys_name = "8264",
.mask = 0x0000ff00,
.value = 0x00000000,
- .num_devices = 12,
+ .num_devices = 13,
.device_list = (enum ppc_sys_devices[])
{
MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
- MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
- MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
+ MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_MCC2,
+ MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI,
+ MPC82xx_CPM_I2C,
}
},
{
.ppc_sys_name = "8265",
.mask = 0x0000ff00,
.value = 0x00000000,
- .num_devices = 12,
+ .num_devices = 13,
.device_list = (enum ppc_sys_devices[])
{
MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
- MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
- MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
+ MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_MCC2,
+ MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI,
+ MPC82xx_CPM_I2C,
}
},
{
.ppc_sys_name = "8266",
.mask = 0x0000ff00,
.value = 0x00000000,
- .num_devices = 12,
+ .num_devices = 13,
.device_list = (enum ppc_sys_devices[])
{
MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
- MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
- MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
+ MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_MCC2,
+ MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI,
+ MPC82xx_CPM_I2C,
}
},
/* below is a list of the 8272 family of processors */
@@ -159,7 +163,7 @@ struct ppc_sys_spec ppc_sys_specs[] = {
{
MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
- MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
+ MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC2, MPC82xx_CPM_SMC1,
MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
},
},
@@ -172,7 +176,7 @@ struct ppc_sys_spec ppc_sys_specs[] = {
{
MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
- MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
+ MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC2, MPC82xx_CPM_SMC1,
MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
},
},
diff --git a/drivers/char/watchdog/booke_wdt.c b/drivers/char/watchdog/booke_wdt.c
index 0e23f29..0f5c77d 100644
--- a/drivers/char/watchdog/booke_wdt.c
+++ b/drivers/char/watchdog/booke_wdt.c
@@ -24,7 +24,7 @@
#include <asm/uaccess.h>
#include <asm/system.h>
-/* If the kernel parameter wdt_enable=1, the watchdog will be enabled at boot.
+/* If the kernel parameter wdt=1, the watchdog will be enabled at boot.
* Also, the wdt_period sets the watchdog timer period timeout.
* For E500 cpus the wdt_period sets which bit changing from 0->1 will
* trigger a watchog timeout. This watchdog timeout will occur 3 times, the
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h
index 4345249..82d595a 100644
--- a/include/asm-powerpc/cputable.h
+++ b/include/asm-powerpc/cputable.h
@@ -302,6 +302,12 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start,
CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \
CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | \
CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE)
+#define CPU_FTRS_7448 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
+ CPU_FTR_USE_TB | \
+ CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \
+ CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \
+ CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | \
+ CPU_FTR_PPC_LE)
#define CPU_FTRS_82XX (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB)
#define CPU_FTRS_G2_LE (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | \
diff --git a/include/asm-powerpc/mpc8260.h b/include/asm-powerpc/mpc8260.h
index f1b83b0..e0d4807 100644
--- a/include/asm-powerpc/mpc8260.h
+++ b/include/asm-powerpc/mpc8260.h
@@ -5,8 +5,8 @@
* this one and the configuration switching is done here.
*/
#ifdef __KERNEL__
-#ifndef __ASM_PPC_MPC8260_H__
-#define __ASM_PPC_MPC8260_H__
+#ifndef __ASM_POWERPC_MPC8260_H__
+#define __ASM_POWERPC_MPC8260_H__
#ifdef CONFIG_8260
@@ -20,5 +20,5 @@
#endif
#endif /* CONFIG_8260 */
-#endif /* !__ASM_PPC_MPC8260_H__ */
+#endif /* !__ASM_POWERPC_MPC8260_H__ */
#endif /* __KERNEL__ */
diff --git a/include/asm-powerpc/pmac_feature.h b/include/asm-powerpc/pmac_feature.h
index d43d91b..26bcb0a 100644
--- a/include/asm-powerpc/pmac_feature.h
+++ b/include/asm-powerpc/pmac_feature.h
@@ -28,8 +28,8 @@
*/
#ifdef __KERNEL__
-#ifndef __PPC_ASM_PMAC_FEATURE_H
-#define __PPC_ASM_PMAC_FEATURE_H
+#ifndef __ASM_POWERPC_PMAC_FEATURE_H
+#define __ASM_POWERPC_PMAC_FEATURE_H
#include <asm/macio.h>
#include <asm/machdep.h>
@@ -393,5 +393,5 @@ extern u32 __iomem *uninorth_base;
#define UN_BIC(r,v) (UN_OUT((r), UN_IN(r) & ~(v)))
-#endif /* __PPC_ASM_PMAC_FEATURE_H */
+#endif /* __ASM_POWERPC_PMAC_FEATURE_H */
#endif /* __KERNEL__ */
diff --git a/include/asm-powerpc/tsi108_irq.h b/include/asm-powerpc/tsi108_irq.h
index 3e4d04e..6ed9397 100644
--- a/include/asm-powerpc/tsi108_irq.h
+++ b/include/asm-powerpc/tsi108_irq.h
@@ -26,8 +26,8 @@
* demultiplexing on TSI108EMU/SVB boards.
*/
-#ifndef _ASM_PPC_TSI108_IRQ_H
-#define _ASM_PPC_TSI108_IRQ_H
+#ifndef _ASM_POWERPC_TSI108_IRQ_H
+#define _ASM_POWERPC_TSI108_IRQ_H
/*
* Tsi108 interrupts
@@ -121,4 +121,4 @@ typedef enum {
TSI108_IRQ_DIRECTED,
TSI108_IRQ_DISTRIBUTED,
} TSI108_IRQ_MODE;
-#endif /* _ASM_PPC_TSI108_IRQ_H */
+#endif /* _ASM_POWERPC_TSI108_IRQ_H */
diff --git a/include/asm-powerpc/tsi108_pci.h b/include/asm-powerpc/tsi108_pci.h
index a9f92f7..5653d7c 100644
--- a/include/asm-powerpc/tsi108_pci.h
+++ b/include/asm-powerpc/tsi108_pci.h
@@ -18,8 +18,8 @@
* MA 02111-1307 USA
*/
-#ifndef _ASM_PPC_TSI108_PCI_H
-#define _ASM_PPC_TSI108_PCI_H
+#ifndef _ASM_POWERPC_TSI108_PCI_H
+#define _ASM_POWERPC_TSI108_PCI_H
#include <asm/tsi108.h>
@@ -42,4 +42,4 @@ extern void tsi108_pci_int_init(struct device_node *node);
extern void tsi108_irq_cascade(unsigned int irq, struct irq_desc *desc);
extern void tsi108_clear_pci_cfg_error(void);
-#endif /* _ASM_PPC_TSI108_PCI_H */
+#endif /* _ASM_POWERPC_TSI108_PCI_H */
diff --git a/include/asm-powerpc/unistd.h b/include/asm-powerpc/unistd.h
index 21f004a..908dfe4 100644
--- a/include/asm-powerpc/unistd.h
+++ b/include/asm-powerpc/unistd.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_PPC_UNISTD_H_
-#define _ASM_PPC_UNISTD_H_
+#ifndef _ASM_POWERPC_UNISTD_H_
+#define _ASM_POWERPC_UNISTD_H_
/*
* This file contains the system call numbers.
@@ -381,4 +381,4 @@
#endif /* __ASSEMBLY__ */
#endif /* __KERNEL__ */
-#endif /* _ASM_PPC_UNISTD_H_ */
+#endif /* _ASM_POWERPC_UNISTD_H_ */
^ permalink raw reply related
* Re: arch/powerpc/sysdev: dumping ground or only for shared drivers?
From: Olof Johansson @ 2007-05-15 22:25 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev, Paul Mackerras
In-Reply-To: <528646bc0705151519p5bcce91ctaaa4880cfc9e5902@mail.gmail.com>
On Tue, May 15, 2007 at 04:19:05PM -0600, Grant Likely wrote:
> On 5/15/07, Mark A. Greer <mgreer@mvista.com> wrote:
> > On Tue, May 15, 2007 at 04:06:40PM -0500, Kumar Gala wrote:
> > > If this is how we are going we should move some code from arch/
> > > powerpc/platforms into sysdev (for example the 5200 platform has its
> > > pic code and some other bits that would be candidate to move into
> > > sysdev).
> >
> > I like Paul's take as well and I don't like the idea of moving the
> > 5200 pci code, etc. to sysdev. I just can't explain why.
> >
> > But, I'll try anyway:
> >
> > The 5200 is an SoC so all the portions of that chip are tighly coupled
> > with the 5200. It doesn't make sense to put half of the 5200 code under
> > platforms and the other half under sysdev (unless the code is shared
> > with something that isn't a 5200).
>
> Actually, that's a good explaination
>
> I must agree. If there is little chance that the code will be used by
> any other platform, then don't split it up for the sake of (for
> example) putting all the pic code in the same place. I think there
> are fewer opportunities for confusion if only code that is actually
> shared goes in the shared directory. (ie. "how worried do I need to
> be about affecting other platforms when I modify this code?").
In other words, both of you agree with my original points, even though
Mark said first "I agree with Paul", and then gave the same reasons as
me for not putting non-shared stuff in sysdev. :-)
Anyway, I don't care enough to try to persuade anyone to change stance
on the question, I mostly wanted it clarified before it gets out of hand
in case it is NOT to be a dumping ground.
-Olof
^ permalink raw reply
* Re: [PATCH 4/9] powerpc: BestComm core support for Freescale MPC5200
From: Sylvain Munaut @ 2007-05-15 22:27 UTC (permalink / raw)
To: Kumar Gala; +Cc: Linux PPC dev ML
In-Reply-To: <781A28BA-63E5-41C4-93F7-B5C004F526AD@kernel.crashing.org>
Kumar Gala wrote:
>
> On May 12, 2007, at 3:31 PM, Sylvain Munaut wrote:
>
>> This patch adds support for the core of the BestComm API
>> for the Freescale MPC5200(b). The BestComm engine is a
>> microcode-controlled / tasks-based DMA used by several
>> of the onchip devices.
>>
>> Setting up the tasks / memory allocation and all common
>> low level functions are handled by this patch.
>> The specifics details of each tasks and their microcode
>> are split-out in separate patches.
>>
>> This is not the official API, but a much cleaner one.
>
> Can you give more detail about how the API works.
Yes, I'll try to write something that gives a little explanation for
Documentation/
In the mean time, here's a small informative text that
describe the API usage from a driver writer perspective :
You need to allocate yourself a task, depending on
what driver you're writing, that might be a generic
one or one dedicated to that device (depends on the
peripheral). For example FEC needs one TX and one RX
task, both specialized.
Each 'type' of task you can create has a specific
function to create it. For example, to create a new
instance of the FEC rx task, you call bcom_fec_rx_init.
It returns a (struct bcom_task*) that's gonna be your link
to bestcomm for all further calls.
Each task "type" needs a different init function because
depending on the microcode, the way to initialize it
is slightly different ...
Most task are buffer descriptor based (well ... currently,
they all are but that's not an obligation), and the
bestcomm API handle details of the BD ring commonly.
It assumes each buffer descriptor is formed by a
status word and a certain number of data pointers (1,2,..n).
The signification of each of theses data pointers and
of the status depends on the type of task. There is however
a convention in all tasks that the upper 4 bits of the status
are reserved for "Ready" flags and that the lsbs are for
the length (how much lsb depends of task ...)
When you need to submit a new buffer for sending, you just
call bcom_prepare_next_buffer(...) that returns you a pointer
to a (struct bcom_bd *) to fill up with the info you want
(most often just the lenght and data pointers ...).
When filled up, you just "push" the BD calling
bcom_submit_next_buffer(...). Each time a BD is completed,
bestcomm generates an interrupt and you just have to
call bcom_retrieve_buffer(...) to reclaim the BD that was
sent (along with the info needed to identify which one it is).
For receive task, it's more or less the same except you
submit empty buffer that bestcomm will fill up. And the
status word in the bd you recover by calling _retrieve is
gonna give you how many bytes were put into the buffer.
>
>> diff --git a/arch/powerpc/sysdev/bestcomm/Makefile
>> b/arch/powerpc/sysdev/bestcomm/Makefile
>> new file mode 100644
>> index 0000000..a24aa06
>> --- /dev/null
>> +++ b/arch/powerpc/sysdev/bestcomm/Makefile
>> @@ -0,0 +1,8 @@
>> +#
>> +# Makefile for BestComm & co
>> +#
>> +
>> +bestcomm-core-objs := bestcomm.o sram.o
>> +
>> +obj-$(CONFIG_PPC_BESTCOMM) += bestcomm-core.o
>
> Any reason why sram isn't on the ojb-$(CONFIG_PPC_BESTCOMM) line?
Huh, I want the module to be named bestcomm-core when built as modules,
is it possible to do it in another way ?
I'm not an expert as kbuild so if there is a better way ...
>>
>> +/* Debug Dump */
>> +
>> +#define BCOM_DPRINTK(a,b...) printk(KERN_DEBUG DRIVER_NAME ": " a,
>> ## b)
>
> We have dev_dbg and dev_printk can we not use them?
I don't use dev_dbg because I want the stuff printed even if DEBUG was
not defined when
compiling bestcomm-core.
Those are debug functions that a developer can call, from the driver, to
see what state bestcomm is
in. So when he calls them, the user expects them to print stuff,
regardless is DEBUG was defined
or not when compiling bestcomm-core ...
Same thing for pr_debug.
And dev_printk forces me to repeat "dev_printk(dev, KERN_DEBUG, " on
each line which makes
them very long ...
I could define BCOM_DPRINTK(a,b,...) as dev_printk(dev, KERN_DEBUG, ...)
if you think it's better.
>
> Would all bcom_dump_status(), bcom_dump_task(), bcom_dump_bdring be
> better using debugfs? At minimum there should be a Kconfig option to
> enable bestcomm debug that enables this code.
Theses are _never_ called ...
They are just there because when you work on a driver and something goes
wrong, it's useful to print debug info to see exactly what happened at
that exact moment.
So for example when working on the sound driver, some times I got an
interrupt but no buffer was finished, printing the bestcomm status at
that exact moment in the ISR when detecting that condition allowed me to
figure out what was going on. On the final submitted driver the call
will be removed ...
>> +/* Private API */
>> +
>
> What's private about it?
Driver code should not use it directly.
Only task support code should use it.
(basically anything outside sysdev/bestcomm/* should not include
bestcomm_priv.h)
> It would probably be good for the API functions to have DocBook style
> comments. See something like drivers/rapidio/rio.c for an example.
Yes that would be nice ... just need to write it ;)
>>
>> +void
>> +bcom_task_release(struct bcom_task *tsk)
> bcom_task_free() to match alloc/free semantics?
Ok, I'll change that.
>> +
>> +
>> +/* Public API */
>> +
> What's public about these?
Driver can use those ;)
Thanks for the comments.
Sylvain
^ permalink raw reply
* Re: arch/powerpc/sysdev: dumping ground or only for shared drivers?
From: Kumar Gala @ 2007-05-15 22:30 UTC (permalink / raw)
To: Olof Johansson; +Cc: linuxppc-dev, Paul Mackerras
In-Reply-To: <20070515222529.GA14881@lixom.net>
On May 15, 2007, at 5:25 PM, Olof Johansson wrote:
> On Tue, May 15, 2007 at 04:19:05PM -0600, Grant Likely wrote:
>> On 5/15/07, Mark A. Greer <mgreer@mvista.com> wrote:
>>> On Tue, May 15, 2007 at 04:06:40PM -0500, Kumar Gala wrote:
>>>> If this is how we are going we should move some code from arch/
>>>> powerpc/platforms into sysdev (for example the 5200 platform has
>>>> its
>>>> pic code and some other bits that would be candidate to move into
>>>> sysdev).
>>>
>>> I like Paul's take as well and I don't like the idea of moving the
>>> 5200 pci code, etc. to sysdev. I just can't explain why.
>>>
>>> But, I'll try anyway:
>>>
>>> The 5200 is an SoC so all the portions of that chip are tighly
>>> coupled
>>> with the 5200. It doesn't make sense to put half of the 5200
>>> code under
>>> platforms and the other half under sysdev (unless the code is shared
>>> with something that isn't a 5200).
>>
>> Actually, that's a good explaination
>>
>> I must agree. If there is little chance that the code will be
>> used by
>> any other platform, then don't split it up for the sake of (for
>> example) putting all the pic code in the same place. I think there
>> are fewer opportunities for confusion if only code that is actually
>> shared goes in the shared directory. (ie. "how worried do I need to
>> be about affecting other platforms when I modify this code?").
>
> In other words, both of you agree with my original points, even though
> Mark said first "I agree with Paul", and then gave the same reasons as
> me for not putting non-shared stuff in sysdev. :-)
>
> Anyway, I don't care enough to try to persuade anyone to change stance
> on the question, I mostly wanted it clarified before it gets out of
> hand
> in case it is NOT to be a dumping ground.
I was just hoping for consistency but I guess that's too much to ask
from all of us :)
I just pondered moving the ipic code only used by 83xx into platforms/
83xx, but decided I'm too lazy to issue to few git commands to
actually do this.
- k
^ permalink raw reply
* Re: Fix bug adding properties with flatdevtree.c's ft_set_prop()
From: David Gibson @ 2007-05-15 23:05 UTC (permalink / raw)
To: Mark A. Greer; +Cc: linuxppc-dev, Paul Mackerras
In-Reply-To: <20070515181140.GD17643@mag.az.mvista.com>
On Tue, May 15, 2007 at 11:11:40AM -0700, Mark A. Greer wrote:
> On Tue, May 15, 2007 at 10:26:48AM +1000, David Gibson wrote:
> > On Mon, May 14, 2007 at 11:28:16AM -0500, Scott Wood wrote:
> > > On Mon, May 14, 2007 at 01:13:57PM +1000, David Gibson wrote:
> > > > This patch corrects ft_set_prop() so that it adds new properties
> > > > before the first subnode, instead of before the END_NODE tag.
> > >
> > > Is there any reason not to just insert at the beginning of the node?
> >
> > Only that we have to search through the node first to see if the
> > property already exists, so we've already reached the end by the time
> > we know we need to insert.
>
> David, Jon,
>
> Does dtc guarantee that there aren't any properties after a subnode?
Yes.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply
* Re: arch/powerpc/sysdev: dumping ground or only for shared drivers?
From: Mark A. Greer @ 2007-05-15 23:56 UTC (permalink / raw)
To: Olof Johansson; +Cc: linuxppc-dev, Paul Mackerras
In-Reply-To: <20070515222529.GA14881@lixom.net>
On Tue, May 15, 2007 at 05:25:29PM -0500, Olof Johansson wrote:
> In other words, both of you agree with my original points, even though
> Mark said first "I agree with Paul", and then gave the same reasons as
> me for not putting non-shared stuff in sysdev. :-)
Hrm, you caught that, huh? :D
Mark
^ permalink raw reply
* Re: arch/powerpc/sysdev: dumping ground or only for shared drivers?
From: Mark A. Greer @ 2007-05-16 0:32 UTC (permalink / raw)
To: Mark A. Greer; +Cc: Olof Johansson, linuxppc-dev, Paul Mackerras
In-Reply-To: <20070515220616.GB2433@mag.az.mvista.com>
On Tue, May 15, 2007 at 03:06:16PM -0700, Mark A. Greer wrote:
> I like Paul's take as well and I don't like the idea of moving the
> 5200 pci code, etc. to sysdev. I just can't explain why.
Actually..."I have a doubt."
The more I think about it the more it makes sense to put the pic code,
etc. into sysdev (because of what Paul said). It also makes it
easier when making wholesale changes (i.e., something changes in the
irq infrastructure and all the pic files need to be changed).
Its also easier to compare all the pic files, say, to see which ones
need cleaning up.
When all of the factoring, etc. that we're doing is complete, we may
find that our platform files are very small and we'll no longer need
all the directories under platforms.
[See, if I change my mind, Olof can't say I'm using his argument anymore ;)]
Time for me to stfu.
Mark
^ permalink raw reply
* cell_defconfig: disable cpufreq and pmi
From: Christian Krafft @ 2007-05-16 0:33 UTC (permalink / raw)
To: linuxppc-dev@ozlabs.org; +Cc: krafft, cbe-oss-dev
[-- Attachment #1: Type: text/plain, Size: 1865 bytes --]
From: Christian Krafft <krafft@de.ibm.com>
Cpufreq using pmi is broken by a dependency issue, that
will be fixed in a seperate patch.
Bare-metal cpufreq is broken by hardware limitations.
As it was the only user, pmi is disabled as well.
Signed-off-by: Christian Krafft <krafft@de.ibm.com>
Index: linux/arch/powerpc/configs/cell_defconfig
===================================================================
--- linux.orig/arch/powerpc/configs/cell_defconfig
+++ linux/arch/powerpc/configs/cell_defconfig
@@ -163,7 +163,6 @@ CONFIG_SPU_FS=m
CONFIG_SPU_BASE=y
CONFIG_CBE_RAS=y
CONFIG_CBE_THERM=m
-CONFIG_CBE_CPUFREQ=m
CONFIG_PPC_NATIVE=y
CONFIG_UDBG_RTAS_CONSOLE=y
CONFIG_PPC_UDBG_BEAT=y
@@ -172,24 +171,12 @@ CONFIG_PPC_RTAS=y
# CONFIG_RTAS_ERROR_LOGGING is not set
CONFIG_RTAS_PROC=y
CONFIG_RTAS_FLASH=y
-CONFIG_PPC_PMI=m
+# CONFIG_PPC_PMI is not set
CONFIG_MMIO_NVRAM=y
# CONFIG_PPC_MPC106 is not set
# CONFIG_PPC_970_NAP is not set
CONFIG_PPC_INDIRECT_IO=y
CONFIG_GENERIC_IOMAP=y
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_TABLE=y
-CONFIG_CPU_FREQ_DEBUG=y
-CONFIG_CPU_FREQ_STAT=y
-# CONFIG_CPU_FREQ_STAT_DETAILS is not set
-CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
-# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
-CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
-CONFIG_CPU_FREQ_GOV_POWERSAVE=y
-CONFIG_CPU_FREQ_GOV_USERSPACE=y
-CONFIG_CPU_FREQ_GOV_ONDEMAND=y
-CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
# CONFIG_CPU_FREQ_PMAC64 is not set
# CONFIG_WANT_EARLY_SERIAL is not set
CONFIG_MPIC=y
--
Mit freundlichen Gruessen,
kind regards,
Christian Krafft
IBM Systems & Technology Group,
Linux Kernel Development
IT Specialist
Vorsitzender des Aufsichtsrats: Martin Jetter
Geschaeftsfuehrung: Herbert Kircher
Sitz der Gesellschaft: Boeblingen
Registriergericht: Amtsgericht Stuttgart, HRB 243294
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 189 bytes --]
^ permalink raw reply
* Re: [PATCH 2/3] Derive ebc ranges property from EBC registers
From: David Gibson @ 2007-05-15 23:09 UTC (permalink / raw)
To: Josh Boyer; +Cc: linuxppc-dev
In-Reply-To: <1179233998.3084.28.camel@zod.rchland.ibm.com>
On Tue, May 15, 2007 at 07:59:58AM -0500, Josh Boyer wrote:
> On Tue, 2007-05-15 at 14:54 +1000, David Gibson wrote:
> > void ebony_init(void *mac0, void *mac1)
> > Index: working-2.6/arch/powerpc/boot/dts/ebony.dts
> > ===================================================================
> > --- working-2.6.orig/arch/powerpc/boot/dts/ebony.dts 2007-05-14 14:38:39.000000000 +1000
> > +++ working-2.6/arch/powerpc/boot/dts/ebony.dts 2007-05-14 14:45:56.000000000 +1000
> > @@ -136,11 +136,9 @@
> > #address-cells = <2>;
> > #size-cells = <1>;
> > clock-frequency = <0>; // Filled in by zImage
> > - ranges = <0 00000000 fff00000 100000
> > - 1 00000000 48000000 100000
> > - 2 00000000 ff800000 400000
> > - 3 00000000 48200000 100000
> > - 7 00000000 48300000 100000>;
> > + // ranges property is supplied by zImage
> > + // based on firmware's configuration of the
> > + // EBC bridge
>
> Do we want a "ranges;" here as a placeholder? I don't see where it's
> absolutely required, but it makes me feel better for some reason...
Absolutely not. An empty ranges property indicates that the child bus
address space is the same as the parent bus address space. If we're
using the chip-select/offset addressing form for the EBC peripherals,
that's manifestly not the case.
> > +
> > +/* Read 4xx EBC bus bridge registers to get mappings of the peripheral
> > + * banks into the OPB address space */
> > +void ibm4xx_fixup_ebc_ranges(const char *ebc)
> > +{
> > + void *devp;
> > + u32 bxcr;
> > + u32 ranges[EBC_NUM_BANKS*4];
> > + u32 *p = ranges;
> > + int i;
> > +
> > + for (i = 0; i < EBC_NUM_BANKS; i++) {
> > + mtdcr(DCRN_EBC0_CFGADDR, EBC_BXCR(i));
> > + bxcr = mfdcr(DCRN_EBC0_CFGDATA);
> > +
> > + if ((bxcr & EBC_BXCR_BU) != EBC_BXCR_BU_OFF) {
> > + *p++ = i;
> > + *p++ = 0;
> > + *p++ = bxcr & EBC_BXCR_BAS;
> > + *p++ = EBC_BXCR_BANK_SIZE(bxcr);
> > + }
> > + }
> > +
> > + devp = finddevice(ebc);
> > + if (! devp)
> > + fatal("Couldn't locate EBC node %s\n\r", ebc);
> > +
> > + setprop(devp, "ranges", ranges, (p - ranges) * sizeof(u32));
> > +}
>
> So this sets the ranges for the EBC bus, but not the "regs" properties
> of the child nodes. Without that, the child nodes will not be mapped to
> the correct addresses...
Well, no, the child reg properties can't be deduced from the EBC
registers.
> Did you have a plan on how to fixup the child "regs" properties so that
> when the DIP switches are flipped around, the children show up
> correctly?
Well, on Ebony (AFAICT), the only child reg property that might need
adjustment is the small flash. My MTD enabling patch includes some
code in the boot wrapper to toggle the appropriate bit in it's reg
property.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply
* Re: [PATCH 3/3] Fixes to allow use of Ebony's flash chips through physmap_of
From: David Gibson @ 2007-05-15 23:10 UTC (permalink / raw)
To: Josh Boyer; +Cc: linuxppc-dev
In-Reply-To: <1179234606.3084.34.camel@zod.rchland.ibm.com>
On Tue, May 15, 2007 at 08:10:06AM -0500, Josh Boyer wrote:
> On Tue, 2007-05-15 at 14:54 +1000, David Gibson wrote:
> > void ebony_init(void *mac0, void *mac1)
> > Index: working-2.6/arch/powerpc/boot/dts/ebony.dts
> > ===================================================================
> > --- working-2.6.orig/arch/powerpc/boot/dts/ebony.dts 2007-05-14 14:45:56.000000000 +1000
> > +++ working-2.6/arch/powerpc/boot/dts/ebony.dts 2007-05-14 14:45:58.000000000 +1000
> > @@ -176,6 +176,7 @@
> > fpga@7,0 {
> > compatible = "Ebony-FPGA";
> > reg = <7 0 10>;
> > + virtual-reg = <e8300000>;
>
> That's the mapping for OpenBios. What happens if someone is using
> U-Boot?
I think U-Boot uses the same default IO mappings.
> If the mapping isn't the same, you might want to pass the address from
> the individual firmware wrapper parts to ebony_flashsel_fixup similar to
> how you've done it for dt_fixup_mac_addresses.
>
> josh
>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox