From: "Mikołaj Lenczewski" <miko.lenczewski@arm.com>
To: Yang Shi <yang@os.amperecomputing.com>
Cc: ryan.roberts@arm.com, suzuki.poulose@arm.com,
catalin.marinas@arm.com, will@kernel.org, joro@8bytes.org,
jean-philippe@linaro.org, mark.rutland@arm.com,
joey.gouly@arm.com, oliver.upton@linux.dev, james.morse@arm.com,
broonie@kernel.org, maz@kernel.org, david@redhat.com,
akpm@linux-foundation.org, jgg@ziepe.ca, nicolinc@nvidia.com,
mshavit@google.com, jsnitsel@redhat.com, smostafa@google.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, iommu@lists.linux.dev
Subject: Re: [PATCH v2 1/4] arm64: Add BBM Level 2 cpu feature
Date: Mon, 3 Mar 2025 09:40:34 +0000 [thread overview]
Message-ID: <20250303094022.GA13345@e133081.arm.com> (raw)
In-Reply-To: <223a817b-66dd-4182-838f-a186b059fe41@os.amperecomputing.com>
On Fri, Feb 28, 2025 at 06:45:38PM -0800, Yang Shi wrote:
>
>
>
> On 2/28/25 5:29 PM, Yang Shi wrote:
> >
> >
> >
> > > diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
> > > index 940343beb3d4..baae6d458996 100644
> > > --- a/arch/arm64/Kconfig
> > > +++ b/arch/arm64/Kconfig
> > > @@ -2057,6 +2057,17 @@ config ARM64_TLB_RANGE
> > > The feature introduces new assembly instructions, and they were
> > > support when binutils >= 2.30.
> > > +config ARM64_ENABLE_BBML2_NOABORT
> > > + bool "Enable support for Break-Before-Make Level 2 detection
> > > and usage"
> > > + default y
> > > + help
> > > + FEAT_BBM provides detection of support levels for
> > > break-before-make
> > > + sequences. If BBM level 2 is supported, some TLB maintenance
> > > requirements
> > > + can be relaxed to improve performance. We additonally require the
> > > + property that the implementation cannot ever raise TLB
> > > Conflict Aborts.
> > > + Selecting N causes the kernel to fallback to BBM level 0
> > > behaviour
> > > + even if the system supports BBM level 2.
> > > +
> > > endmenu # "ARMv8.4 architectural features"
> > > menu "ARMv8.5 architectural features"
> > > diff --git a/arch/arm64/include/asm/cpucaps.h
> > > b/arch/arm64/include/asm/cpucaps.h
> > > index 0b5ca6e0eb09..2d6db33d4e45 100644
> > > --- a/arch/arm64/include/asm/cpucaps.h
> > > +++ b/arch/arm64/include/asm/cpucaps.h
> > > @@ -23,6 +23,8 @@ cpucap_is_possible(const unsigned int cap)
> > > return IS_ENABLED(CONFIG_ARM64_PAN);
> > > case ARM64_HAS_EPAN:
> > > return IS_ENABLED(CONFIG_ARM64_EPAN);
> > > + case ARM64_HAS_BBML2_NOABORT:
> > > + return IS_ENABLED(CONFIG_ARM64_BBML2_NOABORT);
> > > case ARM64_SVE:
> > > return IS_ENABLED(CONFIG_ARM64_SVE);
> > > case ARM64_SME:
> > > diff --git a/arch/arm64/include/asm/cpufeature.h
> > > b/arch/arm64/include/asm/cpufeature.h
> > > index e0e4478f5fb5..108ef3fbbc00 100644
> > > --- a/arch/arm64/include/asm/cpufeature.h
> > > +++ b/arch/arm64/include/asm/cpufeature.h
> > > @@ -866,6 +866,11 @@ static __always_inline bool
> > > system_supports_mpam_hcr(void)
> > > return alternative_has_cap_unlikely(ARM64_MPAM_HCR);
> > > }
> > > +static inline bool system_supports_bbml2_noabort(void)
> > > +{
> > > + return alternative_has_cap_unlikely(ARM64_HAS_BBML2_NOABORT);
> > > +}
> >
> > Hi Miko,
> >
> > I added AmpereOne mdir on top of this patch. I can see BBML2 feature is
> > detected via dmesg. But system_supports_bbml2_noabort() returns false.
> > The warning in the below debug patch is triggered:
> >
> > diff --git a/arch/arm64/kernel/cpufeature.c
> > b/arch/arm64/kernel/cpufeature.c
> > index faa9094d97dd..a70829ae2bd0 100644
> > --- a/arch/arm64/kernel/cpufeature.c
> > +++ b/arch/arm64/kernel/cpufeature.c
> > @@ -3814,6 +3814,9 @@ void __init setup_system_features(void)
> > {
> > setup_system_capabilities();
> >
> > + if (!system_supports_bbml2_noabort())
> > + WARN_ON_ONCE(1);
> > +
> > kpti_install_ng_mappings();
> >
> > sve_setup();
> >
> > I thought it may be too early. But it seems other system features work
> > well, for example, MPAM. I didn't figure out why. It is weird.
>
> I just figured out the problem It is because the wrong kconfig name is used
> in cpucaps.h. The code is:
>
> + case ARM64_HAS_BBML2_NOABORT:
> + return IS_ENABLED(CONFIG_ARM64_BBML2_NOABORT);
>
> But the kconfig name actually is:
>
> +config ARM64_ENABLE_BBML2_NOABORT
>
> IMHO, the "ENABLE" in kconfig name sounds unnecessary.
>
> Thanks,
> Yang
>
>
Hi Yang,
Thank you for the review, and apologies for the slight delay.
Thanks again for the spot, I agree that `ENABLE` is probably redundant
(and clearly, caused an issue here). Will remove this. Please let me
know if there are any other issues with rebasing your patches on top of
mine.
--
Kind regards,
Mikołaj Lenczewski
WARNING: multiple messages have this Message-ID (diff)
From: "Mikołaj Lenczewski" <miko.lenczewski@arm.com>
To: Yang Shi <yang@os.amperecomputing.com>
Cc: ryan.roberts@arm.com, suzuki.poulose@arm.com,
catalin.marinas@arm.com, will@kernel.org, joro@8bytes.org,
jean-philippe@linaro.org, mark.rutland@arm.com,
joey.gouly@arm.com, oliver.upton@linux.dev, james.morse@arm.com,
broonie@kernel.org, maz@kernel.org, david@redhat.com,
akpm@linux-foundation.org, jgg@ziepe.ca, nicolinc@nvidia.com,
mshavit@google.com, jsnitsel@redhat.com, smostafa@google.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, iommu@lists.linux.dev
Subject: Re: [PATCH v2 1/4] arm64: Add BBM Level 2 cpu feature
Date: Mon, 3 Mar 2025 09:40:34 +0000 [thread overview]
Message-ID: <20250303094022.GA13345@e133081.arm.com> (raw)
Message-ID: <20250303094034.6HCrStNWudB002TgFl5TrN1wvTrHvgpL6ZQ386CWigc@z> (raw)
In-Reply-To: <223a817b-66dd-4182-838f-a186b059fe41@os.amperecomputing.com>
On Fri, Feb 28, 2025 at 06:45:38PM -0800, Yang Shi wrote:
>
>
>
> On 2/28/25 5:29 PM, Yang Shi wrote:
> >
> >
> >
> > > diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
> > > index 940343beb3d4..baae6d458996 100644
> > > --- a/arch/arm64/Kconfig
> > > +++ b/arch/arm64/Kconfig
> > > @@ -2057,6 +2057,17 @@ config ARM64_TLB_RANGE
> > > The feature introduces new assembly instructions, and they were
> > > support when binutils >= 2.30.
> > > +config ARM64_ENABLE_BBML2_NOABORT
> > > + bool "Enable support for Break-Before-Make Level 2 detection
> > > and usage"
> > > + default y
> > > + help
> > > + FEAT_BBM provides detection of support levels for
> > > break-before-make
> > > + sequences. If BBM level 2 is supported, some TLB maintenance
> > > requirements
> > > + can be relaxed to improve performance. We additonally require the
> > > + property that the implementation cannot ever raise TLB
> > > Conflict Aborts.
> > > + Selecting N causes the kernel to fallback to BBM level 0
> > > behaviour
> > > + even if the system supports BBM level 2.
> > > +
> > > endmenu # "ARMv8.4 architectural features"
> > > menu "ARMv8.5 architectural features"
> > > diff --git a/arch/arm64/include/asm/cpucaps.h
> > > b/arch/arm64/include/asm/cpucaps.h
> > > index 0b5ca6e0eb09..2d6db33d4e45 100644
> > > --- a/arch/arm64/include/asm/cpucaps.h
> > > +++ b/arch/arm64/include/asm/cpucaps.h
> > > @@ -23,6 +23,8 @@ cpucap_is_possible(const unsigned int cap)
> > > return IS_ENABLED(CONFIG_ARM64_PAN);
> > > case ARM64_HAS_EPAN:
> > > return IS_ENABLED(CONFIG_ARM64_EPAN);
> > > + case ARM64_HAS_BBML2_NOABORT:
> > > + return IS_ENABLED(CONFIG_ARM64_BBML2_NOABORT);
> > > case ARM64_SVE:
> > > return IS_ENABLED(CONFIG_ARM64_SVE);
> > > case ARM64_SME:
> > > diff --git a/arch/arm64/include/asm/cpufeature.h
> > > b/arch/arm64/include/asm/cpufeature.h
> > > index e0e4478f5fb5..108ef3fbbc00 100644
> > > --- a/arch/arm64/include/asm/cpufeature.h
> > > +++ b/arch/arm64/include/asm/cpufeature.h
> > > @@ -866,6 +866,11 @@ static __always_inline bool
> > > system_supports_mpam_hcr(void)
> > > return alternative_has_cap_unlikely(ARM64_MPAM_HCR);
> > > }
> > > +static inline bool system_supports_bbml2_noabort(void)
> > > +{
> > > + return alternative_has_cap_unlikely(ARM64_HAS_BBML2_NOABORT);
> > > +}
> >
> > Hi Miko,
> >
> > I added AmpereOne mdir on top of this patch. I can see BBML2 feature is
> > detected via dmesg. But system_supports_bbml2_noabort() returns false
next prev parent reply other threads:[~2025-03-03 9:40 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-28 18:24 [PATCH v2 0/4] Initial BBML2 support for contpte_convert() Mikołaj Lenczewski
2025-02-28 18:24 ` [PATCH v2 1/4] arm64: Add BBM Level 2 cpu feature Mikołaj Lenczewski
2025-02-28 21:16 ` Yang Shi
2025-03-01 1:29 ` Yang Shi
2025-03-01 2:45 ` Yang Shi
2025-03-03 9:40 ` Mikołaj Lenczewski [this message]
2025-03-03 9:40 ` Mikołaj Lenczewski
2025-03-03 19:55 ` Yang Shi
2025-02-28 18:24 ` [PATCH v2 2/4] arm64/mm: Delay tlbi in contpte_convert() under BBML2 Mikołaj Lenczewski
2025-02-28 18:24 ` [PATCH v2 3/4] arm64/mm: Elide " Mikołaj Lenczewski
2025-03-03 9:17 ` David Hildenbrand
2025-03-03 9:49 ` Mikołaj Lenczewski
2025-03-03 9:57 ` David Hildenbrand
2025-03-03 10:55 ` Mikołaj Lenczewski
2025-03-03 11:42 ` David Hildenbrand
2025-03-03 11:52 ` Mikołaj Lenczewski
2025-02-28 18:24 ` [PATCH v2 4/4] iommu/arm: Add BBM Level 2 smmu feature Mikołaj Lenczewski
2025-02-28 19:32 ` Jason Gunthorpe
2025-03-03 8:49 ` Shameerali Kolothum Thodi
2025-03-03 10:31 ` Mikołaj Lenczewski
2025-03-03 16:52 ` Jason Gunthorpe
2025-03-03 19:03 ` Mikołaj Lenczewski
2025-03-04 14:26 ` Jason Gunthorpe
2025-03-04 16:02 ` Ryan Roberts
2025-03-04 16:19 ` Jason Gunthorpe
2025-03-11 14:37 ` Robin Murphy
2025-03-01 1:32 ` Yang Shi
2025-03-03 10:17 ` Ryan Roberts
2025-03-03 10:32 ` Mikołaj Lenczewski
2025-03-03 19:56 ` Yang Shi
2025-03-11 10:17 ` Suzuki K Poulose
2025-03-11 10:58 ` Ryan Roberts
2025-03-11 12:16 ` Suzuki K Poulose
2025-03-11 13:20 ` Ryan Roberts
2025-03-03 9:14 ` [PATCH v2 0/4] Initial BBML2 support for contpte_convert() David Hildenbrand
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