[PATCH v5 1/3] iommu/arm-smmu-v3: Factor out CMDQ batch force-sync conditions

[PATCH v5 1/3] iommu/arm-smmu-v3: Factor out CMDQ batch force-sync conditions

[Ashish Mhetre]

From: Nicolin Chen <nicolinc@nvidia.com>

arm_smmu_cmdq_batch_add_cmd_p() carries two distinct reasons for
flushing the current batch with a CMD_SYNC before appending the
new command:

  - The batch's pre-assigned cmdq does not support the new command.
  - The Arm erratum 2812531 workaround (ARM_SMMU_OPT_CMDQ_FORCE_SYNC)
    forces a SYNC at one entry before the batch is full.

Lift those checks into a new arm_smmu_cmdq_batch_force_sync() helper
so that adding another force-sync condition becomes a one-line
addition. No functional change.

Signed-off-by: Nicolin Chen <nicolinc@nvidia.com>
Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>
---
 drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 23 +++++++++++++++------
 1 file changed, 17 insertions(+), 6 deletions(-)

diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
index a10affb483a4..76efe479e80f 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
@@ -847,16 +847,27 @@ static void arm_smmu_cmdq_batch_init_cmd(struct arm_smmu_device *smmu,
 	cmds->cmdq = arm_smmu_get_cmdq(smmu, cmd);
 }
 
+static bool arm_smmu_cmdq_batch_force_sync(struct arm_smmu_device *smmu,
+					   struct arm_smmu_cmdq_batch *cmds,
+					   struct arm_smmu_cmd *cmd)
+{
+	/* The batch's pre-assigned cmdq doesn't support the new command */
+	if (!arm_smmu_cmdq_supports_cmd(cmds->cmdq, cmd))
+		return true;
+
+	/* Arm erratum 2812531 */
+	if (cmds->num == CMDQ_BATCH_ENTRIES - 1 &&
+	    (smmu->options & ARM_SMMU_OPT_CMDQ_FORCE_SYNC))
+		return true;
+
+	return false;
+}
+
 static void arm_smmu_cmdq_batch_add_cmd_p(struct arm_smmu_device *smmu,
 					  struct arm_smmu_cmdq_batch *cmds,
 					  struct arm_smmu_cmd *cmd)
 {
-	bool force_sync = (cmds->num == CMDQ_BATCH_ENTRIES - 1) &&
-			  (smmu->options & ARM_SMMU_OPT_CMDQ_FORCE_SYNC);
-	bool unsupported_cmd;
-
-	unsupported_cmd = !arm_smmu_cmdq_supports_cmd(cmds->cmdq, cmd);
-	if (force_sync || unsupported_cmd) {
+	if (arm_smmu_cmdq_batch_force_sync(smmu, cmds, cmd)) {
 		arm_smmu_cmdq_issue_cmdlist(smmu, cmds->cmdq, cmds->cmds,
 					    cmds->num, true);
 		arm_smmu_cmdq_batch_init_cmd(smmu, cmds, cmd);
-- 
2.50.1

[PATCH v5 2/3] iommu/arm-smmu-v3: Introduce CFGI/TLBI-repeat workaround infrastructure

[Ashish Mhetre]

Tegra264 SMMU instances need every CFGI/TLBI command sequence issued
twice, with the second issue executing only after the first issue's
CMD_SYNC has completed:

    TLBI/CFGI ... CMD_SYNC TLBI/CFGI ... CMD_SYNC

ATC_INV is not affected and must never be doubled.

Add arm_smmu_erratum_repeat_tlbi_cfgi_key static key and an
arm_smmu_erratum_cmd_needs_repeating() helper in arm-smmu-v3.h that
gates on the static key first and then range-checks the opcode
(CFGI_STE .. ATC_INV), so subsequent changes wiring the workaround
into the CMDQ submission and iommufd batching paths can share a
single predicate.

Rename the existing arm_smmu_cmdq_issue_cmdlist() to
__arm_smmu_cmdq_issue_cmdlist() and add a thin wrapper that re-issues
the same cmdlist a second time when the predicate fires. Register the
new condition with arm_smmu_cmdq_batch_force_sync() and add
arm_vsmmu_can_batch_cmd() so iommufd batches split at every "needs
repeating" transition.

No callers enable the static key yet, so this patch introduces no
functional change. A subsequent change hooks the DT probe to enable
the key on affected instances.

Suggested-by: Nicolin Chen <nicolinc@nvidia.com>
Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>
---
 .../arm/arm-smmu-v3/arm-smmu-v3-iommufd.c     | 15 +++++++-
 drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c   | 36 ++++++++++++++++---
 drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h   | 15 ++++++++
 3 files changed, 61 insertions(+), 5 deletions(-)

diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c
index 1e9f7d2de344..11d22acae613 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c
@@ -350,6 +350,18 @@ static int arm_vsmmu_convert_user_cmd(struct arm_vsmmu *vsmmu,
 	return 0;
 }
 
+static bool arm_vsmmu_can_batch_cmd(struct arm_smmu_device *smmu,
+				    struct arm_vsmmu_invalidation_cmd *last,
+				    struct arm_vsmmu_invalidation_cmd *next)
+{
+	struct arm_smmu_cmd next_cmd = {
+		.data[0] = le64_to_cpu(next->ucmd.cmd[0]),
+	};
+
+	return arm_smmu_erratum_cmd_needs_repeating(smmu, &last->cmd) ==
+	       arm_smmu_erratum_cmd_needs_repeating(smmu, &next_cmd);
+}
+
 int arm_vsmmu_cache_invalidate(struct iommufd_viommu *viommu,
 			       struct iommu_user_data_array *array)
 {
@@ -382,7 +394,8 @@ int arm_vsmmu_cache_invalidate(struct iommufd_viommu *viommu,
 
 		/* FIXME work in blocks of CMDQ_BATCH_ENTRIES and copy each block? */
 		cur++;
-		if (cur != end && (cur - last) != CMDQ_BATCH_ENTRIES - 1)
+		if (cur != end && (cur - last) != CMDQ_BATCH_ENTRIES - 1 &&
+		    arm_vsmmu_can_batch_cmd(smmu, last, cur))
 			continue;
 
 		/* FIXME always uses the main cmdq rather than trying to group by type */
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
index 76efe479e80f..15b9d0170520 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
@@ -41,6 +41,7 @@ MODULE_PARM_DESC(disable_msipolling,
 
 static const struct iommu_ops arm_smmu_ops;
 static struct iommu_dirty_ops arm_smmu_dirty_ops;
+DEFINE_STATIC_KEY_FALSE(arm_smmu_erratum_repeat_tlbi_cfgi_key);
 
 enum arm_smmu_msi_index {
 	EVTQ_MSI_INDEX,
@@ -698,10 +699,10 @@ static void arm_smmu_cmdq_write_entries(struct arm_smmu_cmdq *cmdq,
  *   insert their own list of commands then all of the commands from one
  *   CPU will appear before any of the commands from the other CPU.
  */
-int arm_smmu_cmdq_issue_cmdlist(struct arm_smmu_device *smmu,
-				struct arm_smmu_cmdq *cmdq,
-				struct arm_smmu_cmd *cmds, int n,
-				bool sync)
+static int __arm_smmu_cmdq_issue_cmdlist(struct arm_smmu_device *smmu,
+					 struct arm_smmu_cmdq *cmdq,
+					 struct arm_smmu_cmd *cmds, int n,
+					 bool sync)
 {
 	struct arm_smmu_cmd cmd_sync;
 	u32 prod;
@@ -820,6 +821,28 @@ int arm_smmu_cmdq_issue_cmdlist(struct arm_smmu_device *smmu,
 	return ret;
 }
 
+int arm_smmu_cmdq_issue_cmdlist(struct arm_smmu_device *smmu,
+				struct arm_smmu_cmdq *cmdq,
+				struct arm_smmu_cmd *cmds, int n,
+				bool sync)
+{
+	int ret = __arm_smmu_cmdq_issue_cmdlist(smmu, cmdq, cmds, n, sync);
+
+	/*
+	 * arm_smmu_cmdq_batch_add_cmd_p() can flush its current batch
+	 * with sync=true and n=0 (bare SYNC) when the next command is
+	 * not supported by the batch's pre-selected cmdq, so the
+	 * repeat path must not inspect cmds[0].
+	 */
+	if (!n || ret || !sync)
+		return ret;
+
+	if (arm_smmu_erratum_cmd_needs_repeating(smmu, &cmds[0]))
+		ret = __arm_smmu_cmdq_issue_cmdlist(smmu, cmdq, cmds, n, sync);
+
+	return ret;
+}
+
 static int arm_smmu_cmdq_issue_cmd_p(struct arm_smmu_device *smmu,
 				     struct arm_smmu_cmd *cmd, bool sync)
 {
@@ -860,6 +883,11 @@ static bool arm_smmu_cmdq_batch_force_sync(struct arm_smmu_device *smmu,
 	    (smmu->options & ARM_SMMU_OPT_CMDQ_FORCE_SYNC))
 		return true;
 
+	/* See arm_smmu_erratum_cmd_needs_repeating() */
+	if (cmds->num == CMDQ_BATCH_ENTRIES &&
+	    arm_smmu_erratum_cmd_needs_repeating(smmu, &cmds->cmds[0]))
+		return true;
+
 	return false;
 }
 
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
index c909c9a88538..31121d7c7841 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
@@ -11,6 +11,7 @@
 #include <linux/bitfield.h>
 #include <linux/iommu.h>
 #include <linux/iommufd.h>
+#include <linux/jump_label.h>
 #include <linux/kernel.h>
 #include <linux/mmzone.h>
 #include <linux/sizes.h>
@@ -1211,6 +1212,20 @@ int arm_smmu_cmdq_issue_cmdlist(struct arm_smmu_device *smmu,
 				struct arm_smmu_cmdq *cmdq,
 				struct arm_smmu_cmd *cmds, int n,
 				bool sync);
+DECLARE_STATIC_KEY_FALSE(arm_smmu_erratum_repeat_tlbi_cfgi_key);
+
+static inline bool
+arm_smmu_erratum_cmd_needs_repeating(struct arm_smmu_device *smmu,
+				     struct arm_smmu_cmd *cmd)
+{
+	u8 opcode;
+
+	if (!static_branch_unlikely(&arm_smmu_erratum_repeat_tlbi_cfgi_key))
+		return false;
+
+	opcode = FIELD_GET(CMDQ_0_OP, cmd->data[0]);
+	return opcode >= CMDQ_OP_CFGI_STE && opcode < CMDQ_OP_ATC_INV;
+}
 
 #ifdef CONFIG_ARM_SMMU_V3_SVA
 bool arm_smmu_sva_supported(struct arm_smmu_device *smmu);
-- 
2.50.1

Re: [PATCH v5 2/3] iommu/arm-smmu-v3: Introduce CFGI/TLBI-repeat workaround infrastructure

[Nicolin Chen]

On Thu, Jul 09, 2026 at 09:56:08AM +0000, Ashish Mhetre wrote:
> No callers enable the static key yet, so this patch introduces no
> functional change. A subsequent change hooks the DT probe to enable
> the key on affected instances.

Nit: once a patch is merged, it's no longer a "patch" but "commit".

Instead,

No callers enable the static key yet, so there is no functional change. A
subsequent change will enable the key on affected instances.

> Suggested-by: Nicolin Chen <nicolinc@nvidia.com>
> Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>

> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> index 76efe479e80f..15b9d0170520 100644
> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> @@ -41,6 +41,7 @@ MODULE_PARM_DESC(disable_msipolling,
>  
>  static const struct iommu_ops arm_smmu_ops;
>  static struct iommu_dirty_ops arm_smmu_dirty_ops;
> +DEFINE_STATIC_KEY_FALSE(arm_smmu_erratum_repeat_tlbi_cfgi_key);

It's an erratum; it should have an inline description, like the
one you had at ARM_SMMU_OPT_TLBI_TWICE previously.

> +int arm_smmu_cmdq_issue_cmdlist(struct arm_smmu_device *smmu,
> +				struct arm_smmu_cmdq *cmdq,
> +				struct arm_smmu_cmd *cmds, int n,
> +				bool sync)
> +{
> +	int ret = __arm_smmu_cmdq_issue_cmdlist(smmu, cmdq, cmds, n, sync);
> +
> +	/*
> +	 * arm_smmu_cmdq_batch_add_cmd_p() can flush its current batch
> +	 * with sync=true and n=0 (bare SYNC) when the next command is
> +	 * not supported by the batch's pre-selected cmdq, so the

After a second thought, this "supported" case is not reachable.

When a batch is init-ed, it's given an opcode (same as cmd[0]'s).

If an opcode is not supported, it's init-ed with smmu->cmdq that
must support all commands.

So, adding the !n is more like a defensive play. But the comments
here would be misleading.

> +	 * repeat path must not inspect cmds[0].
> +	 */
> +	if (!n || ret || !sync)
> +		return ret;
> +
> +	if (arm_smmu_erratum_cmd_needs_repeating(smmu, &cmds[0]))
> +		ret = __arm_smmu_cmdq_issue_cmdlist(smmu, cmdq, cmds, n, sync);
> +
> +	return ret;
> +}
> +
>  static int arm_smmu_cmdq_issue_cmd_p(struct arm_smmu_device *smmu,
>  				     struct arm_smmu_cmd *cmd, bool sync)
>  {
> @@ -860,6 +883,11 @@ static bool arm_smmu_cmdq_batch_force_sync(struct arm_smmu_device *smmu,
>  	    (smmu->options & ARM_SMMU_OPT_CMDQ_FORCE_SYNC))
>  		return true;
>  
> +	/* See arm_smmu_erratum_cmd_needs_repeating() */
> +	if (cmds->num == CMDQ_BATCH_ENTRIES &&
> +	    arm_smmu_erratum_cmd_needs_repeating(smmu, &cmds->cmds[0]))

The comment above is useless; arm_smmu_erratum_cmd_needs_repeating
doesn't give any useful explanation either.

Like I suggested, add the missing piece of war description to the
arm_smmu_erratum_repeat_tlbi_cfgi_key at the top. Then,

	/* See the description at arm_smmu_erratum_repeat_tlbi_cfgi_key */

> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
> @@ -1211,6 +1212,20 @@ int arm_smmu_cmdq_issue_cmdlist(struct arm_smmu_device *smmu,
>  				struct arm_smmu_cmdq *cmdq,
>  				struct arm_smmu_cmd *cmds, int n,
>  				bool sync);
> +DECLARE_STATIC_KEY_FALSE(arm_smmu_erratum_repeat_tlbi_cfgi_key);
> +
> +static inline bool
> +arm_smmu_erratum_cmd_needs_repeating(struct arm_smmu_device *smmu,
> +				     struct arm_smmu_cmd *cmd)

smmu is unused.

> +{
> +	u8 opcode;
> +
> +	if (!static_branch_unlikely(&arm_smmu_erratum_repeat_tlbi_cfgi_key))
> +		return false;
> +
> +	opcode = FIELD_GET(CMDQ_0_OP, cmd->data[0]);
> +	return opcode >= CMDQ_OP_CFGI_STE && opcode < CMDQ_OP_ATC_INV;
> +}

Maybe move this to the first caller in arm-smmu-v3.c? Instead, add
its stub here, so we can drop that DECLARE_STATIC_KEY_FALSE. Then,
DEFINE_STATIC_KEY_FALSE will need a "static".

Nicolin

Re: [PATCH v5 2/3] iommu/arm-smmu-v3: Introduce CFGI/TLBI-repeat workaround infrastructure

[Ashish Mhetre]

On 7/10/2026 9:50 AM, Nicolin Chen wrote:
> On Thu, Jul 09, 2026 at 09:56:08AM +0000, Ashish Mhetre wrote:
>> No callers enable the static key yet, so this patch introduces no
>> functional change. A subsequent change hooks the DT probe to enable
>> the key on affected instances.
> Nit: once a patch is merged, it's no longer a "patch" but "commit".
>
> Instead,
>
> No callers enable the static key yet, so there is no functional change. A
> subsequent change will enable the key on affected instances.

Ack.

>> Suggested-by: Nicolin Chen <nicolinc@nvidia.com>
>> Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>
>> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
>> index 76efe479e80f..15b9d0170520 100644
>> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
>> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
>> @@ -41,6 +41,7 @@ MODULE_PARM_DESC(disable_msipolling,
>>   
>>   static const struct iommu_ops arm_smmu_ops;
>>   static struct iommu_dirty_ops arm_smmu_dirty_ops;
>> +DEFINE_STATIC_KEY_FALSE(arm_smmu_erratum_repeat_tlbi_cfgi_key);
> It's an erratum; it should have an inline description, like the
> one you had at ARM_SMMU_OPT_TLBI_TWICE previously.

Okay, I'll restore the description I had for option bit here.

>> +int arm_smmu_cmdq_issue_cmdlist(struct arm_smmu_device *smmu,
>> +				struct arm_smmu_cmdq *cmdq,
>> +				struct arm_smmu_cmd *cmds, int n,
>> +				bool sync)
>> +{
>> +	int ret = __arm_smmu_cmdq_issue_cmdlist(smmu, cmdq, cmds, n, sync);
>> +
>> +	/*
>> +	 * arm_smmu_cmdq_batch_add_cmd_p() can flush its current batch
>> +	 * with sync=true and n=0 (bare SYNC) when the next command is
>> +	 * not supported by the batch's pre-selected cmdq, so the
> After a second thought, this "supported" case is not reachable.
>
> When a batch is init-ed, it's given an opcode (same as cmd[0]'s).
>
> If an opcode is not supported, it's init-ed with smmu->cmdq that
> must support all commands.
>
> So, adding the !n is more like a defensive play. But the comments
> here would be misleading.

You're right, the unsupported-cmdq force-sync path cannot run with n == 0.
I'll fix the misleading comment. The !n guard stays as a safety check 
for empty
batch_submit(), where we must not inspect cmds[0].

>> +	 * repeat path must not inspect cmds[0].
>> +	 */
>> +	if (!n || ret || !sync)
>> +		return ret;
>> +
>> +	if (arm_smmu_erratum_cmd_needs_repeating(smmu, &cmds[0]))
>> +		ret = __arm_smmu_cmdq_issue_cmdlist(smmu, cmdq, cmds, n, sync);
>> +
>> +	return ret;
>> +}
>> +
>>   static int arm_smmu_cmdq_issue_cmd_p(struct arm_smmu_device *smmu,
>>   				     struct arm_smmu_cmd *cmd, bool sync)
>>   {
>> @@ -860,6 +883,11 @@ static bool arm_smmu_cmdq_batch_force_sync(struct arm_smmu_device *smmu,
>>   	    (smmu->options & ARM_SMMU_OPT_CMDQ_FORCE_SYNC))
>>   		return true;
>>   
>> +	/* See arm_smmu_erratum_cmd_needs_repeating() */
>> +	if (cmds->num == CMDQ_BATCH_ENTRIES &&
>> +	    arm_smmu_erratum_cmd_needs_repeating(smmu, &cmds->cmds[0]))
> The comment above is useless; arm_smmu_erratum_cmd_needs_repeating
> doesn't give any useful explanation either.
>
> Like I suggested, add the missing piece of war description to the
> arm_smmu_erratum_repeat_tlbi_cfgi_key at the top. Then,
>
> 	/* See the description at arm_smmu_erratum_repeat_tlbi_cfgi_key */

Ack.

>> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
>> @@ -1211,6 +1212,20 @@ int arm_smmu_cmdq_issue_cmdlist(struct arm_smmu_device *smmu,
>>   				struct arm_smmu_cmdq *cmdq,
>>   				struct arm_smmu_cmd *cmds, int n,
>>   				bool sync);
>> +DECLARE_STATIC_KEY_FALSE(arm_smmu_erratum_repeat_tlbi_cfgi_key);
>> +
>> +static inline bool
>> +arm_smmu_erratum_cmd_needs_repeating(struct arm_smmu_device *smmu,
>> +				     struct arm_smmu_cmd *cmd)
> smmu is unused.

Thanks for pointing. With static key, smmu pointer is not used anymore.
I'll remove it.

>> +{
>> +	u8 opcode;
>> +
>> +	if (!static_branch_unlikely(&arm_smmu_erratum_repeat_tlbi_cfgi_key))
>> +		return false;
>> +
>> +	opcode = FIELD_GET(CMDQ_0_OP, cmd->data[0]);
>> +	return opcode >= CMDQ_OP_CFGI_STE && opcode < CMDQ_OP_ATC_INV;
>> +}
> Maybe move this to the first caller in arm-smmu-v3.c? Instead, add
> its stub here, so we can drop that DECLARE_STATIC_KEY_FALSE. Then,
> DEFINE_STATIC_KEY_FALSE will need a "static".
>
> Nicolin

Makes sense as iommufd only needs the classifier, not the key itself. 
I'll move
arm_smmu_erratum_cmd_needs_repeating() into arm-smmu-v3.c, leave a
declaration in the header.

Thanks,
Ashish Mhetre

[PATCH v5 3/3] iommu/arm-smmu-v3: Enable CFGI/TLBI-repeat workaround on Tegra264

[Ashish Mhetre]

Nvidia Tegra264 SMMU is affected by an erratum where a TLB entry can
survive an invalidation that races with concurrent traffic targeting
the same entry. The hardware-recommended software workaround is to
issue every CFGI/TLBI command (each followed by CMD_SYNC) twice, and
that infrastructure is already in place behind
arm_smmu_erratum_repeat_tlbi_cfgi_key.

Neither IDR nor IIDR flags this Tegra264-specific bug, so hardware
detection is not possible. Tegra264 is device-tree-only (no ACPI/IORT
support) and already has a dedicated "nvidia,tegra264-smmu" compatible,
so DT-probe is the only viable detection path.

Enable the workaround on instances matching the existing
"nvidia,tegra264-smmu" compatible by calling static_branch_enable() on
arm_smmu_erratum_repeat_tlbi_cfgi_key. Document the erratum in
Documentation/arch/arm64/silicon-errata.rst.

Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>
---
 Documentation/arch/arm64/silicon-errata.rst | 2 ++
 drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 4 +++-
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/Documentation/arch/arm64/silicon-errata.rst b/Documentation/arch/arm64/silicon-errata.rst
index 014aa1c215a1..076b3947d259 100644
--- a/Documentation/arch/arm64/silicon-errata.rst
+++ b/Documentation/arch/arm64/silicon-errata.rst
@@ -312,6 +312,8 @@ stable kernels.
 |                |                 | T241-MPAM-4,    |                             |
 |                |                 | T241-MPAM-6     |                             |
 +----------------+-----------------+-----------------+-----------------------------+
+| NVIDIA         | T264 SMMU       | T264-SMMU-3     | N/A                         |
++----------------+-----------------+-----------------+-----------------------------+
 +----------------+-----------------+-----------------+-----------------------------+
 | Freescale/NXP  | LS2080A/LS1043A | A-008585        | FSL_ERRATUM_A008585         |
 +----------------+-----------------+-----------------+-----------------------------+
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
index 15b9d0170520..edb7a5d38cf9 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
@@ -5331,8 +5331,10 @@ static int arm_smmu_device_dt_probe(struct platform_device *pdev,
 	if (of_dma_is_coherent(dev->of_node))
 		smmu->features |= ARM_SMMU_FEAT_COHERENCY;
 
-	if (of_device_is_compatible(dev->of_node, "nvidia,tegra264-smmu"))
+	if (of_device_is_compatible(dev->of_node, "nvidia,tegra264-smmu")) {
 		tegra_cmdqv_dt_probe(dev->of_node, smmu);
+		static_branch_enable(&arm_smmu_erratum_repeat_tlbi_cfgi_key);
+	}
 
 	return ret;
 }
-- 
2.50.1

Re: [PATCH v5 3/3] iommu/arm-smmu-v3: Enable CFGI/TLBI-repeat workaround on Tegra264

[Nicolin Chen]

On Thu, Jul 09, 2026 at 09:56:09AM +0000, Ashish Mhetre wrote:
> Nvidia Tegra264 SMMU is affected by an erratum where a TLB entry can
> survive an invalidation that races with concurrent traffic targeting
> the same entry. The hardware-recommended software workaround is to
> issue every CFGI/TLBI command (each followed by CMD_SYNC) twice, and
> that infrastructure is already in place behind
> arm_smmu_erratum_repeat_tlbi_cfgi_key.
> 
> Neither IDR nor IIDR flags this Tegra264-specific bug, so hardware
> detection is not possible. Tegra264 is device-tree-only (no ACPI/IORT
> support) and already has a dedicated "nvidia,tegra264-smmu" compatible,
> so DT-probe is the only viable detection path.
> 
> Enable the workaround on instances matching the existing
> "nvidia,tegra264-smmu" compatible by calling static_branch_enable() on
> arm_smmu_erratum_repeat_tlbi_cfgi_key. Document the erratum in
> Documentation/arch/arm64/silicon-errata.rst.
> 
> Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>

Reviewed-by: Nicolin Chen <nicolinc@nvidia.com>

Sashiko pointed out a concern at PATCH-3 regarding the static key:
https://sashiko.dev/#/patchset/20260709095613.831769-1-amhetre%40nvidia.com

It's a false positive. But perhaps we could fold in an inline note;
it'd belong to the missing description that I commented in PATCH-2.

Nicolin

Re: [PATCH v5 3/3] iommu/arm-smmu-v3: Enable CFGI/TLBI-repeat workaround on Tegra264

[Ashish Mhetre]

On 7/10/2026 9:55 AM, Nicolin Chen wrote:
> On Thu, Jul 09, 2026 at 09:56:09AM +0000, Ashish Mhetre wrote:
>> Nvidia Tegra264 SMMU is affected by an erratum where a TLB entry can
>> survive an invalidation that races with concurrent traffic targeting
>> the same entry. The hardware-recommended software workaround is to
>> issue every CFGI/TLBI command (each followed by CMD_SYNC) twice, and
>> that infrastructure is already in place behind
>> arm_smmu_erratum_repeat_tlbi_cfgi_key.
>>
>> Neither IDR nor IIDR flags this Tegra264-specific bug, so hardware
>> detection is not possible. Tegra264 is device-tree-only (no ACPI/IORT
>> support) and already has a dedicated "nvidia,tegra264-smmu" compatible,
>> so DT-probe is the only viable detection path.
>>
>> Enable the workaround on instances matching the existing
>> "nvidia,tegra264-smmu" compatible by calling static_branch_enable() on
>> arm_smmu_erratum_repeat_tlbi_cfgi_key. Document the erratum in
>> Documentation/arch/arm64/silicon-errata.rst.
>>
>> Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>
> Reviewed-by: Nicolin Chen <nicolinc@nvidia.com>
>
> Sashiko pointed out a concern at PATCH-3 regarding the static key:
> https://sashiko.dev/#/patchset/20260709095613.831769-1-amhetre%40nvidia.com
>
> It's a false positive. But perhaps we could fold in an inline note;
> it'd belong to the missing description that I commented in PATCH-2.
>
> Nicolin

Ack, I will address this in v6.

Thanks,
Ashish Mhetre

Re: [PATCH v5 1/3] iommu/arm-smmu-v3: Factor out CMDQ batch force-sync conditions

[Nicolin Chen]

On Thu, Jul 09, 2026 at 09:56:07AM +0000, Ashish Mhetre wrote:
> From: Nicolin Chen <nicolinc@nvidia.com>
> 
> arm_smmu_cmdq_batch_add_cmd_p() carries two distinct reasons for
> flushing the current batch with a CMD_SYNC before appending the
> new command:
> 
>   - The batch's pre-assigned cmdq does not support the new command.
>   - The Arm erratum 2812531 workaround (ARM_SMMU_OPT_CMDQ_FORCE_SYNC)
>     forces a SYNC at one entry before the batch is full.
> 
> Lift those checks into a new arm_smmu_cmdq_batch_force_sync() helper
> so that adding another force-sync condition becomes a one-line
> addition. No functional change.

Patch is fine, but you're missing the cover-letter and changelogs.

Nicolin

Re: [PATCH v5 1/3] iommu/arm-smmu-v3: Factor out CMDQ batch force-sync conditions

[Ashish Mhetre]

On 7/10/2026 9:58 AM, Nicolin Chen wrote:
> On Thu, Jul 09, 2026 at 09:56:07AM +0000, Ashish Mhetre wrote:
>> From: Nicolin Chen <nicolinc@nvidia.com>
>>
>> arm_smmu_cmdq_batch_add_cmd_p() carries two distinct reasons for
>> flushing the current batch with a CMD_SYNC before appending the
>> new command:
>>
>>    - The batch's pre-assigned cmdq does not support the new command.
>>    - The Arm erratum 2812531 workaround (ARM_SMMU_OPT_CMDQ_FORCE_SYNC)
>>      forces a SYNC at one entry before the batch is full.
>>
>> Lift those checks into a new arm_smmu_cmdq_batch_force_sync() helper
>> so that adding another force-sync condition becomes a one-line
>> addition. No functional change.
> Patch is fine, but you're missing the cover-letter and changelogs.
>
> Nicolin

I had sent out the cover-letter along with change logs.
The sequence got messed up while sending. Here's the cover letter.
https://lore.kernel.org/linux-tegra/20260709095613.831769-4-amhetre@nvidia.com/T/#u 


I will fix this in next version.

Thanks,
Ashish Mhetre