Re: [PATCH v2 5/6] gpu: nova-core: skip the IFR header if present

["Eliot Courtney" <ecourtney@nvidia.com>]

On Wed Apr 15, 2026 at 8:50 AM JST, Timur Tabi wrote:
> The GPU's ROM may begin with an Init-from-ROM (IFR) header that precedes
> the PCI Expansion ROM images (VBIOS).  When present, the PROM shadow
> method must parse this header to determine the offset where the PCI ROM
> images actually begin, and adjust all subsequent reads accordingly.
>
> On most GPUs this is not needed because the IFR microcode has already
> applied the ROM offset so that PROM reads transparently skip the header.
> On GA100, for whatever reason, the IFR offset is not applied to PROM
> reads.  Therefore, the search for the PCI expansion must skip the IFR
> header, if found.
>
> Signed-off-by: Timur Tabi <ttabi@nvidia.com>
> ---
>  drivers/gpu/nova-core/vbios.rs | 67 +++++++++++++++++++++++++++++++++-
>  1 file changed, 66 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/nova-core/vbios.rs b/drivers/gpu/nova-core/vbios.rs
> index e726594eb130..000e823b9e47 100644
> --- a/drivers/gpu/nova-core/vbios.rs
> +++ b/drivers/gpu/nova-core/vbios.rs
> @@ -89,13 +89,78 @@ struct VbiosIterator<'a> {
>      last_found: bool,
>  }
>  
> +/// Offset of FIXED0 field in IFR header
> +const NV_PBUS_IFR_FMT_FIXED0: usize = 0x00000000;
> +/// Offset of FIXED1 field in IFR header
> +const NV_PBUS_IFR_FMT_FIXED1: usize = 0x00000004;
> +/// Offset of FIXED2 field in IFR header
> +const NV_PBUS_IFR_FMT_FIXED2: usize = 0x00000008;
> +/// IFR signature: ASCII "NVGI" as a little-endian u32.
> +const NV_PBUS_IFR_FMT_FIXED0_SIGNATURE_VALUE: u32 = 0x4947564E;

These ones are available in tu102/dev_bus.h in OpenRM and shouldn't be
too hard to add. As a general convention for the driver IMO it is nice
to get as many constants as we can via bindings.

The diff in nova-gsp-binding-generator looks like this:

diff --git a/nvidia-open-gpu-symbols.txt b/nvidia-open-gpu-symbols.txt
index cd6835fc00b6..9f08d842a3b2 100644
--- a/nvidia-open-gpu-symbols.txt
+++ b/nvidia-open-gpu-symbols.txt
@@ -91,6 +91,10 @@ var:BLACKWELL_DMA_COPY_A
 var:BLACKWELL_DMA_COPY_B
 var:NV2080_ENGINE_TYPE_.*
 var:NV2080_CTRL_CMD_INTERNAL_DEVICE_INFO_MAX_ENTRIES
+var:NV_PBUS_IFR_FMT_FIXED0
+var:NV_PBUS_IFR_FMT_FIXED1
+var:NV_PBUS_IFR_FMT_FIXED2
+var:NV_PBUS_IFR_FMT_FIXED0_SIGNATURE_VALUE
 var:NV_RAMIN_ALLOC_SIZE
 var:NV_RAMUSERD_CHAN_SIZE
 var:NVA06F_GP_ENTRY__SIZE
diff --git a/r570_144_bindings.h b/r570_144_bindings.h
index cb7b62a446e9..1c1024da60f8 100644
--- a/r570_144_bindings.h
+++ b/r570_144_bindings.h
@@ -42,6 +42,9 @@
 /* GP entry size */
 #include <class/cla06f.h>
 
+/* IFR header format constants */
+#include <turing/tu102/dev_bus.h>
+
 /* Instance memory and USERD sizes */
 #include <ampere/ga100/dev_ram.h>
 #include <maxwell/gm107/dev_ram.h>


> +/// ROM directory signature: ASCII "RFRD" as a little-endian u32.
> +const NV_ROM_DIRECTORY_IDENTIFIER: u32 = 0x44524652;
> +/// Offset of the NV_PMGR_ROM_ADDR_OFFSET register in IFR Extended section
> +const IFR_SW_EXT_ROM_ADDR_OFFSET: usize = 4;
> +/// Size of Redundant Firmware Flash Status section
> +const RFW_FLASH_STATUS_SIZE: usize = 4096;
> +
> +bitfield! {
> +    struct IfrFixed1(u32) {
> +        15:8 version as u8;
> +        30:16 fixed_data_size as u16;
> +    }
> +}
> +
> +bitfield! {
> +    struct IfrFixed2(u32) {
> +        19:0 total_data_size as u32;
> +    }
> +}
> +
>  impl<'a> VbiosIterator<'a> {
>      fn new(dev: &'a device::Device, bar0: &'a Bar0) -> Result<Self> {
> +        let signature = bar0.try_read32(ROM_OFFSET + NV_PBUS_IFR_FMT_FIXED0)?;
> +
> +        // The ROM may start with an Init-from-ROM (IFR) header before the PCI
> +        // Expansion ROM images. Most GPUs apply the IFR offset transparently, but
> +        // GA100 does not, so we must skip the header manually if present.
> +
> +        let current_offset = if signature == NV_PBUS_IFR_FMT_FIXED0_SIGNATURE_VALUE {
> +            let fixed1 = IfrFixed1(bar0.try_read32(ROM_OFFSET + NV_PBUS_IFR_FMT_FIXED1)?);
> +
> +            match fixed1.version() {
> +                // Note: We do not actually expect to see v1 or v2 on these GPUs
> +                1 | 2 => {
> +                    let fixed_data_size = fixed1.fixed_data_size() as usize;
> +                    let pmgr_rom_addr_offset = fixed_data_size + IFR_SW_EXT_ROM_ADDR_OFFSET;
> +                    bar0.try_read32(ROM_OFFSET + pmgr_rom_addr_offset)? as usize
> +                }
> +                3 => {
> +                    let fixed2 = IfrFixed2(bar0.try_read32(ROM_OFFSET + NV_PBUS_IFR_FMT_FIXED2)?);
> +                    let total_data_size = fixed2.total_data_size() as usize;
> +                    let dir_offset = bar0.try_read32(ROM_OFFSET + total_data_size)? as usize
> +                        + RFW_FLASH_STATUS_SIZE;
> +                    let dir_sig = bar0.try_read32(ROM_OFFSET + dir_offset)?;
> +                    if dir_sig != NV_ROM_DIRECTORY_IDENTIFIER {
> +                        dev_err!(dev, "could not find IFR ROM directory\n");
> +                        return Err(EINVAL);
> +                    }
> +                    bar0.try_read32(ROM_OFFSET + dir_offset + 8)? as usize
> +                }
> +                _ => {
> +                    dev_err!(dev, "unsupported IFR header version {}\n", fixed1.version());
> +                    return Err(EINVAL);
> +                }
> +            }
> +        } else {
> +            0
> +        };
> +

This (and the constants) is quite specific to GA100. What about putting
this into a VbiosIterator::ifr_offset helper function? You can move the
constants and bitfield definitions inside of that function as well,
which would be nice since they aren't used outside of this area of the
code at all.

>          Ok(Self {
>              dev,
>              bar0,
>              data: KVec::new(),
> -            current_offset: 0,
> +            current_offset,
>              last_found: false,
>          })
>      }