arch/mips/sgi-ip22/Platform:29: *** gcc doesn't support needed option -mr10k-cache-barrier=store. Stop.

arch/mips/sgi-ip22/Platform:29: *** gcc doesn't support needed option -mr10k-cache-barrier=store. Stop.

[Fengguang Wu]

tree:   git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head:   04535d273ee3edacd9551b2512b4e939ba20277f
commit: e4d6152b520184be87aa65cb7035bf87acd27c14 Merge branch 'kconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild-2.6
date:   3 years, 8 months ago
config: make ARCH=mips ip28_defconfig

All error/warnings:

>> arch/mips/sgi-ip22/Platform:29: *** gcc doesn't support needed option -mr10k-cache-barrier=store.  Stop.
   make: *** [sub-make] Error 2

vim +29 arch/mips/sgi-ip22/Platform

b9dbdce1 Ralf Baechle 2010-08-05  13  load-$(CONFIG_SGI_IP22)		+= 0xffffffff88002000
b9dbdce1 Ralf Baechle 2010-08-05  14  endif
b9dbdce1 Ralf Baechle 2010-08-05  15  ifdef CONFIG_64BIT
b9dbdce1 Ralf Baechle 2010-08-05  16  load-$(CONFIG_SGI_IP22)		+= 0xffffffff88004000
b9dbdce1 Ralf Baechle 2010-08-05  17  endif
b9dbdce1 Ralf Baechle 2010-08-05  18  
b9dbdce1 Ralf Baechle 2010-08-05  19  #
b9dbdce1 Ralf Baechle 2010-08-05  20  # SGI IP28 (Indigo2 R10k)
b9dbdce1 Ralf Baechle 2010-08-05  21  #
b9dbdce1 Ralf Baechle 2010-08-05  22  # Set the load address to >= 0xa800000020080000 if you want to leave space for
b9dbdce1 Ralf Baechle 2010-08-05  23  # symmon, 0xa800000020004000 for production kernels ?  Note that the value must
b9dbdce1 Ralf Baechle 2010-08-05  24  # be 16kb aligned or the handling of the current variable will break.
b9dbdce1 Ralf Baechle 2010-08-05  25  # Simplified: what IP22 does at 128MB+ in ksegN, IP28 does at 512MB+ in xkphys
b9dbdce1 Ralf Baechle 2010-08-05  26  #
b9dbdce1 Ralf Baechle 2010-08-05  27  ifdef CONFIG_SGI_IP28
b9dbdce1 Ralf Baechle 2010-08-05  28    ifeq ($(call cc-option-yn,-mr10k-cache-barrier=store), n)
b9dbdce1 Ralf Baechle 2010-08-05 @29        $(error gcc doesn't support needed option -mr10k-cache-barrier=store)
b9dbdce1 Ralf Baechle 2010-08-05  30    endif
b9dbdce1 Ralf Baechle 2010-08-05  31  endif
b9dbdce1 Ralf Baechle 2010-08-05  32  platform-$(CONFIG_SGI_IP28)		+= sgi-ip22/
b9dbdce1 Ralf Baechle 2010-08-05  33  cflags-$(CONFIG_SGI_IP28)	+= -mr10k-cache-barrier=store -I$(srctree)/arch/mips/include/asm/mach-ip28
b9dbdce1 Ralf Baechle 2010-08-05  34  load-$(CONFIG_SGI_IP28)		+= 0xa800000020004000



---
0-DAY kernel build testing backend              Open Source Technology Center
http://lists.01.org/mailman/listinfo/kbuild                 Intel Corporation

Re: arch/mips/sgi-ip22/Platform:29: *** gcc doesn't support needed option -mr10k-cache-barrier=store. Stop.

[Florian Lohoff]

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Hi,

On Wed, Apr 09, 2014 at 01:19:29PM +0800, Fengguang Wu wrote:
> b9dbdce1 Ralf Baechle 2010-08-05  27  ifdef CONFIG_SGI_IP28
> b9dbdce1 Ralf Baechle 2010-08-05  28    ifeq ($(call cc-option-yn,-mr10k-cache-barrier=store), n)
> b9dbdce1 Ralf Baechle 2010-08-05 @29        $(error gcc doesn't support needed option -mr10k-cache-barrier=store)
> b9dbdce1 Ralf Baechle 2010-08-05  30    endif
> b9dbdce1 Ralf Baechle 2010-08-05  31  endif
> b9dbdce1 Ralf Baechle 2010-08-05  32  platform-$(CONFIG_SGI_IP28)		+= sgi-ip22/
> b9dbdce1 Ralf Baechle 2010-08-05  33  cflags-$(CONFIG_SGI_IP28)	+= -mr10k-cache-barrier=store -I$(srctree)/arch/mips/include/asm/mach-ip28
> b9dbdce1 Ralf Baechle 2010-08-05  34  load-$(CONFIG_SGI_IP28)		+= 0xa800000020004000

Its IP28 only fixes in gcc see here:

http://gcc.gnu.org/ml/gcc-patches/2008-09/msg00041.html

Most likely they never made it into gcc upstream but they are
necessary working around the r10k speculative stores on non
cache coherent machines like the IP28.

Flo
-- 
Florian Lohoff                                                 f@zz.de

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Re: arch/mips/sgi-ip22/Platform:29: *** gcc doesn't support needed option -mr10k-cache-barrier=store. Stop.

[Thomas Bogendoerfer]

On Wed, Apr 09, 2014 at 10:24:45AM +0200, Florian Lohoff wrote:
> Most likely they never made it into gcc upstream but they are
> necessary working around the r10k speculative stores on non
> cache coherent machines like the IP28.

IMHO the patch went upstream judging from the incremental patches
here http://gcc.gnu.org/ml/gcc-patches/2012-12/msg01371.html.

Iirc it went into 4.4.0.

Thomas

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]

Re: arch/mips/sgi-ip22/Platform:29: *** gcc doesn't support needed option -mr10k-cache-barrier=store. Stop.

[Fengguang Wu]

On Wed, Apr 09, 2014 at 03:32:29PM +0200, Thomas Bogendoerfer wrote:
> On Wed, Apr 09, 2014 at 10:24:45AM +0200, Florian Lohoff wrote:
> > Most likely they never made it into gcc upstream but they are
> > necessary working around the r10k speculative stores on non
> > cache coherent machines like the IP28.
> 
> IMHO the patch went upstream judging from the incremental patches
> here http://gcc.gnu.org/ml/gcc-patches/2012-12/msg01371.html.
> 
> Iirc it went into 4.4.0.

That's interesting. I'm using the cross compiler

        gcc-4.6.3-nolibc/mips-linux

downloaded from

        https://www.kernel.org/pub/tools/crosstool/files/bin/x86_64/4.6.3/

I notice there is also a mips64 compiler. Should I use that?

Thanks,
Fengguang

Re: arch/mips/sgi-ip22/Platform:29: *** gcc doesn't support needed option -mr10k-cache-barrier=store. Stop.

[Joshua Kinard]

On 04/09/2014 19:13, Fengguang Wu wrote:
> On Wed, Apr 09, 2014 at 03:32:29PM +0200, Thomas Bogendoerfer wrote:
>> On Wed, Apr 09, 2014 at 10:24:45AM +0200, Florian Lohoff wrote:
>>> Most likely they never made it into gcc upstream but they are
>>> necessary working around the r10k speculative stores on non
>>> cache coherent machines like the IP28.
>>
>> IMHO the patch went upstream judging from the incremental patches
>> here http://gcc.gnu.org/ml/gcc-patches/2012-12/msg01371.html.
>>
>> Iirc it went into 4.4.0.
> 
> That's interesting. I'm using the cross compiler
> 
>         gcc-4.6.3-nolibc/mips-linux
> 
> downloaded from
> 
>         https://www.kernel.org/pub/tools/crosstool/files/bin/x86_64/4.6.3/
> 
> I notice there is also a mips64 compiler. Should I use that?

If you weren't using a mips64 compiler, that's probably the issue.  R10000
processors are 64-bit only, so a 'mips' toolchain probably doesn't include
the R10K cache-barrier code, causing that option to fail.

Are you configuring for IP22 (Indy, Indigo2 R4x00), or IP28 (R10000)?  Note,
IP26 (R8000) is not supported in Linux.  I think OpenBSD got it working, though.

-- 
Joshua Kinard
Gentoo/MIPS
kumba@gentoo.org
4096R/D25D95E3 2011-03-28

"The past tempts us, the present confuses us, the future frightens us.  And
our lives slip away, moment by moment, lost in that vast, terrible in-between."

--Emperor Turhan, Centauri Republic

Re: arch/mips/sgi-ip22/Platform:29: *** gcc doesn't support needed option -mr10k-cache-barrier=store. Stop.

[Ralf Baechle]

On Wed, Apr 09, 2014 at 07:44:42PM -0400, Joshua Kinard wrote:

> > I notice there is also a mips64 compiler. Should I use that?

The difference between a mips-linux, mips64-linux, mips64el-linux or mipsel-linux
compiler are only the defaults and they can be overridden with command
line options; the kernel makefiles will pass the required options.

> If you weren't using a mips64 compiler, that's probably the issue.  R10000
> processors are 64-bit only, so a 'mips' toolchain probably doesn't include
> the R10K cache-barrier code, causing that option to fail.

No - there's no mode switch.  An R10000 will happily run 32-bit code
otherwise 32 bit kernels wouldn't work.  32 bit code just doesn't use
64 bit addressing, instructions or the upper 32 bit of the 64 bit registers.

$ mips-linux-gcc -mr10k-cache-barrier=store -c -O2 -o c.o c.c
c.c:1:0: error: ‘-mr10k-cache-barrier’ requires a target that provides the ‘cache’ instruction
[...]

When adding an option like -mips32 the compilation will succeed.

> Are you configuring for IP22 (Indy, Indigo2 R4x00), or IP28 (R10000)?  Note,
> IP26 (R8000) is not supported in Linux.  I think OpenBSD got it working, though.

Wish I'd have a box ....

  Ralf

Re: arch/mips/sgi-ip22/Platform:29: *** gcc doesn't support needed option -mr10k-cache-barrier=store. Stop.

[Joshua Kinard]

On 04/09/2014 20:38, Ralf Baechle wrote:
> On Wed, Apr 09, 2014 at 07:44:42PM -0400, Joshua Kinard wrote:
> 
>> If you weren't using a mips64 compiler, that's probably the issue.  R10000
>> processors are 64-bit only, so a 'mips' toolchain probably doesn't include
>> the R10K cache-barrier code, causing that option to fail.
> 
> No - there's no mode switch.  An R10000 will happily run 32-bit code
> otherwise 32 bit kernels wouldn't work.  32 bit code just doesn't use
> 64 bit addressing, instructions or the upper 32 bit of the 64 bit registers.
> 
> $ mips-linux-gcc -mr10k-cache-barrier=store -c -O2 -o c.o c.c
> c.c:1:0: error: ‘-mr10k-cache-barrier’ requires a target that provides the ‘cache’ instruction
> [...]
> 
> When adding an option like -mips32 the compilation will succeed.

Odd, I thought R10K systems were locked to booting 64-bit kernels only.  At
least the Octane was when it was bootable.  Not sure about IP27.

Maybe that's another one of ARCS' ingenious features...


>> Are you configuring for IP22 (Indy, Indigo2 R4x00), or IP28 (R10000)?  Note,
>> IP26 (R8000) is not supported in Linux.  I think OpenBSD got it working, though.
> 
> Wish I'd have a box ....

They do pop up on eBay from time-to-time.  UPS destroyed the case mine came
in, though.  I've got it in a closet, with duct tape holding the teal skins
on.  It does boot to the PROM, but the RTC is probably dead by now.

-- 
Joshua Kinard
Gentoo/MIPS
kumba@gentoo.org
4096R/D25D95E3 2011-03-28

"The past tempts us, the present confuses us, the future frightens us.  And
our lives slip away, moment by moment, lost in that vast, terrible in-between."

--Emperor Turhan, Centauri Republic

Re: arch/mips/sgi-ip22/Platform:29: *** gcc doesn't support needed option -mr10k-cache-barrier=store. Stop.

[Ralf Baechle]

On Wed, Apr 09, 2014 at 11:02:10PM -0400, Joshua Kinard wrote:

> Odd, I thought R10K systems were locked to booting 64-bit kernels only.  At
> least the Octane was when it was bootable.  Not sure about IP27.
> 
> Maybe that's another one of ARCS' ingenious features...

No; IP27's address map is huge; a single node can take 2GB RAM.  A full
blown 512 CPU system could have 0.5TB memory.  Your homework for today:
try to use all that efficiently with highmem ;-)

Octane is essentially a specialized, single-node IP27.  It also can take
more memory than addressable in a 32 bit kernel which assumes that all memory
is visible in CKSEG0, all I/O in CKSEG1 - or you need to ioremap to CKSEG2/3.
So 32 bit kernels just don't cut it on Octane either.

Similarly 32 bit kernels don't cut it on other systems such as Sibyte,
SGI O2, Octane.  They may be possible for some configurations but that
that's either too rarely a useful choice or too inefficient.

Let's say 32 bit is slowly running out of juice :-)

> >> Are you configuring for IP22 (Indy, Indigo2 R4x00), or IP28 (R10000)?  Note,
> >> IP26 (R8000) is not supported in Linux.  I think OpenBSD got it working, though.
> > 
> > Wish I'd have a box ....
> 
> They do pop up on eBay from time-to-time.  UPS destroyed the case mine came
> in, though.  I've got it in a closet, with duct tape holding the teal skins
> on.  It does boot to the PROM, but the RTC is probably dead by now.

The common problem.  You can cut it open with a dremel or similar tool,
disconect the internal battery and connect an external battery instead.
There are howtos for this on the web.  I'm also tired of reprogramming
the MAC address again when I use my Indy so I should do this myself ...

  Ralf

Re: arch/mips/sgi-ip22/Platform:29: *** gcc doesn't support needed option -mr10k-cache-barrier=store. Stop.

[Joshua Kinard]

On 04/10/2014 02:59, Ralf Baechle wrote:
> On Wed, Apr 09, 2014 at 11:02:10PM -0400, Joshua Kinard wrote:
> 
>> Odd, I thought R10K systems were locked to booting 64-bit kernels only.  At
>> least the Octane was when it was bootable.  Not sure about IP27.
>>
>> Maybe that's another one of ARCS' ingenious features...
> 
> No; IP27's address map is huge; a single node can take 2GB RAM.  A full
> blown 512 CPU system could have 0.5TB memory.  Your homework for today:
> try to use all that efficiently with highmem ;-)

I'll need to upgrade my electrical service first.  Then install a fusion
power plant in the backyard, with hamster-wheel backups...


> Octane is essentially a specialized, single-node IP27.  It also can take
> more memory than addressable in a 32 bit kernel which assumes that all memory
> is visible in CKSEG0, all I/O in CKSEG1 - or you need to ioremap to CKSEG2/3.
> So 32 bit kernels just don't cut it on Octane either.

I believe that, in Stan's old patches, there was a cutoff at 2GB detected
memory, because he never resolved a problem with DMA/PCI on machines with
>2GB memory.  So the machine was kinda hamstrung there anyways.  That bit of
code was always confusing to forward-port.

If only I could finally find the motivation to figure out HEART's IRQ
trickery and Linux's IRQ system...


> Similarly 32 bit kernels don't cut it on other systems such as Sibyte,
> SGI O2, Octane.  They may be possible for some configurations but that
> that's either too rarely a useful choice or too inefficient.
> 
> Let's say 32 bit is slowly running out of juice :-)
> 

I wonder if I'll be alive when 128-bit becomes all the rage...


>>>> Are you configuring for IP22 (Indy, Indigo2 R4x00), or IP28 (R10000)?  Note,
>>>> IP26 (R8000) is not supported in Linux.  I think OpenBSD got it working, though.
>>>
>>> Wish I'd have a box ....
>>
>> They do pop up on eBay from time-to-time.  UPS destroyed the case mine came
>> in, though.  I've got it in a closet, with duct tape holding the teal skins
>> on.  It does boot to the PROM, but the RTC is probably dead by now.
> 
> The common problem.  You can cut it open with a dremel or similar tool,
> disconect the internal battery and connect an external battery instead.
> There are howtos for this on the web.  I'm also tired of reprogramming
> the MAC address again when I use my Indy so I should do this myself ...

I'll probably stick to finding old DS1386's on eBay :)  Never had much luck
w/ those cutting discs on a Dremel tool.  They shatter too easily and send
little shards of pain flying across the room.

-- 
Joshua Kinard
Gentoo/MIPS
kumba@gentoo.org
4096R/D25D95E3 2011-03-28

"The past tempts us, the present confuses us, the future frightens us.  And
our lives slip away, moment by moment, lost in that vast, terrible in-between."

--Emperor Turhan, Centauri Republic

Re: arch/mips/sgi-ip22/Platform:29: *** gcc doesn't support needed option -mr10k-cache-barrier=store. Stop.

[Miod Vallat]

> Odd, I thought R10K systems were locked to booting 64-bit kernels only.  At
> least the Octane was when it was bootable.  Not sure about IP27.

The Octane needs a 64-bit ARCS and kernel only because none of its
physical memory is addressable with KSEG0/KSEG1.

> >> IP26 (R8000) is not supported in Linux.  I think OpenBSD got it
working, though.

For some very limited value of working (it boots single-user but does not
last long due to page table corruption).

Miod

Re: arch/mips/sgi-ip22/Platform:29: *** gcc doesn't support needed option -mr10k-cache-barrier=store. Stop.

[Ralf Baechle]

On Thu, Apr 10, 2014 at 12:10:41PM +0000, Miod Vallat wrote:

> > Odd, I thought R10K systems were locked to booting 64-bit kernels only.  At
> > least the Octane was when it was bootable.  Not sure about IP27.
> 
> The Octane needs a 64-bit ARCS and kernel only because none of its
> physical memory is addressable with KSEG0/KSEG1.
> 
> > >> IP26 (R8000) is not supported in Linux.  I think OpenBSD got it
> working, though.
> 
> For some very limited value of working (it boots single-user but does not
> last long due to page table corruption).

The R8000 is infamous for its buggyness.  In a silent night in Mountain View
you can still hear SGI IRIX developers' curses echoing from distant
mountains ...

  Ralf

Re: arch/mips/sgi-ip22/Platform:29: *** gcc doesn't support needed option -mr10k-cache-barrier=store. Stop.

[Thomas Bogendoerfer]

On Thu, Apr 10, 2014 at 07:13:45AM +0800, Fengguang Wu wrote:
> > Iirc it went into 4.4.0.
> 
> That's interesting. I'm using the cross compiler
> 
>         gcc-4.6.3-nolibc/mips-linux

well the feature went into the gcc codebase 2008 according to ChangeLog-2008.

The mips64 cross compiler from FC19 (4.7.2) supports r10k-cache-barriers
out of the box.

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]

Re: arch/mips/sgi-ip22/Platform:29: *** gcc doesn't support needed option -mr10k-cache-barrier=store. Stop.

[peter fuerst]

On Thu, 10 Apr 2014, Miod Vallat wrote:

> Date: Thu, 10 Apr 2014 12:10:41 +0000 (UTC)
> From: Miod Vallat <miod@online.fr>
> To: linux-mips@linux-mips.org
> Subject: Re: arch/mips/sgi-ip22/Platform:29: *** gcc doesn't support needed
>     option -mr10k-cache-barrier=store.  Stop.
> 
>> Odd, I thought R10K systems were locked to booting 64-bit kernels only.  At
>> least the Octane was when it was bootable.  Not sure about IP27.
>
> The Octane needs a 64-bit ARCS and kernel only because none of its
> physical memory is addressable with KSEG0/KSEG1.

The same holds for IP28. Apparently SGI prepared it for the 128MB SIMMS
(banks of 512MB) yet to come.

>
>>>> IP26 (R8000) is not supported in Linux.  I think OpenBSD got it
> working, though.
>
> For some very limited value of working (it boots single-user but does not
> last long due to page table corruption).
>
> Miod
>
>
>

kind regards