[PATCH 04/16] PCI: PCIe portdrv: Allocate CXL isolation MSI/-X vector

[Ben Cheatham <Benjamin.Cheatham@amd.com>]

Update the PCIe portdrv MSI/-X vector allocation code to include the CXL
isolation service.

Signed-off-by: Ben Cheatham <Benjamin.Cheatham@amd.com>
---
 drivers/pci/pcie/portdrv.c | 20 ++++++++++++++++----
 1 file changed, 16 insertions(+), 4 deletions(-)

diff --git a/drivers/pci/pcie/portdrv.c b/drivers/pci/pcie/portdrv.c
index 465d1aec4ca6..6119e2e25ad2 100644
--- a/drivers/pci/pcie/portdrv.c
+++ b/drivers/pci/pcie/portdrv.c
@@ -50,12 +50,12 @@ static void release_pcie_device(struct device *dev)
 }
 
 /*
- * Fill in *pme, *aer, *dpc with the relevant Interrupt Message Numbers if
+ * Fill in *pme, *aer, *dpc, *iso with the relevant Interrupt Message Numbers if
  * services are enabled in "mask".  Return the number of MSI/MSI-X vectors
  * required to accommodate the largest Message Number.
  */
 static int pcie_message_numbers(struct pci_dev *dev, int mask,
-				u32 *pme, u32 *aer, u32 *dpc)
+				u32 *pme, u32 *aer, u32 *dpc, u32 *iso)
 {
 	u32 nvec = 0, pos;
 	u16 reg16;
@@ -98,6 +98,11 @@ static int pcie_message_numbers(struct pci_dev *dev, int mask,
 		}
 	}
 
+	if (mask & PCIE_PORT_SERVICE_CXLISO) {
+		if (pcie_cxliso_get_intr_vec(dev, iso) == 0)
+			nvec = max(nvec, *iso + 1);
+	}
+
 	return nvec;
 }
 
@@ -113,7 +118,7 @@ static int pcie_message_numbers(struct pci_dev *dev, int mask,
 static int pcie_port_enable_irq_vec(struct pci_dev *dev, int *irqs, int mask)
 {
 	int nr_entries, nvec, pcie_irq;
-	u32 pme = 0, aer = 0, dpc = 0;
+	u32 pme = 0, aer = 0, dpc = 0, iso = 0;
 
 	/* Allocate the maximum possible number of MSI/MSI-X vectors */
 	nr_entries = pci_alloc_irq_vectors(dev, 1, PCIE_PORT_MAX_MSI_ENTRIES,
@@ -122,7 +127,7 @@ static int pcie_port_enable_irq_vec(struct pci_dev *dev, int *irqs, int mask)
 		return nr_entries;
 
 	/* See how many and which Interrupt Message Numbers we actually use */
-	nvec = pcie_message_numbers(dev, mask, &pme, &aer, &dpc);
+	nvec = pcie_message_numbers(dev, mask, &pme, &aer, &dpc, &iso);
 	if (nvec > nr_entries) {
 		pci_free_irq_vectors(dev);
 		return -EIO;
@@ -163,6 +168,9 @@ static int pcie_port_enable_irq_vec(struct pci_dev *dev, int *irqs, int mask)
 	if (mask & PCIE_PORT_SERVICE_DPC)
 		irqs[PCIE_PORT_SERVICE_DPC_SHIFT] = pci_irq_vector(dev, dpc);
 
+	if (mask & PCIE_PORT_SERVICE_CXLISO)
+		irqs[PCIE_PORT_SERVICE_CXLISO_SHIFT] = pci_irq_vector(dev, iso);
+
 	return 0;
 }
 
@@ -278,6 +286,10 @@ static int get_port_device_capability(struct pci_dev *dev)
 			services |= PCIE_PORT_SERVICE_BWCTRL;
 	}
 
+	if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT &&
+	    pcie_cxliso_get_intr_vec(dev, NULL) == 0)
+			services |= PCIE_PORT_SERVICE_CXLISO;
+
 	return services;
 }
 
-- 
2.34.1