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From: Jonathan Cameron <jonathan.cameron@huawei.com>
To: Ben Cheatham <Benjamin.Cheatham@amd.com>
Cc: <linux-cxl@vger.kernel.org>, <linux-pci@vger.kernel.org>,
	<linux-acpi@vger.kernel.org>
Subject: Re: [PATCH 12/16] PCI: PCIe portdrv: Add cxl_isolation sysfs attributes
Date: Fri, 12 Sep 2025 16:33:48 +0100	[thread overview]
Message-ID: <20250912163348.00004d1b@huawei.com> (raw)
In-Reply-To: <20250730214718.10679-13-Benjamin.Cheatham@amd.com>

On Wed, 30 Jul 2025 16:47:14 -0500
Ben Cheatham <Benjamin.Cheatham@amd.com> wrote:

> Add sysfs attributes to enable/disable CXL isolation and transaction
> timeout. The intended use for these attributes is to disable isolation
> and/or timeout as part of device maintenance or hotplug.
> 
> The attributes are added under a new "cxl_isolation" group on the PCIe
> Root Port device.
> 
> Signed-off-by: Ben Cheatham <Benjamin.Cheatham@amd.com>
Comments below apply in quite a few of these functions, I just
picked one example to talk about.

Thanks,

Jonathan

> diff --git a/drivers/pci/pcie/cxl_isolation.c b/drivers/pci/pcie/cxl_isolation.c
> index 5a56a327b599..9d2ad14810e8 100644
> --- a/drivers/pci/pcie/cxl_isolation.c
> +++ b/drivers/pci/pcie/cxl_isolation.c



> +static ssize_t timeout_ctrl_show(struct device *dev,
> +				 struct device_attribute *attr, char *buf)
> +{
> +	struct pci_dev *pdev = to_pci_dev(dev);
> +	struct cxl_port *port;
> +	u32 ctrl;
> +
> +	struct cxl_dport **dport __free(kfree) =
> +		kzalloc(sizeof(*dport), GFP_KERNEL);
> +	if (!dport)
> +		return -ENOMEM;
> +
> +	port = cxl_find_pcie_rp(pdev, dport);
	struct cxl_port *port __free(put_cxl_port) = cxl_find_pcie_rp();

Same for other cases above.


> +	if (!port || !(*dport))

leaks device reference if port is set and dport isn't.

> +		return -ENODEV;
> +
> +	if (!(*dport)->regs.isolation)
leaks device reference.
> +		return -ENXIO;
> +
> +	ctrl = readl((*dport)->regs.isolation + CXL_ISOLATION_CTRL_OFFSET);
> +	put_device(&port->dev);

and no need to do this by hand.

> +
> +	return sysfs_emit(buf, "%lu\n",
> +			  FIELD_GET(CXL_ISOLATION_CTRL_MEM_TIME_ENABLE, ctrl));
> +}
> +DEVICE_ATTR_RW(timeout_ctrl);
> +
> +static struct attribute *isolation_attrs[] = {
> +	&dev_attr_timeout_ctrl.attr,
> +	&dev_attr_isolation_ctrl.attr,
> +	NULL,
My favorite trivial comment :) No need for that trailing comma.
> +};




  reply	other threads:[~2025-09-12 15:33 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-30 21:47 [PATCH 00/16] CXL.mem error isolation support Ben Cheatham
2025-07-30 21:47 ` [PATCH 01/16] cxl/regs: Add cxl_unmap_component_regs() Ben Cheatham
2025-09-12 14:46   ` Jonathan Cameron
2025-09-17 17:26     ` Cheatham, Benjamin
2025-07-30 21:47 ` [PATCH 02/16] cxl/regs: Add CXL Isolation capability mapping Ben Cheatham
2025-09-12 14:47   ` Jonathan Cameron
2025-07-30 21:47 ` [PATCH 03/16] PCI: PCIe portdrv: Add CXL Isolation service driver Ben Cheatham
2025-09-12 15:14   ` Jonathan Cameron
2025-09-17 17:26     ` Cheatham, Benjamin
2025-07-30 21:47 ` [PATCH 04/16] PCI: PCIe portdrv: Allocate CXL isolation MSI/-X vector Ben Cheatham
2025-08-04 21:39   ` Bjorn Helgaas
2025-08-06 17:58     ` Cheatham, Benjamin
2025-07-30 21:47 ` [PATCH 05/16] PCI: PCIe portdrv: Add interface for getting CXL isolation IRQ Ben Cheatham
2025-07-31  5:59   ` Lukas Wunner
2025-07-31 13:13     ` Cheatham, Benjamin
2025-07-30 21:47 ` [PATCH 06/16] cxl/core: Enable CXL.mem isolation Ben Cheatham
2025-09-12 15:21   ` Jonathan Cameron
2025-09-17 17:26     ` Cheatham, Benjamin
2025-07-30 21:47 ` [PATCH 07/16] cxl/core: Set up isolation interrupts Ben Cheatham
2025-09-12 15:25   ` Jonathan Cameron
2025-09-17 17:27     ` Cheatham, Benjamin
2025-07-30 21:47 ` [PATCH 08/16] cxl/core: Enable CXL " Ben Cheatham
2025-07-30 21:47 ` [PATCH 09/16] cxl/core: Prevent onlining CXL memory behind isolated ports Ben Cheatham
2025-07-30 21:47 ` [PATCH 10/16] cxl/core: Enable CXL.mem timeout Ben Cheatham
2025-07-30 21:47 ` [PATCH 11/16] cxl/pci: Add isolation handler Ben Cheatham
2025-07-30 21:47 ` [PATCH 12/16] PCI: PCIe portdrv: Add cxl_isolation sysfs attributes Ben Cheatham
2025-09-12 15:33   ` Jonathan Cameron [this message]
2025-09-17 17:27     ` Cheatham, Benjamin
2025-07-30 21:47 ` [PATCH 13/16] cxl/core, PCI: PCIe portdrv: Add CXL timeout range programming Ben Cheatham
2025-08-04 21:39   ` Bjorn Helgaas
2025-08-06 17:58     ` Cheatham, Benjamin
2025-09-12 15:55   ` Jonathan Cameron
2025-09-17 17:27     ` Cheatham, Benjamin
2025-07-30 21:47 ` [PATCH 14/16] ACPI: Add CXL isolation _OSC fields Ben Cheatham
2025-08-22 19:19   ` Rafael J. Wysocki
2025-07-30 21:47 ` [PATCH 15/16] cxl/core, cxl/acpi: Enable CXL isolation based on _OSC handshake Ben Cheatham
2025-07-30 21:47 ` [PATCH 16/16] cxl/core, cxl/acpi: Add CXL isolation notify handler Ben Cheatham

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