Re: [PATCH 07/16] cxl/core: Set up isolation interrupts

[Jonathan Cameron <jonathan.cameron@huawei.com>]

On Wed, 30 Jul 2025 16:47:09 -0500
Ben Cheatham <Benjamin.Cheatham@amd.com> wrote:

> Register a CXL isolation interrupt handler as part of cxl_dport set up.
> Only CXL-capable PCIe Root Ports have CXL.mem isolation interrupt support.
> The interrupts are left masked and will be unmasked in a later commit.
> 
> A CXL-capable PCIe Root Port that has CXL.mem isolation support and no
> interrupt support will have any isolation support enabled. If
> isolation were enabled without interrupts CXL.mem transactions could
> return poisoned data. This could cause data/system corruption if left
> unhandled, so the capability is left disabled in this case.
> 
> CXL endpoint drivers can add an isolation handler for a device through
> the isolation_handler member of struct cxl_dev_state. If this handler
> is not present, the system will panic. If the handler opts to not panic
> (i.e. returns "CXL_ERR_NONE"), the endpoint driver is charged with
> maintaining system reliability (cleaning up CXL memory, disabling device
> state, etc.).
> 
> Signed-off-by: Ben Cheatham <Benjamin.Cheatham@amd.com>


>  /**
>   * cxl_dport_enable_isolation - Enable CXL Isolation for a CXL dport. This is
>   * an optional capability only supported by PCIe Root Ports.
> - *
Make the edit on original patch if you want to get rid of this line.

> + * @host: Host device for @dport
>   * @dport: CXL-capable PCIe Root Port
>   *
>   * Returns 0 if capability unsupported, or when enabled.
>   */