* [PULL 01/33] target/s390x: Fix missing privileged flag at PCKMO instruction
2026-09-21 20:07 [PULL 00/33] s390x queue for 11.2 Eric Farman
@ 2026-09-21 20:07 ` Eric Farman
2026-09-21 20:07 ` [PULL 02/33] target/s390x: Rework s390 cpacf implementations Eric Farman
` (32 subsequent siblings)
33 siblings, 0 replies; 35+ messages in thread
From: Eric Farman @ 2026-09-21 20:07 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-s390x, Matthew Rosato, Cornelia Huck, Harald Freudenberger,
Eric Farman
From: Harald Freudenberger <freude@linux.ibm.com>
The CPACF instruction PCKMO is a privileged instruction. So set the
IF_PRIV flag in insn-data.h.inc to reflect this.
Signed-off-by: Harald Freudenberger <freude@linux.ibm.com>
Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260824083204.40877-2-freude@linux.ibm.com
Signed-off-by: Eric Farman <farman@linux.ibm.com>
---
target/s390x/tcg/insn-data.h.inc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/s390x/tcg/insn-data.h.inc b/target/s390x/tcg/insn-data.h.inc
index 68260ffd9d..b5683f7641 100644
--- a/target/s390x/tcg/insn-data.h.inc
+++ b/target/s390x/tcg/insn-data.h.inc
@@ -1007,7 +1007,7 @@
/* MSA Instructions */
D(0xb91e, KMAC, RRE, MSA, 0, 0, 0, 0, msa, 0, S390_FEAT_TYPE_KMAC)
- D(0xb928, PCKMO, RRE, MSA3, 0, 0, 0, 0, msa, 0, S390_FEAT_TYPE_PCKMO)
+ E(0xb928, PCKMO, RRE, MSA3, 0, 0, 0, 0, msa, 0, S390_FEAT_TYPE_PCKMO, IF_PRIV)
D(0xb92a, KMF, RRE, MSA4, 0, 0, 0, 0, msa, 0, S390_FEAT_TYPE_KMF)
D(0xb92b, KMO, RRE, MSA4, 0, 0, 0, 0, msa, 0, S390_FEAT_TYPE_KMO)
D(0xb92c, PCC, RRE, MSA4, 0, 0, 0, 0, msa, 0, S390_FEAT_TYPE_PCC)
--
2.55.0
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PULL 02/33] target/s390x: Rework s390 cpacf implementations
2026-09-21 20:07 [PULL 00/33] s390x queue for 11.2 Eric Farman
2026-09-21 20:07 ` [PULL 01/33] target/s390x: Fix missing privileged flag at PCKMO instruction Eric Farman
@ 2026-09-21 20:07 ` Eric Farman
2026-09-21 20:08 ` [PULL 03/33] target/s390x: Move cpacf sha512 code into a new file Eric Farman
` (31 subsequent siblings)
33 siblings, 0 replies; 35+ messages in thread
From: Eric Farman @ 2026-09-21 20:07 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-s390x, Matthew Rosato, Cornelia Huck, Harald Freudenberger,
Eric Farman
From: Harald Freudenberger <freude@linux.ibm.com>
Fix missing parts for MSA 9 kdsa and rework the cpacf handling code
so that further extensions can be made in a clean and structured way.
Introduce a new header file cpacf-arch.h to hold defines, structs and
function prototypes around s390 cpacf. Use the cpcaf function defines
in the existing code.
Signed-off-by: Harald Freudenberger <freude@linux.ibm.com>
Tested-by: Holger Dengler <dengler@linux.ibm.com>
Reviewed-by: Holger Dengler <dengler@linux.ibm.com>
Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260824083204.40877-3-freude@linux.ibm.com
Signed-off-by: Eric Farman <farman@linux.ibm.com>
---
target/s390x/tcg/cpacf-arch.h | 226 +++++++++++++++++++++++++++++++
target/s390x/tcg/crypto_helper.c | 101 +++++++++++---
target/s390x/tcg/insn-data.h.inc | 1 +
target/s390x/tcg/translate.c | 2 +
4 files changed, 311 insertions(+), 19 deletions(-)
create mode 100644 target/s390x/tcg/cpacf-arch.h
diff --git a/target/s390x/tcg/cpacf-arch.h b/target/s390x/tcg/cpacf-arch.h
new file mode 100644
index 0000000000..f92e4b44e3
--- /dev/null
+++ b/target/s390x/tcg/cpacf-arch.h
@@ -0,0 +1,226 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * s390x cpacf-arch
+ *
+ */
+
+#ifndef S390X_CPACF_ARCH_H
+#define S390X_CPACF_ARCH_H
+
+/*
+ * Function codes for the KM instruction
+ */
+#define CPACF_KM_QUERY 0x00
+#define CPACF_KM_DEA 0x01
+#define CPACF_KM_TDEA_128 0x02
+#define CPACF_KM_TDEA_192 0x03
+#define CPACF_KM_AES_128 0x12
+#define CPACF_KM_AES_192 0x13
+#define CPACF_KM_AES_256 0x14
+#define CPACF_KM_PAES_128 0x1a
+#define CPACF_KM_PAES_192 0x1b
+#define CPACF_KM_PAES_256 0x1c
+#define CPACF_KM_XTS_128 0x32
+#define CPACF_KM_XTS_256 0x34
+#define CPACF_KM_PXTS_128 0x3a
+#define CPACF_KM_PXTS_256 0x3c
+#define CPACF_KM_FULL_XTS_128 0x52
+#define CPACF_KM_FULL_XTS_256 0x54
+#define CPACF_KM_FULL_PXTS_128 0x5a
+#define CPACF_KM_FULL_PXTS_256 0x5c
+
+/*
+ * Function codes for the KMC instruction
+ */
+#define CPACF_KMC_QUERY 0x00
+#define CPACF_KMC_DEA 0x01
+#define CPACF_KMC_TDEA_128 0x02
+#define CPACF_KMC_TDEA_192 0x03
+#define CPACF_KMC_AES_128 0x12
+#define CPACF_KMC_AES_192 0x13
+#define CPACF_KMC_AES_256 0x14
+#define CPACF_KMC_PAES_128 0x1a
+#define CPACF_KMC_PAES_192 0x1b
+#define CPACF_KMC_PAES_256 0x1c
+#define CPACF_KMC_PRNG 0x43
+
+/*
+ * Function codes for the KMCTR instruction
+ */
+#define CPACF_KMCTR_QUERY 0x00
+#define CPACF_KMCTR_DEA 0x01
+#define CPACF_KMCTR_TDEA_128 0x02
+#define CPACF_KMCTR_TDEA_192 0x03
+#define CPACF_KMCTR_AES_128 0x12
+#define CPACF_KMCTR_AES_192 0x13
+#define CPACF_KMCTR_AES_256 0x14
+#define CPACF_KMCTR_PAES_128 0x1a
+#define CPACF_KMCTR_PAES_192 0x1b
+#define CPACF_KMCTR_PAES_256 0x1c
+
+/*
+ * Function codes for the KIMD instruction
+ */
+#define CPACF_KIMD_QUERY 0x00
+#define CPACF_KIMD_SHA_1 0x01
+#define CPACF_KIMD_SHA_256 0x02
+#define CPACF_KIMD_SHA_512 0x03
+#define CPACF_KIMD_SHA3_224 0x20
+#define CPACF_KIMD_SHA3_256 0x21
+#define CPACF_KIMD_SHA3_384 0x22
+#define CPACF_KIMD_SHA3_512 0x23
+#define CPACF_KIMD_SHAKE_128 0x24
+#define CPACF_KIMD_SHAKE_256 0x25
+#define CPACF_KIMD_GHASH 0x41
+
+/*
+ * Function codes for the KLMD instruction
+ */
+#define CPACF_KLMD_QUERY 0x00
+#define CPACF_KLMD_SHA_1 0x01
+#define CPACF_KLMD_SHA_256 0x02
+#define CPACF_KLMD_SHA_512 0x03
+#define CPACF_KLMD_SHA3_224 0x20
+#define CPACF_KLMD_SHA3_256 0x21
+#define CPACF_KLMD_SHA3_384 0x22
+#define CPACF_KLMD_SHA3_512 0x23
+#define CPACF_KLMD_SHAKE_128 0x24
+#define CPACF_KLMD_SHAKE_256 0x25
+
+/*
+ * function codes for the KMAC instruction
+ */
+#define CPACF_KMAC_QUERY 0x00
+#define CPACF_KMAC_DEA 0x01
+#define CPACF_KMAC_TDEA_128 0x02
+#define CPACF_KMAC_TDEA_192 0x03
+#define CPACF_KMAC_AES_128 0x12
+#define CPACF_KMAC_AES_192 0x13
+#define CPACF_KMAC_AES_256 0x14
+#define CPACF_KMAC_PAES_128 0x1A
+#define CPACF_KMAC_PAES_192 0x1B
+#define CPACF_KMAC_PAES_256 0x1C
+#define CPACF_KMAC_HMAC_SHA_224 0x70
+#define CPACF_KMAC_HMAC_SHA_256 0x71
+#define CPACF_KMAC_HMAC_SHA_384 0x72
+#define CPACF_KMAC_HMAC_SHA_512 0x73
+#define CPACF_KMAC_PHMAC_SHA_224 0x78
+#define CPACF_KMAC_PHMAC_SHA_256 0x79
+#define CPACF_KMAC_PHMAC_SHA_384 0x7a
+#define CPACF_KMAC_PHMAC_SHA_512 0x7b
+
+/*
+ * Function codes for the PCKMO instruction
+ */
+#define CPACF_PCKMO_QUERY 0x00
+#define CPACF_PCKMO_ENC_DES_KEY 0x01
+#define CPACF_PCKMO_ENC_TDES_128_KEY 0x02
+#define CPACF_PCKMO_ENC_TDES_192_KEY 0x03
+#define CPACF_PCKMO_ENC_AES_128_KEY 0x12
+#define CPACF_PCKMO_ENC_AES_192_KEY 0x13
+#define CPACF_PCKMO_ENC_AES_256_KEY 0x14
+#define CPACF_PCKMO_ENC_AES_XTS_128_DOUBLE_KEY 0x15
+#define CPACF_PCKMO_ENC_AES_XTS_256_DOUBLE_KEY 0x16
+#define CPACF_PCKMO_ENC_ECC_P256_KEY 0x20
+#define CPACF_PCKMO_ENC_ECC_P384_KEY 0x21
+#define CPACF_PCKMO_ENC_ECC_P521_KEY 0x22
+#define CPACF_PCKMO_ENC_ECC_ED25519_KEY 0x28
+#define CPACF_PCKMO_ENC_ECC_ED448_KEY 0x29
+#define CPACF_PCKMO_ENC_HMAC_512_KEY 0x76
+#define CPACF_PCKMO_ENC_HMAC_1024_KEY 0x7a
+
+/*
+ * Function codes for the PRNO instruction
+ */
+#define CPACF_PRNO_QUERY 0x00
+#define CPACF_PRNO_SHA512_DRNG_GEN 0x03
+#define CPACF_PRNO_SHA512_DRNG_SEED 0x83
+#define CPACF_PRNO_TRNG_Q_R2C_RATIO 0x70
+#define CPACF_PRNO_TRNG 0x72
+
+/*
+ * Function codes for the KMA instruction
+ */
+#define CPACF_KMA_QUERY 0x00
+#define CPACF_KMA_GCM_AES_128 0x12
+#define CPACF_KMA_GCM_AES_192 0x13
+#define CPACF_KMA_GCM_AES_256 0x14
+#define CPACF_KMA_GCM_PAES_128 0x1A
+#define CPACF_KMA_GCM_PAES_192 0x1B
+#define CPACF_KMA_GCM_PAES_256 0x1C
+
+/*
+ * Function codes for the KMF instruction
+ */
+#define CPACF_KMF_QUERY 0
+#define CPACF_KMF_DEA 1
+#define CPACF_KMF_TDEA_128 2
+#define CPACF_KMF_TDEA_192 3
+#define CPACF_KMF_AES_128 18
+#define CPACF_KMF_AES_192 19
+#define CPACF_KMF_AES_256 20
+#define CPACF_KMF_PAES_128 26
+#define CPACF_KMF_PAES_192 27
+#define CPACF_KMF_PAES_256 28
+
+/*
+ * Function codes for the KMO instruction
+ */
+#define CPACF_KMO_QUERY 0
+#define CPACF_KMO_DEA 1
+#define CPACF_KMO_TDEA_128 2
+#define CPACF_KMO_TDEA_192 3
+#define CPACF_KMO_AES_128 18
+#define CPACF_KMO_AES_192 19
+#define CPACF_KMO_AES_256 20
+#define CPACF_KMO_PAES_128 26
+#define CPACF_KMO_PAES_192 27
+#define CPACF_KMO_PAES_256 28
+
+/*
+ * Function codes for the PCC instruction
+ */
+#define CPACF_PCC_QUERY 0
+#define CPACF_PCC_CMAC_DEA 1
+#define CPACF_PCC_CMAC_TDEA_128 2
+#define CPACF_PCC_CMAC_TDEA_192 3
+#define CPACF_PCC_CMAC_AES_128 18
+#define CPACF_PCC_CMAC_AES_192 19
+#define CPACF_PCC_CMAC_AES_256 20
+#define CPACF_PCC_CMAC_PAES_128 26
+#define CPACF_PCC_CMAC_PAES_192 27
+#define CPACF_PCC_CMAC_PAES_256 28
+#define CPACF_PCC_XTS_AES_128 50
+#define CPACF_PCC_XTS_AES_256 52
+#define CPACF_PCC_XTS_PAES_128 58
+#define CPACF_PCC_XTS_PAES_256 60
+#define CPACF_PCC_SM_P256 64
+#define CPACF_PCC_SM_P384 65
+#define CPACF_PCC_SM_P521 66
+#define CPACF_PCC_SM_ED25519 72
+#define CPACF_PCC_SM_ED448 73
+#define CPACF_PCC_SM_X25519 80
+#define CPACF_PCC_SM_X448 81
+
+/*
+ * Function codes for the KDSA instruction
+ */
+#define CPACF_KDSA_QUERY 0
+#define CPACF_KDSA_VERIFY_P256 1
+#define CPACF_KDSA_VERIFY_P384 2
+#define CPACF_KDSA_VERIFY_P521 3
+#define CPACF_KDSA_SIGN_P256 9
+#define CPACF_KDSA_SIGN_P384 10
+#define CPACF_KDSA_SIGN_P521 11
+#define CPACF_KDSA_PSIGN_P256 17
+#define CPACF_KDSA_PSIGN_P384 18
+#define CPACF_KDSA_PSIGN_P521 19
+#define CPACF_KDSA_VERIFY_ED25519 32
+#define CPACF_KDSA_VERIFY_ED448 36
+#define CPACF_KDSA_SIGN_ED25519 40
+#define CPACF_KDSA_SIGN_ED448 44
+#define CPACF_KDSA_PSIGN_ED25519 48
+#define CPACF_KDSA_PSIGN_ED448 52
+
+#endif /* S390X_CPACF_ARCH_H */
diff --git a/target/s390x/tcg/crypto_helper.c b/target/s390x/tcg/crypto_helper.c
index 6a5dbe1caf..e39ad153a8 100644
--- a/target/s390x/tcg/crypto_helper.c
+++ b/target/s390x/tcg/crypto_helper.c
@@ -20,6 +20,7 @@
#include "exec/helper-proto.h"
#include "accel/tcg/cpu-ldst-common.h"
#include "accel/tcg/cpu-mmu-index.h"
+#include "target/s390x/tcg/cpacf-arch.h"
static uint64_t R(uint64_t x, int c)
{
@@ -275,6 +276,61 @@ static int fill_buf_random(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
return len == 0 ? 0 : 3;
}
+static int cpacf_kimd(CPUS390XState *env, const int mmu_idx, const uintptr_t ra,
+ uint32_t r1, uint32_t r2, uint32_t r3, uint8_t fc)
+{
+ int rc = 0;
+
+ switch (fc) {
+ case CPACF_KIMD_SHA_512:
+ rc = cpacf_sha512(env, mmu_idx, ra, env->regs[1], &env->regs[r2],
+ &env->regs[r2 + 1], S390_FEAT_TYPE_KIMD);
+ break;
+ default:
+ tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
+ }
+
+ return rc;
+}
+
+static int cpacf_klmd(CPUS390XState *env, const int mmu_idx, const uintptr_t ra,
+ uint32_t r1, uint32_t r2, uint32_t r3, uint8_t fc)
+{
+ int rc = 0;
+
+ switch (fc) {
+ case CPACF_KLMD_SHA_512:
+ rc = cpacf_sha512(env, mmu_idx, ra, env->regs[1], &env->regs[r2],
+ &env->regs[r2 + 1], S390_FEAT_TYPE_KLMD);
+ break;
+ default:
+ tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
+ }
+
+ return rc;
+}
+
+static int cpacf_ppno(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
+ uint32_t r1, uint32_t r2, uint32_t r3, uint8_t fc)
+{
+ int rc = 0;
+
+ switch (fc) {
+ case CPACF_PRNO_TRNG:
+ rc = fill_buf_random(env, mmu_idx, ra,
+ &env->regs[r1], &env->regs[r1 + 1]);
+ if (!rc) {
+ rc = fill_buf_random(env, mmu_idx, ra,
+ &env->regs[r2], &env->regs[r2 + 1]);
+ }
+ break;
+ default:
+ tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
+ }
+
+ return rc;
+}
+
uint32_t HELPER(msa)(CPUS390XState *env, uint32_t r1, uint32_t r2, uint32_t r3,
uint32_t type)
{
@@ -285,14 +341,15 @@ uint32_t HELPER(msa)(CPUS390XState *env, uint32_t r1, uint32_t r2, uint32_t r3,
uint8_t subfunc[16] = { 0 };
uint64_t param_addr;
MemOpIdx oi;
- int cc;
+ int rc = 0;
switch (type) {
- case S390_FEAT_TYPE_KMAC:
+ case S390_FEAT_TYPE_KDSA:
case S390_FEAT_TYPE_KIMD:
case S390_FEAT_TYPE_KLMD:
- case S390_FEAT_TYPE_PCKMO:
+ case S390_FEAT_TYPE_KMAC:
case S390_FEAT_TYPE_PCC:
+ case S390_FEAT_TYPE_PCKMO:
if (mod) {
tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
}
@@ -304,29 +361,35 @@ uint32_t HELPER(msa)(CPUS390XState *env, uint32_t r1, uint32_t r2, uint32_t r3,
tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
}
- switch (fc) {
- case 0: /* query subfunction */
+ /* handle query subfunction */
+ if (fc == 0) {
oi = make_memop_idx(MO_8, mmu_idx);
- for (int i = 0; i < 16; i++) {
+ for (int i = 0; i < sizeof(subfunc); i++) {
param_addr = wrap_address(env, env->regs[1] + i);
cpu_stb_mmu(env, param_addr, subfunc[i], oi, ra);
}
+ goto out;
+ }
+
+ switch (type) {
+ case S390_FEAT_TYPE_KIMD:
+ rc = cpacf_kimd(env, mmu_idx, ra, r1, r2, r3, fc);
+ break;
+ case S390_FEAT_TYPE_KLMD:
+ rc = cpacf_klmd(env, mmu_idx, ra, r1, r2, r3, fc);
+ break;
+ case S390_FEAT_TYPE_PPNO:
+ rc = cpacf_ppno(env, mmu_idx, ra, r1, r2, r3, fc);
+ break;
+ case S390_FEAT_TYPE_KDSA:
+ case S390_FEAT_TYPE_KMAC:
+ /* subfunctions (other than query) are not implemented yet */
+ tcg_s390_program_interrupt(env, PGM_OPERATION, ra);
break;
- case 3: /* CPACF_*_SHA_512 */
- return cpacf_sha512(env, mmu_idx, ra, env->regs[1], &env->regs[r2],
- &env->regs[r2 + 1], type);
- case 114: /* CPACF_PRNO_TRNG */
- cc = fill_buf_random(env, mmu_idx, ra,
- &env->regs[r1], &env->regs[r1 + 1]);
- if (cc == 0) {
- cc = fill_buf_random(env, mmu_idx, ra,
- &env->regs[r2], &env->regs[r2 + 1]);
- }
- return cc;
default:
- /* we don't implement any other subfunction yet */
g_assert_not_reached();
}
- return 0;
+out:
+ return rc;
}
diff --git a/target/s390x/tcg/insn-data.h.inc b/target/s390x/tcg/insn-data.h.inc
index b5683f7641..0c236e2631 100644
--- a/target/s390x/tcg/insn-data.h.inc
+++ b/target/s390x/tcg/insn-data.h.inc
@@ -1015,6 +1015,7 @@
D(0xb92e, KM, RRE, MSA, 0, 0, 0, 0, msa, 0, S390_FEAT_TYPE_KM)
D(0xb92f, KMC, RRE, MSA, 0, 0, 0, 0, msa, 0, S390_FEAT_TYPE_KMC)
D(0xb929, KMA, RRF_b, MSA8, 0, 0, 0, 0, msa, 0, S390_FEAT_TYPE_KMA)
+ D(0xb93a, KDSA, RRE, MSA9, 0, 0, 0, 0, msa, 0, S390_FEAT_TYPE_KDSA)
E(0xb93c, PPNO, RRE, MSA5, 0, 0, 0, 0, msa, 0, S390_FEAT_TYPE_PPNO, IF_IO)
D(0xb93e, KIMD, RRE, MSA, 0, 0, 0, 0, msa, 0, S390_FEAT_TYPE_KIMD)
D(0xb93f, KLMD, RRE, MSA, 0, 0, 0, 0, msa, 0, S390_FEAT_TYPE_KLMD)
diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c
index a4374bd41f..7e74e9742f 100644
--- a/target/s390x/tcg/translate.c
+++ b/target/s390x/tcg/translate.c
@@ -2585,6 +2585,7 @@ static DisasJumpType op_msa(DisasContext *s, DisasOps *o)
case S390_FEAT_TYPE_KMAC:
case S390_FEAT_TYPE_KIMD:
case S390_FEAT_TYPE_KLMD:
+ case S390_FEAT_TYPE_KDSA:
if (r2 & 1 || !r2) {
gen_program_exception(s, PGM_SPECIFICATION);
return DISAS_NORETURN;
@@ -5969,6 +5970,7 @@ enum DisasInsnEnum {
#define FAC_MSA4 S390_FEAT_MSA_EXT_4 /* msa-extension-4 facility */
#define FAC_MSA5 S390_FEAT_MSA_EXT_5 /* msa-extension-5 facility */
#define FAC_MSA8 S390_FEAT_MSA_EXT_8 /* msa-extension-8 facility */
+#define FAC_MSA9 S390_FEAT_MSA_EXT_9 /* msa-extension-9 facility */
#define FAC_ECT S390_FEAT_EXTRACT_CPU_TIME
#define FAC_PCI S390_FEAT_ZPCI /* z/PCI facility */
#define FAC_AIS S390_FEAT_ADAPTER_INT_SUPPRESSION
--
2.55.0
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PULL 03/33] target/s390x: Move cpacf sha512 code into a new file
2026-09-21 20:07 [PULL 00/33] s390x queue for 11.2 Eric Farman
2026-09-21 20:07 ` [PULL 01/33] target/s390x: Fix missing privileged flag at PCKMO instruction Eric Farman
2026-09-21 20:07 ` [PULL 02/33] target/s390x: Rework s390 cpacf implementations Eric Farman
@ 2026-09-21 20:08 ` Eric Farman
2026-09-21 20:08 ` [PULL 04/33] target/s390x: Support cpacf sha256 Eric Farman
` (30 subsequent siblings)
33 siblings, 0 replies; 35+ messages in thread
From: Eric Farman @ 2026-09-21 20:08 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-s390x, Matthew Rosato, Cornelia Huck, Harald Freudenberger,
Eric Farman
From: Harald Freudenberger <freude@linux.ibm.com>
Move the cpacf sha512 implementation into a new file
cpacf_sha512.c. Add this new file to the build. Introduce a new header
file cpacf.h which holds function prototypes and other things around
cpacf local to the tcg directory.
Signed-off-by: Harald Freudenberger <freude@linux.ibm.com>
Tested-by: Holger Dengler <dengler@linux.ibm.com>
Reviewed-by: Finn Callies <fcallies@linux.ibm.com>
Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com>
Reviewed-by: Holger Dengler <dengler@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260824083204.40877-4-freude@linux.ibm.com
Signed-off-by: Eric Farman <farman@linux.ibm.com>
---
target/s390x/tcg/cpacf.h | 16 ++
target/s390x/tcg/cpacf_sha512.c | 242 +++++++++++++++++++++++++++++++
target/s390x/tcg/crypto_helper.c | 223 +---------------------------
target/s390x/tcg/meson.build | 1 +
4 files changed, 260 insertions(+), 222 deletions(-)
create mode 100644 target/s390x/tcg/cpacf.h
create mode 100644 target/s390x/tcg/cpacf_sha512.c
diff --git a/target/s390x/tcg/cpacf.h b/target/s390x/tcg/cpacf.h
new file mode 100644
index 0000000000..2fa82893f8
--- /dev/null
+++ b/target/s390x/tcg/cpacf.h
@@ -0,0 +1,16 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * s390x cpacf
+ *
+ */
+
+#ifndef S390X_CPACF_H
+#define S390X_CPACF_H
+
+/* from cpacf_sha512.c */
+int cpacf_sha512(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
+ uint64_t param_addr, uint64_t *message_reg, uint64_t *len_reg,
+ uint32_t type);
+
+#endif /* S390X_CPACF_H */
diff --git a/target/s390x/tcg/cpacf_sha512.c b/target/s390x/tcg/cpacf_sha512.c
new file mode 100644
index 0000000000..2a1ff38c58
--- /dev/null
+++ b/target/s390x/tcg/cpacf_sha512.c
@@ -0,0 +1,242 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * s390 cpacf sha512
+ *
+ * Copyright (C) 2022 Jason A. Donenfeld <Jason@zx2c4.com>.
+ * All Rights Reserved.
+ *
+ * Authors:
+ * Jason A. Donenfeld <Jason@zx2c4.com>
+ */
+
+#include "qemu/osdep.h"
+#include "s390x-internal.h"
+#include "tcg_s390x.h"
+#include "exec/helper-proto.h"
+#include "accel/tcg/cpu-ldst-common.h"
+#include "accel/tcg/cpu-mmu-index.h"
+#include "target/s390x/tcg/cpacf-arch.h"
+#include "target/s390x/tcg/cpacf.h"
+
+static uint64_t R(uint64_t x, int c)
+{
+ return (x >> c) | (x << (64 - c));
+}
+static uint64_t Ch(uint64_t x, uint64_t y, uint64_t z)
+{
+ return (x & y) ^ (~x & z);
+}
+static uint64_t Maj(uint64_t x, uint64_t y, uint64_t z)
+{
+ return (x & y) ^ (x & z) ^ (y & z);
+}
+static uint64_t Sigma0(uint64_t x)
+{
+ return R(x, 28) ^ R(x, 34) ^ R(x, 39);
+}
+static uint64_t Sigma1(uint64_t x)
+{
+ return R(x, 14) ^ R(x, 18) ^ R(x, 41);
+}
+static uint64_t sigma0(uint64_t x)
+{
+ return R(x, 1) ^ R(x, 8) ^ (x >> 7);
+}
+static uint64_t sigma1(uint64_t x)
+{
+ return R(x, 19) ^ R(x, 61) ^ (x >> 6);
+}
+
+static const uint64_t K[80] = {
+ 0x428a2f98d728ae22ULL, 0x7137449123ef65cdULL, 0xb5c0fbcfec4d3b2fULL,
+ 0xe9b5dba58189dbbcULL, 0x3956c25bf348b538ULL, 0x59f111f1b605d019ULL,
+ 0x923f82a4af194f9bULL, 0xab1c5ed5da6d8118ULL, 0xd807aa98a3030242ULL,
+ 0x12835b0145706fbeULL, 0x243185be4ee4b28cULL, 0x550c7dc3d5ffb4e2ULL,
+ 0x72be5d74f27b896fULL, 0x80deb1fe3b1696b1ULL, 0x9bdc06a725c71235ULL,
+ 0xc19bf174cf692694ULL, 0xe49b69c19ef14ad2ULL, 0xefbe4786384f25e3ULL,
+ 0x0fc19dc68b8cd5b5ULL, 0x240ca1cc77ac9c65ULL, 0x2de92c6f592b0275ULL,
+ 0x4a7484aa6ea6e483ULL, 0x5cb0a9dcbd41fbd4ULL, 0x76f988da831153b5ULL,
+ 0x983e5152ee66dfabULL, 0xa831c66d2db43210ULL, 0xb00327c898fb213fULL,
+ 0xbf597fc7beef0ee4ULL, 0xc6e00bf33da88fc2ULL, 0xd5a79147930aa725ULL,
+ 0x06ca6351e003826fULL, 0x142929670a0e6e70ULL, 0x27b70a8546d22ffcULL,
+ 0x2e1b21385c26c926ULL, 0x4d2c6dfc5ac42aedULL, 0x53380d139d95b3dfULL,
+ 0x650a73548baf63deULL, 0x766a0abb3c77b2a8ULL, 0x81c2c92e47edaee6ULL,
+ 0x92722c851482353bULL, 0xa2bfe8a14cf10364ULL, 0xa81a664bbc423001ULL,
+ 0xc24b8b70d0f89791ULL, 0xc76c51a30654be30ULL, 0xd192e819d6ef5218ULL,
+ 0xd69906245565a910ULL, 0xf40e35855771202aULL, 0x106aa07032bbd1b8ULL,
+ 0x19a4c116b8d2d0c8ULL, 0x1e376c085141ab53ULL, 0x2748774cdf8eeb99ULL,
+ 0x34b0bcb5e19b48a8ULL, 0x391c0cb3c5c95a63ULL, 0x4ed8aa4ae3418acbULL,
+ 0x5b9cca4f7763e373ULL, 0x682e6ff3d6b2b8a3ULL, 0x748f82ee5defb2fcULL,
+ 0x78a5636f43172f60ULL, 0x84c87814a1f0ab72ULL, 0x8cc702081a6439ecULL,
+ 0x90befffa23631e28ULL, 0xa4506cebde82bde9ULL, 0xbef9a3f7b2c67915ULL,
+ 0xc67178f2e372532bULL, 0xca273eceea26619cULL, 0xd186b8c721c0c207ULL,
+ 0xeada7dd6cde0eb1eULL, 0xf57d4f7fee6ed178ULL, 0x06f067aa72176fbaULL,
+ 0x0a637dc5a2c898a6ULL, 0x113f9804bef90daeULL, 0x1b710b35131c471bULL,
+ 0x28db77f523047d84ULL, 0x32caab7b40c72493ULL, 0x3c9ebe0a15c9bebcULL,
+ 0x431d67c49c100d4cULL, 0x4cc5d4becb3e42b6ULL, 0x597f299cfc657e2aULL,
+ 0x5fcb6fab3ad6faecULL, 0x6c44198c4a475817ULL
+};
+
+/* a is icv/ocv, w is a single message block. w will get reused internally. */
+static void sha512_bda(uint64_t a[8], uint64_t w[16])
+{
+ uint64_t t, z[8], b[8];
+ int i, j;
+
+ memcpy(z, a, sizeof(z));
+ for (i = 0; i < 80; i++) {
+ memcpy(b, a, sizeof(b));
+
+ t = a[7] + Sigma1(a[4]) + Ch(a[4], a[5], a[6]) + K[i] + w[i % 16];
+ b[7] = t + Sigma0(a[0]) + Maj(a[0], a[1], a[2]);
+ b[3] += t;
+ for (j = 0; j < 8; ++j) {
+ a[(j + 1) % 8] = b[j];
+ }
+ if (i % 16 == 15) {
+ for (j = 0; j < 16; ++j) {
+ w[j] += w[(j + 9) % 16] + sigma0(w[(j + 1) % 16]) +
+ sigma1(w[(j + 14) % 16]);
+ }
+ }
+ }
+
+ for (i = 0; i < 8; i++) {
+ a[i] += z[i];
+ }
+}
+
+/* a is icv/ocv, w is a single message block that needs be64 conversion. */
+static void sha512_bda_be64(uint64_t a[8], uint64_t w[16])
+{
+ uint64_t t[16];
+ int i;
+
+ for (i = 0; i < 16; i++) {
+ t[i] = be64_to_cpu(w[i]);
+ }
+ sha512_bda(a, t);
+}
+
+static void sha512_read_icv(CPUS390XState *env, const int mmu_idx,
+ uint64_t addr, uint64_t a[8], uintptr_t ra)
+{
+ const MemOpIdx oi = make_memop_idx(MO_BE | MO_64 | MO_UNALN, mmu_idx);
+
+ for (int i = 0; i < 8; i++, addr += 8) {
+ a[i] = cpu_ldq_mmu(env, wrap_address(env, addr), oi, ra);
+ }
+}
+
+static void sha512_write_ocv(CPUS390XState *env, const int mmu_idx,
+ uint64_t addr, uint64_t a[8], uintptr_t ra)
+{
+ const MemOpIdx oi = make_memop_idx(MO_BE | MO_64 | MO_UNALN, mmu_idx);
+
+ for (int i = 0; i < 8; i++, addr += 8) {
+ cpu_stq_mmu(env, wrap_address(env, addr), a[i], oi, ra);
+ }
+}
+
+static void sha512_read_block(CPUS390XState *env, const int mmu_idx,
+ uint64_t addr, uint64_t a[16], uintptr_t ra)
+{
+ const MemOpIdx oi = make_memop_idx(MO_BE | MO_64 | MO_UNALN, mmu_idx);
+
+ for (int i = 0; i < 16; i++, addr += 8) {
+ a[i] = cpu_ldq_mmu(env, wrap_address(env, addr), oi, ra);
+ }
+}
+
+static void sha512_read_mbl_be64(CPUS390XState *env, const int mmu_idx,
+ uint64_t addr, uint8_t a[16], uintptr_t ra)
+{
+ const MemOpIdx oi = make_memop_idx(MO_8, mmu_idx);
+
+ for (int i = 0; i < 16; i++, addr += 1) {
+ a[i] = cpu_ldb_mmu(env, wrap_address(env, addr), oi, ra);
+ }
+}
+
+int cpacf_sha512(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
+ uint64_t param_addr, uint64_t *message_reg, uint64_t *len_reg,
+ uint32_t type)
+{
+ enum { MAX_BLOCKS_PER_RUN = 64 }; /* Arbitrary: keep interactivity. */
+ uint64_t len = *len_reg, a[8], processed = 0;
+ int i, message_reg_len = 64;
+
+ g_assert(type == S390_FEAT_TYPE_KIMD || type == S390_FEAT_TYPE_KLMD);
+
+ if (!(env->psw.mask & PSW_MASK_64)) {
+ len = (uint32_t)len;
+ message_reg_len = (env->psw.mask & PSW_MASK_32) ? 32 : 24;
+ }
+
+ /* KIMD: length has to be properly aligned. */
+ if (type == S390_FEAT_TYPE_KIMD && !QEMU_IS_ALIGNED(len, 128)) {
+ tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
+ }
+
+ sha512_read_icv(env, mmu_idx, param_addr, a, ra);
+
+ /* Process full blocks first. */
+ for (; len >= 128; len -= 128, processed += 128) {
+ uint64_t w[16];
+
+ if (processed >= MAX_BLOCKS_PER_RUN * 128) {
+ break;
+ }
+
+ sha512_read_block(env, mmu_idx, *message_reg + processed, w, ra);
+ sha512_bda(a, w);
+ }
+
+ /* KLMD: Process partial/empty block last. */
+ if (type == S390_FEAT_TYPE_KLMD && len < 128) {
+ const MemOpIdx oi = make_memop_idx(MO_8, mmu_idx);
+ uint8_t x[128];
+
+ /* Read the remainder of the message byte-per-byte. */
+ for (i = 0; i < len; i++) {
+ uint64_t addr = wrap_address(env, *message_reg + processed + i);
+
+ x[i] = cpu_ldb_mmu(env, addr, oi, ra);
+ }
+ /* Pad the remainder with zero and set the top bit. */
+ memset(x + len, 0, 128 - len);
+ x[len] = 128;
+
+ /*
+ * Place the MBL either into this block (if there is space left),
+ * or use an additional one.
+ */
+ if (len < 112) {
+ sha512_read_mbl_be64(env, mmu_idx, param_addr + 64, x + 112, ra);
+ }
+ sha512_bda_be64(a, (uint64_t *)x);
+
+ if (len >= 112) {
+ memset(x, 0, 112);
+ sha512_read_mbl_be64(env, mmu_idx, param_addr + 64, x + 112, ra);
+ sha512_bda_be64(a, (uint64_t *)x);
+ }
+
+ processed += len;
+ len = 0;
+ }
+
+ /*
+ * Modify memory after we read all inputs and modify registers only after
+ * writing memory succeeded.
+ *
+ * TODO: if writing fails halfway through (e.g., when crossing page
+ * boundaries), we're in trouble. We'd need something like access_prepare().
+ */
+ sha512_write_ocv(env, mmu_idx, param_addr, a, ra);
+ *message_reg = deposit64(*message_reg, 0, message_reg_len,
+ *message_reg + processed);
+ *len_reg -= processed;
+ return !len ? 0 : 3;
+}
diff --git a/target/s390x/tcg/crypto_helper.c b/target/s390x/tcg/crypto_helper.c
index e39ad153a8..d19db7df25 100644
--- a/target/s390x/tcg/crypto_helper.c
+++ b/target/s390x/tcg/crypto_helper.c
@@ -21,228 +21,7 @@
#include "accel/tcg/cpu-ldst-common.h"
#include "accel/tcg/cpu-mmu-index.h"
#include "target/s390x/tcg/cpacf-arch.h"
-
-static uint64_t R(uint64_t x, int c)
-{
- return (x >> c) | (x << (64 - c));
-}
-static uint64_t Ch(uint64_t x, uint64_t y, uint64_t z)
-{
- return (x & y) ^ (~x & z);
-}
-static uint64_t Maj(uint64_t x, uint64_t y, uint64_t z)
-{
- return (x & y) ^ (x & z) ^ (y & z);
-}
-static uint64_t Sigma0(uint64_t x)
-{
- return R(x, 28) ^ R(x, 34) ^ R(x, 39);
-}
-static uint64_t Sigma1(uint64_t x)
-{
- return R(x, 14) ^ R(x, 18) ^ R(x, 41);
-}
-static uint64_t sigma0(uint64_t x)
-{
- return R(x, 1) ^ R(x, 8) ^ (x >> 7);
-}
-static uint64_t sigma1(uint64_t x)
-{
- return R(x, 19) ^ R(x, 61) ^ (x >> 6);
-}
-
-static const uint64_t K[80] = {
- 0x428a2f98d728ae22ULL, 0x7137449123ef65cdULL, 0xb5c0fbcfec4d3b2fULL,
- 0xe9b5dba58189dbbcULL, 0x3956c25bf348b538ULL, 0x59f111f1b605d019ULL,
- 0x923f82a4af194f9bULL, 0xab1c5ed5da6d8118ULL, 0xd807aa98a3030242ULL,
- 0x12835b0145706fbeULL, 0x243185be4ee4b28cULL, 0x550c7dc3d5ffb4e2ULL,
- 0x72be5d74f27b896fULL, 0x80deb1fe3b1696b1ULL, 0x9bdc06a725c71235ULL,
- 0xc19bf174cf692694ULL, 0xe49b69c19ef14ad2ULL, 0xefbe4786384f25e3ULL,
- 0x0fc19dc68b8cd5b5ULL, 0x240ca1cc77ac9c65ULL, 0x2de92c6f592b0275ULL,
- 0x4a7484aa6ea6e483ULL, 0x5cb0a9dcbd41fbd4ULL, 0x76f988da831153b5ULL,
- 0x983e5152ee66dfabULL, 0xa831c66d2db43210ULL, 0xb00327c898fb213fULL,
- 0xbf597fc7beef0ee4ULL, 0xc6e00bf33da88fc2ULL, 0xd5a79147930aa725ULL,
- 0x06ca6351e003826fULL, 0x142929670a0e6e70ULL, 0x27b70a8546d22ffcULL,
- 0x2e1b21385c26c926ULL, 0x4d2c6dfc5ac42aedULL, 0x53380d139d95b3dfULL,
- 0x650a73548baf63deULL, 0x766a0abb3c77b2a8ULL, 0x81c2c92e47edaee6ULL,
- 0x92722c851482353bULL, 0xa2bfe8a14cf10364ULL, 0xa81a664bbc423001ULL,
- 0xc24b8b70d0f89791ULL, 0xc76c51a30654be30ULL, 0xd192e819d6ef5218ULL,
- 0xd69906245565a910ULL, 0xf40e35855771202aULL, 0x106aa07032bbd1b8ULL,
- 0x19a4c116b8d2d0c8ULL, 0x1e376c085141ab53ULL, 0x2748774cdf8eeb99ULL,
- 0x34b0bcb5e19b48a8ULL, 0x391c0cb3c5c95a63ULL, 0x4ed8aa4ae3418acbULL,
- 0x5b9cca4f7763e373ULL, 0x682e6ff3d6b2b8a3ULL, 0x748f82ee5defb2fcULL,
- 0x78a5636f43172f60ULL, 0x84c87814a1f0ab72ULL, 0x8cc702081a6439ecULL,
- 0x90befffa23631e28ULL, 0xa4506cebde82bde9ULL, 0xbef9a3f7b2c67915ULL,
- 0xc67178f2e372532bULL, 0xca273eceea26619cULL, 0xd186b8c721c0c207ULL,
- 0xeada7dd6cde0eb1eULL, 0xf57d4f7fee6ed178ULL, 0x06f067aa72176fbaULL,
- 0x0a637dc5a2c898a6ULL, 0x113f9804bef90daeULL, 0x1b710b35131c471bULL,
- 0x28db77f523047d84ULL, 0x32caab7b40c72493ULL, 0x3c9ebe0a15c9bebcULL,
- 0x431d67c49c100d4cULL, 0x4cc5d4becb3e42b6ULL, 0x597f299cfc657e2aULL,
- 0x5fcb6fab3ad6faecULL, 0x6c44198c4a475817ULL
-};
-
-/* a is icv/ocv, w is a single message block. w will get reused internally. */
-static void sha512_bda(uint64_t a[8], uint64_t w[16])
-{
- uint64_t t, z[8], b[8];
- int i, j;
-
- memcpy(z, a, sizeof(z));
- for (i = 0; i < 80; i++) {
- memcpy(b, a, sizeof(b));
-
- t = a[7] + Sigma1(a[4]) + Ch(a[4], a[5], a[6]) + K[i] + w[i % 16];
- b[7] = t + Sigma0(a[0]) + Maj(a[0], a[1], a[2]);
- b[3] += t;
- for (j = 0; j < 8; ++j) {
- a[(j + 1) % 8] = b[j];
- }
- if (i % 16 == 15) {
- for (j = 0; j < 16; ++j) {
- w[j] += w[(j + 9) % 16] + sigma0(w[(j + 1) % 16]) +
- sigma1(w[(j + 14) % 16]);
- }
- }
- }
-
- for (i = 0; i < 8; i++) {
- a[i] += z[i];
- }
-}
-
-/* a is icv/ocv, w is a single message block that needs be64 conversion. */
-static void sha512_bda_be64(uint64_t a[8], uint64_t w[16])
-{
- uint64_t t[16];
- int i;
-
- for (i = 0; i < 16; i++) {
- t[i] = be64_to_cpu(w[i]);
- }
- sha512_bda(a, t);
-}
-
-static void sha512_read_icv(CPUS390XState *env, const int mmu_idx,
- uint64_t addr, uint64_t a[8], uintptr_t ra)
-{
- const MemOpIdx oi = make_memop_idx(MO_BE | MO_64 | MO_UNALN, mmu_idx);
-
- for (int i = 0; i < 8; i++, addr += 8) {
- a[i] = cpu_ldq_mmu(env, wrap_address(env, addr), oi, ra);
- }
-}
-
-static void sha512_write_ocv(CPUS390XState *env, const int mmu_idx,
- uint64_t addr, uint64_t a[8], uintptr_t ra)
-{
- const MemOpIdx oi = make_memop_idx(MO_BE | MO_64 | MO_UNALN, mmu_idx);
-
- for (int i = 0; i < 8; i++, addr += 8) {
- cpu_stq_mmu(env, wrap_address(env, addr), a[i], oi, ra);
- }
-}
-
-static void sha512_read_block(CPUS390XState *env, const int mmu_idx,
- uint64_t addr, uint64_t a[16], uintptr_t ra)
-{
- const MemOpIdx oi = make_memop_idx(MO_BE | MO_64 | MO_UNALN, mmu_idx);
-
- for (int i = 0; i < 16; i++, addr += 8) {
- a[i] = cpu_ldq_mmu(env, wrap_address(env, addr), oi, ra);
- }
-}
-
-static void sha512_read_mbl_be64(CPUS390XState *env, const int mmu_idx,
- uint64_t addr, uint8_t a[16], uintptr_t ra)
-{
- const MemOpIdx oi = make_memop_idx(MO_8, mmu_idx);
-
- for (int i = 0; i < 16; i++, addr += 1) {
- a[i] = cpu_ldb_mmu(env, wrap_address(env, addr), oi, ra);
- }
-}
-
-static int cpacf_sha512(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
- uint64_t param_addr, uint64_t *message_reg,
- uint64_t *len_reg, uint32_t type)
-{
- enum { MAX_BLOCKS_PER_RUN = 64 }; /* Arbitrary: keep interactivity. */
- uint64_t len = *len_reg, a[8], processed = 0;
- int i, message_reg_len = 64;
-
- g_assert(type == S390_FEAT_TYPE_KIMD || type == S390_FEAT_TYPE_KLMD);
-
- if (!(env->psw.mask & PSW_MASK_64)) {
- len = (uint32_t)len;
- message_reg_len = (env->psw.mask & PSW_MASK_32) ? 32 : 24;
- }
-
- /* KIMD: length has to be properly aligned. */
- if (type == S390_FEAT_TYPE_KIMD && !QEMU_IS_ALIGNED(len, 128)) {
- tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
- }
-
- sha512_read_icv(env, mmu_idx, param_addr, a, ra);
-
- /* Process full blocks first. */
- for (; len >= 128; len -= 128, processed += 128) {
- uint64_t w[16];
-
- if (processed >= MAX_BLOCKS_PER_RUN * 128) {
- break;
- }
-
- sha512_read_block(env, mmu_idx, *message_reg + processed, w, ra);
- sha512_bda(a, w);
- }
-
- /* KLMD: Process partial/empty block last. */
- if (type == S390_FEAT_TYPE_KLMD && len < 128) {
- const MemOpIdx oi = make_memop_idx(MO_8, mmu_idx);
- uint8_t x[128];
-
- /* Read the remainder of the message byte-per-byte. */
- for (i = 0; i < len; i++) {
- uint64_t addr = wrap_address(env, *message_reg + processed + i);
-
- x[i] = cpu_ldb_mmu(env, addr, oi, ra);
- }
- /* Pad the remainder with zero and set the top bit. */
- memset(x + len, 0, 128 - len);
- x[len] = 128;
-
- /*
- * Place the MBL either into this block (if there is space left),
- * or use an additional one.
- */
- if (len < 112) {
- sha512_read_mbl_be64(env, mmu_idx, param_addr + 64, x + 112, ra);
- }
- sha512_bda_be64(a, (uint64_t *)x);
-
- if (len >= 112) {
- memset(x, 0, 112);
- sha512_read_mbl_be64(env, mmu_idx, param_addr + 64, x + 112, ra);
- sha512_bda_be64(a, (uint64_t *)x);
- }
-
- processed += len;
- len = 0;
- }
-
- /*
- * Modify memory after we read all inputs and modify registers only after
- * writing memory succeeded.
- *
- * TODO: if writing fails halfway through (e.g., when crossing page
- * boundaries), we're in trouble. We'd need something like access_prepare().
- */
- sha512_write_ocv(env, mmu_idx, param_addr, a, ra);
- *message_reg = deposit64(*message_reg, 0, message_reg_len,
- *message_reg + processed);
- *len_reg -= processed;
- return !len ? 0 : 3;
-}
+#include "target/s390x/tcg/cpacf.h"
static int fill_buf_random(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
uint64_t *buf_reg, uint64_t *len_reg)
diff --git a/target/s390x/tcg/meson.build b/target/s390x/tcg/meson.build
index 36cb0e079e..54a87393a3 100644
--- a/target/s390x/tcg/meson.build
+++ b/target/s390x/tcg/meson.build
@@ -5,6 +5,7 @@ s390x_ss.add(when: 'CONFIG_TCG', if_true: files(
))
s390x_common_ss.add(when: 'CONFIG_TCG', if_true: files(
'cc_helper.c',
+ 'cpacf_sha512.c',
'crypto_helper.c',
'excp_helper.c',
'fpu_helper.c',
--
2.55.0
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PULL 04/33] target/s390x: Support cpacf sha256
2026-09-21 20:07 [PULL 00/33] s390x queue for 11.2 Eric Farman
` (2 preceding siblings ...)
2026-09-21 20:08 ` [PULL 03/33] target/s390x: Move cpacf sha512 code into a new file Eric Farman
@ 2026-09-21 20:08 ` Eric Farman
2026-09-21 20:08 ` [PULL 05/33] target/s390x: Add helper functions for copy memory to and from guest Eric Farman
` (29 subsequent siblings)
33 siblings, 0 replies; 35+ messages in thread
From: Eric Farman @ 2026-09-21 20:08 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-s390x, Matthew Rosato, Cornelia Huck, Harald Freudenberger,
Eric Farman
From: Harald Freudenberger <freude@linux.ibm.com>
Add a new file cpacf_sha256.c which implements sha256.
Add support for the sha256 subfuction for CPACF kimd and klmd.
Tested-by: Holger Dengler <dengler@linux.ibm.com>
Reviewed-by: Finn Callies <fcallies@linux.ibm.com>
Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Harald Freudenberger <freude@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260824083204.40877-5-freude@linux.ibm.com
[farman@linux.ibm.com: Resolve merge conflict in gen-features.c]
Signed-off-by: Eric Farman <farman@linux.ibm.com>
---
target/s390x/gen-features.c | 2 +
target/s390x/tcg/cpacf.h | 5 +
target/s390x/tcg/cpacf_sha256.c | 228 +++++++++++++++++++++++++++++++
target/s390x/tcg/crypto_helper.c | 8 ++
target/s390x/tcg/meson.build | 1 +
5 files changed, 244 insertions(+)
create mode 100644 target/s390x/tcg/cpacf_sha256.c
diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c
index a99a75d14e..e1d924d04c 100644
--- a/target/s390x/gen-features.c
+++ b/target/s390x/gen-features.c
@@ -920,7 +920,9 @@ static uint16_t qemu_V7_1[] = {
*/
static uint16_t qemu_MAX[] = {
S390_FEAT_MSA_EXT_5,
+ S390_FEAT_KIMD_SHA_256,
S390_FEAT_KIMD_SHA_512,
+ S390_FEAT_KLMD_SHA_256,
S390_FEAT_KLMD_SHA_512,
S390_FEAT_PRNO_TRNG,
S390_FEAT_EXTENDED_LENGTH_SCCB,
diff --git a/target/s390x/tcg/cpacf.h b/target/s390x/tcg/cpacf.h
index 2fa82893f8..67b8368e4d 100644
--- a/target/s390x/tcg/cpacf.h
+++ b/target/s390x/tcg/cpacf.h
@@ -8,6 +8,11 @@
#ifndef S390X_CPACF_H
#define S390X_CPACF_H
+/* from cpacf_sha256.c */
+int cpacf_sha256(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
+ uint64_t param_addr, uint64_t *message_reg, uint64_t *len_reg,
+ uint32_t type);
+
/* from cpacf_sha512.c */
int cpacf_sha512(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
uint64_t param_addr, uint64_t *message_reg, uint64_t *len_reg,
diff --git a/target/s390x/tcg/cpacf_sha256.c b/target/s390x/tcg/cpacf_sha256.c
new file mode 100644
index 0000000000..30754dbdd4
--- /dev/null
+++ b/target/s390x/tcg/cpacf_sha256.c
@@ -0,0 +1,228 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * s390 cpacf sha256
+ *
+ * Authors:
+ * Harald Freudenberger <freude@linux.ibm.com>
+ *
+ * The sha256 implementation here is more or less a copy-and-paste
+ * from Jason A. Donenfeld's implementation of sha 512 with adaptions
+ * for sha 256.
+ */
+
+#include "qemu/osdep.h"
+#include "s390x-internal.h"
+#include "tcg_s390x.h"
+#include "exec/helper-proto.h"
+#include "accel/tcg/cpu-ldst-common.h"
+#include "accel/tcg/cpu-mmu-index.h"
+#include "target/s390x/tcg/cpacf-arch.h"
+#include "target/s390x/tcg/cpacf.h"
+
+static uint32_t R(uint32_t x, int c)
+{
+ return (x >> c) | (x << (32 - c));
+}
+static uint32_t Ch(uint32_t x, uint32_t y, uint32_t z)
+{
+ return (x & y) ^ (~x & z);
+}
+static uint32_t Maj(uint32_t x, uint32_t y, uint32_t z)
+{
+ return (x & y) ^ (x & z) ^ (y & z);
+}
+static uint32_t Sigma0(uint32_t x)
+{
+ return R(x, 2) ^ R(x, 13) ^ R(x, 22);
+}
+static uint32_t Sigma1(uint32_t x)
+{
+ return R(x, 6) ^ R(x, 11) ^ R(x, 25);
+}
+static uint32_t sigma0(uint32_t x)
+{
+ return R(x, 7) ^ R(x, 18) ^ (x >> 3);
+}
+static uint32_t sigma1(uint32_t x)
+{
+ return R(x, 17) ^ R(x, 19) ^ (x >> 10);
+}
+
+static const uint32_t K[64] = {
+ 0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5, 0x3956c25b, 0x59f111f1,
+ 0x923f82a4, 0xab1c5ed5, 0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3,
+ 0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174, 0xe49b69c1, 0xefbe4786,
+ 0x0fc19dc6, 0x240ca1cc, 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da,
+ 0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7, 0xc6e00bf3, 0xd5a79147,
+ 0x06ca6351, 0x14292967, 0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13,
+ 0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85, 0xa2bfe8a1, 0xa81a664b,
+ 0xc24b8b70, 0xc76c51a3, 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070,
+ 0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5, 0x391c0cb3, 0x4ed8aa4a,
+ 0x5b9cca4f, 0x682e6ff3, 0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208,
+ 0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2,
+};
+
+/* a is icv/ocv, w is a single message block. w will get reused internally. */
+static void sha256_bda(uint32_t a[8], uint32_t w[16])
+{
+ uint32_t t, z[8], b[8];
+ int i, j;
+
+ memcpy(z, a, sizeof(z));
+ for (i = 0; i < 64; i++) {
+ memcpy(b, a, sizeof(b));
+
+ t = a[7] + Sigma1(a[4]) + Ch(a[4], a[5], a[6]) + K[i] + w[i % 16];
+ b[7] = t + Sigma0(a[0]) + Maj(a[0], a[1], a[2]);
+ b[3] += t;
+ for (j = 0; j < 8; ++j) {
+ a[(j + 1) % 8] = b[j];
+ }
+ if (i % 16 == 15) {
+ for (j = 0; j < 16; ++j) {
+ w[j] += w[(j + 9) % 16] + sigma0(w[(j + 1) % 16]) +
+ sigma1(w[(j + 14) % 16]);
+ }
+ }
+ }
+
+ for (i = 0; i < 8; i++) {
+ a[i] += z[i];
+ }
+}
+
+/* a is icv/ocv, w is a single message block that needs be32 conversion. */
+static void sha256_bda_be32(uint32_t a[8], uint32_t w[16])
+{
+ uint32_t t[16];
+ int i;
+
+ for (i = 0; i < 16; i++) {
+ t[i] = be32_to_cpu(w[i]);
+ }
+ sha256_bda(a, t);
+}
+
+static void sha256_read_icv(CPUS390XState *env, const int mmu_idx,
+ uint64_t addr, uint32_t a[8], uintptr_t ra)
+{
+ const MemOpIdx oi = make_memop_idx(MO_BE | MO_32 | MO_UNALN, mmu_idx);
+
+ for (int i = 0; i < 8; i++, addr += 4) {
+ a[i] = cpu_ldl_mmu(env, wrap_address(env, addr), oi, ra);
+ }
+}
+
+static void sha256_write_ocv(CPUS390XState *env, const int mmu_idx,
+ uint64_t addr, uint32_t a[8], uintptr_t ra)
+{
+ const MemOpIdx oi = make_memop_idx(MO_BE | MO_32 | MO_UNALN, mmu_idx);
+
+ for (int i = 0; i < 8; i++, addr += 4) {
+ cpu_stl_mmu(env, wrap_address(env, addr), a[i], oi, ra);
+ }
+}
+
+static void sha256_read_block(CPUS390XState *env, const int mmu_idx,
+ uint64_t addr, uint32_t a[16], uintptr_t ra)
+{
+ const MemOpIdx oi = make_memop_idx(MO_BE | MO_32 | MO_UNALN, mmu_idx);
+
+ for (int i = 0; i < 16; i++, addr += 4) {
+ a[i] = cpu_ldl_mmu(env, wrap_address(env, addr), oi, ra);
+ }
+}
+
+static void sha256_read_mbl_be32(CPUS390XState *env, const int mmu_idx,
+ uint64_t addr, uint8_t a[8], uintptr_t ra)
+{
+ const MemOpIdx oi = make_memop_idx(MO_8, mmu_idx);
+
+ for (int i = 0; i < 8; i++, addr += 1) {
+ a[i] = cpu_ldb_mmu(env, wrap_address(env, addr), oi, ra);
+ }
+}
+
+int cpacf_sha256(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
+ uint64_t param_addr, uint64_t *message_reg, uint64_t *len_reg,
+ uint32_t type)
+{
+ enum { MAX_BLOCKS_PER_RUN = 128 }; /* 128 * 64 = 8K */
+ uint64_t len = *len_reg, processed = 0;
+ int i, message_reg_len = 64;
+ uint32_t a[8];
+
+ g_assert(type == S390_FEAT_TYPE_KIMD || type == S390_FEAT_TYPE_KLMD);
+
+ if (!(env->psw.mask & PSW_MASK_64)) {
+ len = (uint32_t)len;
+ message_reg_len = (env->psw.mask & PSW_MASK_32) ? 32 : 24;
+ }
+
+ /* KIMD: length has to be properly aligned. */
+ if (type == S390_FEAT_TYPE_KIMD && !QEMU_IS_ALIGNED(len, 64)) {
+ tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
+ }
+
+ sha256_read_icv(env, mmu_idx, param_addr, a, ra);
+
+ /* Process full blocks first. */
+ for (; len >= 64; len -= 64, processed += 64) {
+ uint32_t w[16];
+
+ if (processed >= MAX_BLOCKS_PER_RUN * 64) {
+ break;
+ }
+
+ sha256_read_block(env, mmu_idx, *message_reg + processed, w, ra);
+ sha256_bda(a, w);
+ }
+
+ /* KLMD: Process partial/empty block last. */
+ if (type == S390_FEAT_TYPE_KLMD && len < 64) {
+ const MemOpIdx oi = make_memop_idx(MO_8, mmu_idx);
+ uint8_t x[64];
+
+ /* Read the remainder of the message byte-per-byte. */
+ for (i = 0; i < len; i++) {
+ uint64_t addr = wrap_address(env, *message_reg + processed + i);
+
+ x[i] = cpu_ldb_mmu(env, addr, oi, ra);
+ }
+ /* Pad the remainder with zero and set the top bit. */
+ memset(x + len, 0, 64 - len);
+ x[len] = 0x80;
+
+ /*
+ * Place the MBL either into this block (if there is space left),
+ * or use an additional one.
+ */
+ if (len < 56) {
+ sha256_read_mbl_be32(env, mmu_idx, param_addr + 32, x + 56, ra);
+ }
+ sha256_bda_be32(a, (uint32_t *)x);
+
+ if (len >= 56) {
+ memset(x, 0, 56);
+ sha256_read_mbl_be32(env, mmu_idx, param_addr + 32, x + 56, ra);
+ sha256_bda_be32(a, (uint32_t *)x);
+ }
+
+ processed += len;
+ len = 0;
+ }
+
+ /*
+ * Modify memory after we read all inputs and modify registers only after
+ * writing memory succeeded.
+ *
+ * TODO: if writing fails halfway through (e.g., when crossing page
+ * boundaries), we're in trouble. We'd need something like access_prepare().
+ */
+ sha256_write_ocv(env, mmu_idx, param_addr, a, ra);
+ *message_reg = deposit64(*message_reg, 0, message_reg_len,
+ *message_reg + processed);
+ *len_reg -= processed;
+ return !len ? 0 : 3;
+}
diff --git a/target/s390x/tcg/crypto_helper.c b/target/s390x/tcg/crypto_helper.c
index d19db7df25..4d1b9a54f2 100644
--- a/target/s390x/tcg/crypto_helper.c
+++ b/target/s390x/tcg/crypto_helper.c
@@ -61,6 +61,10 @@ static int cpacf_kimd(CPUS390XState *env, const int mmu_idx, const uintptr_t ra,
int rc = 0;
switch (fc) {
+ case CPACF_KIMD_SHA_256:
+ rc = cpacf_sha256(env, mmu_idx, ra, env->regs[1], &env->regs[r2],
+ &env->regs[r2 + 1], S390_FEAT_TYPE_KIMD);
+ break;
case CPACF_KIMD_SHA_512:
rc = cpacf_sha512(env, mmu_idx, ra, env->regs[1], &env->regs[r2],
&env->regs[r2 + 1], S390_FEAT_TYPE_KIMD);
@@ -78,6 +82,10 @@ static int cpacf_klmd(CPUS390XState *env, const int mmu_idx, const uintptr_t ra,
int rc = 0;
switch (fc) {
+ case CPACF_KLMD_SHA_256:
+ rc = cpacf_sha256(env, mmu_idx, ra, env->regs[1], &env->regs[r2],
+ &env->regs[r2 + 1], S390_FEAT_TYPE_KLMD);
+ break;
case CPACF_KLMD_SHA_512:
rc = cpacf_sha512(env, mmu_idx, ra, env->regs[1], &env->regs[r2],
&env->regs[r2 + 1], S390_FEAT_TYPE_KLMD);
diff --git a/target/s390x/tcg/meson.build b/target/s390x/tcg/meson.build
index 54a87393a3..8ae8da9708 100644
--- a/target/s390x/tcg/meson.build
+++ b/target/s390x/tcg/meson.build
@@ -5,6 +5,7 @@ s390x_ss.add(when: 'CONFIG_TCG', if_true: files(
))
s390x_common_ss.add(when: 'CONFIG_TCG', if_true: files(
'cc_helper.c',
+ 'cpacf_sha256.c',
'cpacf_sha512.c',
'crypto_helper.c',
'excp_helper.c',
--
2.55.0
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PULL 05/33] target/s390x: Add helper functions for copy memory to and from guest
2026-09-21 20:07 [PULL 00/33] s390x queue for 11.2 Eric Farman
` (3 preceding siblings ...)
2026-09-21 20:08 ` [PULL 04/33] target/s390x: Support cpacf sha256 Eric Farman
@ 2026-09-21 20:08 ` Eric Farman
2026-09-21 20:08 ` [PULL 06/33] target/s390x: Adjust addressing mode checks for sha512 and sha256 Eric Farman
` (28 subsequent siblings)
33 siblings, 0 replies; 35+ messages in thread
From: Eric Farman @ 2026-09-21 20:08 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-s390x, Matthew Rosato, Cornelia Huck, Harald Freudenberger,
Eric Farman
From: Harald Freudenberger <freude@linux.ibm.com>
Add some simple helper functions to copy memory from guest to a local
buffer and the other way around:
- read_guest_wrap_u8()
- write_guest_wrap_u8()
- read_guest_wrap_u32()
- write_guest_wrap_u32()
- read_guest_wrap_u64()
- write_guest_wrap_u64()
The reader functions read from guest memory into an array of
u8/u32/u64 with BE conversion. Similar the writer functions write an
array of u8/u32/u64 into guest memory with BE conversion.
All these functions are intended to be used for the crypto
implementations thus are located in crypto_helper.h.
Rework and simplify the sha 256 and sha 512 implementations to use
these helper functions.
Signed-off-by: Harald Freudenberger <freude@linux.ibm.com>
Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260824083204.40877-6-freude@linux.ibm.com
Signed-off-by: Eric Farman <farman@linux.ibm.com>
---
target/s390x/tcg/cpacf_sha256.c | 63 ++++---------------
target/s390x/tcg/cpacf_sha512.c | 63 ++++---------------
target/s390x/tcg/crypto_helper.c | 1 +
target/s390x/tcg/crypto_helper.h | 100 +++++++++++++++++++++++++++++++
4 files changed, 123 insertions(+), 104 deletions(-)
create mode 100644 target/s390x/tcg/crypto_helper.h
diff --git a/target/s390x/tcg/cpacf_sha256.c b/target/s390x/tcg/cpacf_sha256.c
index 30754dbdd4..67321b565c 100644
--- a/target/s390x/tcg/cpacf_sha256.c
+++ b/target/s390x/tcg/cpacf_sha256.c
@@ -19,6 +19,7 @@
#include "accel/tcg/cpu-mmu-index.h"
#include "target/s390x/tcg/cpacf-arch.h"
#include "target/s390x/tcg/cpacf.h"
+#include "target/s390x/tcg/crypto_helper.h"
static uint32_t R(uint32_t x, int c)
{
@@ -104,53 +105,13 @@ static void sha256_bda_be32(uint32_t a[8], uint32_t w[16])
sha256_bda(a, t);
}
-static void sha256_read_icv(CPUS390XState *env, const int mmu_idx,
- uint64_t addr, uint32_t a[8], uintptr_t ra)
-{
- const MemOpIdx oi = make_memop_idx(MO_BE | MO_32 | MO_UNALN, mmu_idx);
-
- for (int i = 0; i < 8; i++, addr += 4) {
- a[i] = cpu_ldl_mmu(env, wrap_address(env, addr), oi, ra);
- }
-}
-
-static void sha256_write_ocv(CPUS390XState *env, const int mmu_idx,
- uint64_t addr, uint32_t a[8], uintptr_t ra)
-{
- const MemOpIdx oi = make_memop_idx(MO_BE | MO_32 | MO_UNALN, mmu_idx);
-
- for (int i = 0; i < 8; i++, addr += 4) {
- cpu_stl_mmu(env, wrap_address(env, addr), a[i], oi, ra);
- }
-}
-
-static void sha256_read_block(CPUS390XState *env, const int mmu_idx,
- uint64_t addr, uint32_t a[16], uintptr_t ra)
-{
- const MemOpIdx oi = make_memop_idx(MO_BE | MO_32 | MO_UNALN, mmu_idx);
-
- for (int i = 0; i < 16; i++, addr += 4) {
- a[i] = cpu_ldl_mmu(env, wrap_address(env, addr), oi, ra);
- }
-}
-
-static void sha256_read_mbl_be32(CPUS390XState *env, const int mmu_idx,
- uint64_t addr, uint8_t a[8], uintptr_t ra)
-{
- const MemOpIdx oi = make_memop_idx(MO_8, mmu_idx);
-
- for (int i = 0; i < 8; i++, addr += 1) {
- a[i] = cpu_ldb_mmu(env, wrap_address(env, addr), oi, ra);
- }
-}
-
int cpacf_sha256(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
uint64_t param_addr, uint64_t *message_reg, uint64_t *len_reg,
uint32_t type)
{
enum { MAX_BLOCKS_PER_RUN = 128 }; /* 128 * 64 = 8K */
uint64_t len = *len_reg, processed = 0;
- int i, message_reg_len = 64;
+ int message_reg_len = 64;
uint32_t a[8];
g_assert(type == S390_FEAT_TYPE_KIMD || type == S390_FEAT_TYPE_KLMD);
@@ -165,7 +126,8 @@ int cpacf_sha256(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
}
- sha256_read_icv(env, mmu_idx, param_addr, a, ra);
+ /* read icv (8 * u32) */
+ read_guest_wrap_u32(env, mmu_idx, ra, param_addr, a, 8);
/* Process full blocks first. */
for (; len >= 64; len -= 64, processed += 64) {
@@ -175,21 +137,18 @@ int cpacf_sha256(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
break;
}
- sha256_read_block(env, mmu_idx, *message_reg + processed, w, ra);
+ /* read sha256 block (16 * u32) */
+ read_guest_wrap_u32(env, mmu_idx, ra, *message_reg + processed, w, 16);
sha256_bda(a, w);
}
/* KLMD: Process partial/empty block last. */
if (type == S390_FEAT_TYPE_KLMD && len < 64) {
- const MemOpIdx oi = make_memop_idx(MO_8, mmu_idx);
uint8_t x[64];
- /* Read the remainder of the message byte-per-byte. */
- for (i = 0; i < len; i++) {
- uint64_t addr = wrap_address(env, *message_reg + processed + i);
+ /* Read the remainder of the message. */
+ read_guest_wrap_u8(env, mmu_idx, ra, *message_reg + processed, x, len);
- x[i] = cpu_ldb_mmu(env, addr, oi, ra);
- }
/* Pad the remainder with zero and set the top bit. */
memset(x + len, 0, 64 - len);
x[len] = 0x80;
@@ -199,13 +158,13 @@ int cpacf_sha256(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
* or use an additional one.
*/
if (len < 56) {
- sha256_read_mbl_be32(env, mmu_idx, param_addr + 32, x + 56, ra);
+ read_guest_wrap_u8(env, mmu_idx, ra, param_addr + 32, x + 56, 8);
}
sha256_bda_be32(a, (uint32_t *)x);
if (len >= 56) {
memset(x, 0, 56);
- sha256_read_mbl_be32(env, mmu_idx, param_addr + 32, x + 56, ra);
+ read_guest_wrap_u8(env, mmu_idx, ra, param_addr + 32, x + 56, 8);
sha256_bda_be32(a, (uint32_t *)x);
}
@@ -220,7 +179,7 @@ int cpacf_sha256(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
* TODO: if writing fails halfway through (e.g., when crossing page
* boundaries), we're in trouble. We'd need something like access_prepare().
*/
- sha256_write_ocv(env, mmu_idx, param_addr, a, ra);
+ write_guest_wrap_u32(env, mmu_idx, ra, param_addr, a, 8);
*message_reg = deposit64(*message_reg, 0, message_reg_len,
*message_reg + processed);
*len_reg -= processed;
diff --git a/target/s390x/tcg/cpacf_sha512.c b/target/s390x/tcg/cpacf_sha512.c
index 2a1ff38c58..edd8dae78f 100644
--- a/target/s390x/tcg/cpacf_sha512.c
+++ b/target/s390x/tcg/cpacf_sha512.c
@@ -18,6 +18,7 @@
#include "accel/tcg/cpu-mmu-index.h"
#include "target/s390x/tcg/cpacf-arch.h"
#include "target/s390x/tcg/cpacf.h"
+#include "target/s390x/tcg/crypto_helper.h"
static uint64_t R(uint64_t x, int c)
{
@@ -119,53 +120,13 @@ static void sha512_bda_be64(uint64_t a[8], uint64_t w[16])
sha512_bda(a, t);
}
-static void sha512_read_icv(CPUS390XState *env, const int mmu_idx,
- uint64_t addr, uint64_t a[8], uintptr_t ra)
-{
- const MemOpIdx oi = make_memop_idx(MO_BE | MO_64 | MO_UNALN, mmu_idx);
-
- for (int i = 0; i < 8; i++, addr += 8) {
- a[i] = cpu_ldq_mmu(env, wrap_address(env, addr), oi, ra);
- }
-}
-
-static void sha512_write_ocv(CPUS390XState *env, const int mmu_idx,
- uint64_t addr, uint64_t a[8], uintptr_t ra)
-{
- const MemOpIdx oi = make_memop_idx(MO_BE | MO_64 | MO_UNALN, mmu_idx);
-
- for (int i = 0; i < 8; i++, addr += 8) {
- cpu_stq_mmu(env, wrap_address(env, addr), a[i], oi, ra);
- }
-}
-
-static void sha512_read_block(CPUS390XState *env, const int mmu_idx,
- uint64_t addr, uint64_t a[16], uintptr_t ra)
-{
- const MemOpIdx oi = make_memop_idx(MO_BE | MO_64 | MO_UNALN, mmu_idx);
-
- for (int i = 0; i < 16; i++, addr += 8) {
- a[i] = cpu_ldq_mmu(env, wrap_address(env, addr), oi, ra);
- }
-}
-
-static void sha512_read_mbl_be64(CPUS390XState *env, const int mmu_idx,
- uint64_t addr, uint8_t a[16], uintptr_t ra)
-{
- const MemOpIdx oi = make_memop_idx(MO_8, mmu_idx);
-
- for (int i = 0; i < 16; i++, addr += 1) {
- a[i] = cpu_ldb_mmu(env, wrap_address(env, addr), oi, ra);
- }
-}
-
int cpacf_sha512(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
uint64_t param_addr, uint64_t *message_reg, uint64_t *len_reg,
uint32_t type)
{
enum { MAX_BLOCKS_PER_RUN = 64 }; /* Arbitrary: keep interactivity. */
uint64_t len = *len_reg, a[8], processed = 0;
- int i, message_reg_len = 64;
+ int message_reg_len = 64;
g_assert(type == S390_FEAT_TYPE_KIMD || type == S390_FEAT_TYPE_KLMD);
@@ -179,7 +140,8 @@ int cpacf_sha512(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
}
- sha512_read_icv(env, mmu_idx, param_addr, a, ra);
+ /* read icv (8 * u64) */
+ read_guest_wrap_u64(env, mmu_idx, ra, param_addr, a, 8);
/* Process full blocks first. */
for (; len >= 128; len -= 128, processed += 128) {
@@ -189,21 +151,18 @@ int cpacf_sha512(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
break;
}
- sha512_read_block(env, mmu_idx, *message_reg + processed, w, ra);
+ /* read sha512 block (16 * u64) */
+ read_guest_wrap_u64(env, mmu_idx, ra, *message_reg + processed, w, 16);
sha512_bda(a, w);
}
/* KLMD: Process partial/empty block last. */
if (type == S390_FEAT_TYPE_KLMD && len < 128) {
- const MemOpIdx oi = make_memop_idx(MO_8, mmu_idx);
uint8_t x[128];
- /* Read the remainder of the message byte-per-byte. */
- for (i = 0; i < len; i++) {
- uint64_t addr = wrap_address(env, *message_reg + processed + i);
+ /* Read the remainder of the message. */
+ read_guest_wrap_u8(env, mmu_idx, ra, *message_reg + processed, x, len);
- x[i] = cpu_ldb_mmu(env, addr, oi, ra);
- }
/* Pad the remainder with zero and set the top bit. */
memset(x + len, 0, 128 - len);
x[len] = 128;
@@ -213,13 +172,13 @@ int cpacf_sha512(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
* or use an additional one.
*/
if (len < 112) {
- sha512_read_mbl_be64(env, mmu_idx, param_addr + 64, x + 112, ra);
+ read_guest_wrap_u8(env, mmu_idx, ra, param_addr + 64, x + 112, 16);
}
sha512_bda_be64(a, (uint64_t *)x);
if (len >= 112) {
memset(x, 0, 112);
- sha512_read_mbl_be64(env, mmu_idx, param_addr + 64, x + 112, ra);
+ read_guest_wrap_u8(env, mmu_idx, ra, param_addr + 64, x + 112, 16);
sha512_bda_be64(a, (uint64_t *)x);
}
@@ -234,7 +193,7 @@ int cpacf_sha512(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
* TODO: if writing fails halfway through (e.g., when crossing page
* boundaries), we're in trouble. We'd need something like access_prepare().
*/
- sha512_write_ocv(env, mmu_idx, param_addr, a, ra);
+ write_guest_wrap_u64(env, mmu_idx, ra, param_addr, a, 8);
*message_reg = deposit64(*message_reg, 0, message_reg_len,
*message_reg + processed);
*len_reg -= processed;
diff --git a/target/s390x/tcg/crypto_helper.c b/target/s390x/tcg/crypto_helper.c
index 4d1b9a54f2..27decdda63 100644
--- a/target/s390x/tcg/crypto_helper.c
+++ b/target/s390x/tcg/crypto_helper.c
@@ -22,6 +22,7 @@
#include "accel/tcg/cpu-mmu-index.h"
#include "target/s390x/tcg/cpacf-arch.h"
#include "target/s390x/tcg/cpacf.h"
+#include "target/s390x/tcg/crypto_helper.h"
static int fill_buf_random(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
uint64_t *buf_reg, uint64_t *len_reg)
diff --git a/target/s390x/tcg/crypto_helper.h b/target/s390x/tcg/crypto_helper.h
new file mode 100644
index 0000000000..2364e46029
--- /dev/null
+++ b/target/s390x/tcg/crypto_helper.h
@@ -0,0 +1,100 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * Crypto helper functions
+ */
+
+#ifndef TARGET_S390_CRYPTO_HELPER_H
+#define TARGET_S390_CRYPTO_HELPER_H
+
+/*
+ * helper function to read len * u8 from guest to local buffer
+ */
+static inline void read_guest_wrap_u8(CPUS390XState *env, const int mmu_idx,
+ const uintptr_t ra, uint64_t guest_addr,
+ uint8_t *dest, size_t len)
+{
+ const MemOpIdx oi = make_memop_idx(MO_8, mmu_idx);
+
+ for (size_t i = 0; i < len; i++, guest_addr++) {
+ uint64_t waddr = wrap_address(env, guest_addr);
+ dest[i] = cpu_ldb_mmu(env, waddr, oi, ra);
+ }
+}
+
+/*
+ * helper function to write len * u8 from local buffer to guest
+ */
+static inline void write_guest_wrap_u8(CPUS390XState *env, const int mmu_idx,
+ const uintptr_t ra, uint64_t guest_addr,
+ const uint8_t *src, size_t len)
+{
+ const MemOpIdx oi = make_memop_idx(MO_8, mmu_idx);
+
+ for (size_t i = 0; i < len; i++, guest_addr++) {
+ uint64_t waddr = wrap_address(env, guest_addr);
+ cpu_stb_mmu(env, waddr, src[i], oi, ra);
+ }
+}
+
+/*
+ * helper function to read len * u32 from guest to local buffer
+ */
+static inline void read_guest_wrap_u32(CPUS390XState *env, const int mmu_idx,
+ const uintptr_t ra, uint64_t guest_addr,
+ uint32_t *dest, size_t len)
+{
+ const MemOpIdx oi = make_memop_idx(MO_BE | MO_32 | MO_UNALN, mmu_idx);
+
+ for (size_t i = 0; i < len; i++, guest_addr += 4) {
+ uint64_t waddr = wrap_address(env, guest_addr);
+ dest[i] = cpu_ldl_mmu(env, waddr, oi, ra);
+ }
+}
+
+/*
+ * helper function to write len * u32 from local buffer to guest
+ */
+static inline void write_guest_wrap_u32(CPUS390XState *env, const int mmu_idx,
+ const uintptr_t ra, uint64_t guest_addr,
+ const uint32_t *src, size_t len)
+{
+ const MemOpIdx oi = make_memop_idx(MO_BE | MO_32 | MO_UNALN, mmu_idx);
+
+ for (size_t i = 0; i < len; i++, guest_addr += 4) {
+ uint64_t waddr = wrap_address(env, guest_addr);
+ cpu_stl_mmu(env, waddr, src[i], oi, ra);
+ }
+}
+
+/*
+ * helper function to read len * u64 from guest to local buffer
+ */
+static inline void read_guest_wrap_u64(CPUS390XState *env, const int mmu_idx,
+ const uintptr_t ra, uint64_t guest_addr,
+ uint64_t *dest, size_t len)
+{
+ const MemOpIdx oi = make_memop_idx(MO_BE | MO_64 | MO_UNALN, mmu_idx);
+
+ for (size_t i = 0; i < len; i++, guest_addr += 8) {
+ uint64_t waddr = wrap_address(env, guest_addr);
+ dest[i] = cpu_ldq_mmu(env, waddr, oi, ra);
+ }
+}
+
+/*
+ * helper function to write len * u64 from local buffer to guest
+ */
+static inline void write_guest_wrap_u64(CPUS390XState *env, const int mmu_idx,
+ const uintptr_t ra, uint64_t guest_addr,
+ const uint64_t *src, size_t len)
+{
+ const MemOpIdx oi = make_memop_idx(MO_BE | MO_64 | MO_UNALN, mmu_idx);
+
+ for (size_t i = 0; i < len; i++, guest_addr += 8) {
+ uint64_t waddr = wrap_address(env, guest_addr);
+ cpu_stq_mmu(env, waddr, src[i], oi, ra);
+ }
+}
+
+#endif /* TARGET_S390_CRYPTO_HELPER_H */
--
2.55.0
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PULL 06/33] target/s390x: Adjust addressing mode checks for sha512 and sha256
2026-09-21 20:07 [PULL 00/33] s390x queue for 11.2 Eric Farman
` (4 preceding siblings ...)
2026-09-21 20:08 ` [PULL 05/33] target/s390x: Add helper functions for copy memory to and from guest Eric Farman
@ 2026-09-21 20:08 ` Eric Farman
2026-09-21 20:08 ` [PULL 07/33] crypto: Add aes-helpers file to support some AES modes Eric Farman
` (27 subsequent siblings)
33 siblings, 0 replies; 35+ messages in thread
From: Eric Farman @ 2026-09-21 20:08 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-s390x, Matthew Rosato, Cornelia Huck, Harald Freudenberger,
Eric Farman
From: Harald Freudenberger <freude@linux.ibm.com>
The handling for different addressing modes in the both sha
implementations cpacf sha256 and sha512 was incomplete. Rework this
addressing checking to clearly have support for s390 64 bit and 32 bit
addressing mode but raise an exception otherwise.
Also bail out early (for KIMD only) if length is 0.
Signed-off-by: Harald Freudenberger <freude@linux.ibm.com>
Suggested-by: Ilya Leoshkevich <iii@linux.ibm.com>
Reviewed-by: Eric Farman <farman@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260824083204.40877-7-freude@linux.ibm.com
Signed-off-by: Eric Farman <farman@linux.ibm.com>
---
target/s390x/tcg/cpacf_sha256.c | 16 +++++++++++++---
target/s390x/tcg/cpacf_sha512.c | 16 +++++++++++++---
2 files changed, 26 insertions(+), 6 deletions(-)
diff --git a/target/s390x/tcg/cpacf_sha256.c b/target/s390x/tcg/cpacf_sha256.c
index 67321b565c..de305b6838 100644
--- a/target/s390x/tcg/cpacf_sha256.c
+++ b/target/s390x/tcg/cpacf_sha256.c
@@ -111,14 +111,24 @@ int cpacf_sha256(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
{
enum { MAX_BLOCKS_PER_RUN = 128 }; /* 128 * 64 = 8K */
uint64_t len = *len_reg, processed = 0;
- int message_reg_len = 64;
+ int message_reg_len;
uint32_t a[8];
g_assert(type == S390_FEAT_TYPE_KIMD || type == S390_FEAT_TYPE_KLMD);
- if (!(env->psw.mask & PSW_MASK_64)) {
+ /* check addressing mode, raise exception if not supported here */
+ if (env->psw.mask & PSW_MASK_64) {
+ message_reg_len = 64;
+ } else if (env->psw.mask & PSW_MASK_32) {
+ message_reg_len = 32;
len = (uint32_t)len;
- message_reg_len = (env->psw.mask & PSW_MASK_32) ? 32 : 24;
+ } else {
+ tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
+ }
+
+ /* for KIMD only: early bail out if length is zero */
+ if (type == S390_FEAT_TYPE_KIMD && !len) {
+ return 0;
}
/* KIMD: length has to be properly aligned. */
diff --git a/target/s390x/tcg/cpacf_sha512.c b/target/s390x/tcg/cpacf_sha512.c
index edd8dae78f..cad8e0e1bd 100644
--- a/target/s390x/tcg/cpacf_sha512.c
+++ b/target/s390x/tcg/cpacf_sha512.c
@@ -126,13 +126,23 @@ int cpacf_sha512(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
{
enum { MAX_BLOCKS_PER_RUN = 64 }; /* Arbitrary: keep interactivity. */
uint64_t len = *len_reg, a[8], processed = 0;
- int message_reg_len = 64;
+ int message_reg_len;
g_assert(type == S390_FEAT_TYPE_KIMD || type == S390_FEAT_TYPE_KLMD);
- if (!(env->psw.mask & PSW_MASK_64)) {
+ /* check addressing mode, raise exception if not supported here */
+ if (env->psw.mask & PSW_MASK_64) {
+ message_reg_len = 64;
+ } else if (env->psw.mask & PSW_MASK_32) {
+ message_reg_len = 32;
len = (uint32_t)len;
- message_reg_len = (env->psw.mask & PSW_MASK_32) ? 32 : 24;
+ } else {
+ tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
+ }
+
+ /* for KIMD only: early bail out if length is zero */
+ if (type == S390_FEAT_TYPE_KIMD && !len) {
+ return 0;
}
/* KIMD: length has to be properly aligned. */
--
2.55.0
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PULL 07/33] crypto: Add aes-helpers file to support some AES modes
2026-09-21 20:07 [PULL 00/33] s390x queue for 11.2 Eric Farman
` (5 preceding siblings ...)
2026-09-21 20:08 ` [PULL 06/33] target/s390x: Adjust addressing mode checks for sha512 and sha256 Eric Farman
@ 2026-09-21 20:08 ` Eric Farman
2026-09-21 20:08 ` [PULL 08/33] target/s390x: Support AES ECB for cpacf km instruction Eric Farman
` (26 subsequent siblings)
33 siblings, 0 replies; 35+ messages in thread
From: Eric Farman @ 2026-09-21 20:08 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-s390x, Matthew Rosato, Cornelia Huck, Harald Freudenberger,
Eric Farman
From: Harald Freudenberger <freude@linux.ibm.com>
Add a new file crypto/aes-helpers.c with simple functions
to support some AES modes:
- AES cbc: AES_cbc_encrypt() AES_cbc_decrypt()
- AES ctr: AES_ctr_encrypt()
- AES xts: AES_xts_encrypt() AES_xts_decrypt()
and some AES related helpers:
- AES_xor()
- AES_xts_prep_next_tweak()
Add header file include/crypto/aes-helpers.h for these functions
Signed-off-by: Harald Freudenberger <freude@linux.ibm.com>
Reviewed-by: Finn Callies <fcallies@linux.ibm.com>
Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Acked-by: Daniel P. Berrangé <berrange@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260824083204.40877-8-freude@linux.ibm.com
Signed-off-by: Eric Farman <farman@linux.ibm.com>
---
crypto/aes-helpers.c | 106 ++++++++++++++++++++++++++++++++++
crypto/meson.build | 1 +
include/crypto/aes-helpers.h | 109 +++++++++++++++++++++++++++++++++++
3 files changed, 216 insertions(+)
create mode 100644 crypto/aes-helpers.c
create mode 100644 include/crypto/aes-helpers.h
diff --git a/crypto/aes-helpers.c b/crypto/aes-helpers.c
new file mode 100644
index 0000000000..68d848683c
--- /dev/null
+++ b/crypto/aes-helpers.c
@@ -0,0 +1,106 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * AES helper functions and mode implementations
+ *
+ * Authors:
+ * Harald Freudenberger <freude@linux.ibm.com>
+ */
+
+#include "qemu/osdep.h"
+#include "crypto/aes.h"
+#include "crypto/aes-helpers.h"
+
+void AES_xor(const unsigned char *src1, const unsigned char *src2,
+ unsigned char *dst)
+{
+ int i;
+
+ for (i = 0; i < AES_BLOCK_SIZE; i++) {
+ dst[i] = src1[i] ^ src2[i];
+ }
+}
+
+void AES_cbc_encrypt(const unsigned char *in, unsigned char *out,
+ unsigned char *iv, const AES_KEY *key)
+{
+ unsigned char buf[AES_BLOCK_SIZE];
+
+ /* in xor iv => buf */
+ AES_xor(in, iv, buf);
+ /* encrypt buf => out */
+ AES_encrypt(buf, out, key);
+ /* prep iv for next round */
+ memcpy(iv, out, AES_BLOCK_SIZE);
+}
+
+void AES_cbc_decrypt(const unsigned char *in, unsigned char *out,
+ unsigned char *iv, const AES_KEY *key)
+{
+ unsigned char buf[AES_BLOCK_SIZE];
+
+ /* decrypt in => buf */
+ AES_decrypt(in, buf, key);
+ /* buf xor iv => out */
+ AES_xor(buf, iv, out);
+ /* prep iv for next round */
+ memcpy(iv, in, AES_BLOCK_SIZE);
+}
+
+void AES_ctr_encrypt(const unsigned char *in, unsigned char *out,
+ const unsigned char *ctr, const AES_KEY *key)
+{
+ unsigned char buf[AES_BLOCK_SIZE];
+
+ /* encrypt ctr => buf */
+ AES_encrypt(ctr, buf, key);
+ /* exor input data with encrypted ctr => out */
+ AES_xor(in, buf, out);
+}
+
+/*
+ * Tweak calculation for AES XTS.
+ * Multiply tweak by α (x) in GF(2^128) per IEEE 1619-2007. The tweak
+ * is a 128-bit little-endian integer (tweak[0]=LSB, tweak[15]=MSB).
+ * This implementation has been verified on little and big endian.
+ */
+void AES_xts_prep_next_tweak(unsigned char *tweak)
+{
+ unsigned char carry;
+ int i;
+
+ carry = tweak[AES_BLOCK_SIZE - 1] >> 7;
+
+ for (i = AES_BLOCK_SIZE - 1; i > 0; i--) {
+ tweak[i] = (unsigned char)((tweak[i] << 1) | (tweak[i - 1] >> 7));
+ }
+
+ tweak[i] = (unsigned char)(tweak[i] << 1);
+ tweak[i] ^= (unsigned char)(0x87 & (unsigned char)(-(unsigned char)carry));
+}
+
+void AES_xts_encrypt(const unsigned char *in, unsigned char *out,
+ const unsigned char *tweak, const AES_KEY *key)
+{
+ unsigned char buf1[AES_BLOCK_SIZE], buf2[AES_BLOCK_SIZE];
+
+ /* in xor tweak => buf1 */
+ AES_xor(in, tweak, buf1);
+ /* encrypt buf1 => buf2 */
+ AES_encrypt(buf1, buf2, key);
+ /* buf2 xor tweak => out */
+ AES_xor(buf2, tweak, out);
+}
+
+void AES_xts_decrypt(const unsigned char *in, unsigned char *out,
+ const unsigned char *tweak, const AES_KEY *key)
+{
+ unsigned char buf1[AES_BLOCK_SIZE], buf2[AES_BLOCK_SIZE];
+
+ /* in xor tweak => buf1 */
+ AES_xor(in, tweak, buf1);
+ /* encrypt buf1 => buf2 */
+ AES_decrypt(buf1, buf2, key);
+ /* buf2 xor tweak => out */
+ AES_xor(buf2, tweak, out);
+}
diff --git a/crypto/meson.build b/crypto/meson.build
index 15f0bc72e2..bcd598e727 100644
--- a/crypto/meson.build
+++ b/crypto/meson.build
@@ -55,6 +55,7 @@ system_ss.add(when: gnutls, if_true: files('tls-cipher-suites.c'))
util_ss.add(files(
'aes.c',
+ 'aes-helpers.c',
'clmul.c',
'init.c',
'sm4.c',
diff --git a/include/crypto/aes-helpers.h b/include/crypto/aes-helpers.h
new file mode 100644
index 0000000000..9a94c48d86
--- /dev/null
+++ b/include/crypto/aes-helpers.h
@@ -0,0 +1,109 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * AES helper functions and modes
+ */
+
+#ifndef QEMU_AES_HELPERS_H
+#define QEMU_AES_HELPERS_H
+
+/**
+ * AES_xor:
+ * @src1: first source buffer of AES_BLOCK_SIZE bytes
+ * @src2: second source buffer of AES_BLOCK_SIZE bytes
+ * @dst: destination buffer of AES_BLOCK_SIZE bytes
+ *
+ * Bitwise XOR operation between two AES blocks.
+ */
+void AES_xor(const unsigned char *src1, const unsigned char *src2,
+ unsigned char *dst);
+
+/**
+ * AES_cbc_encrypt:
+ * @in: input plaintext block of AES_BLOCK_SIZE bytes
+ * @out: output ciphertext block of AES_BLOCK_SIZE bytes
+ * @iv: IV, updated after processing for chaining
+ * @key: AES key
+ *
+ * Single block AES encrypt in CBC (Cipher Block Chaining) mode.
+ * The input block is XORed with the IV, then encrypted with AES.
+ * IV is updated at the end and is prepared for the next invocation.
+ */
+void AES_cbc_encrypt(const unsigned char *in, unsigned char *out,
+ unsigned char *iv, const AES_KEY *key);
+
+/**
+ * AES_cbc_decrypt:
+ * @in: input ciphertext block of AES_BLOCK_SIZE bytes
+ * @out: output plaintext block of AES_BLOCK_SIZE bytes
+ * @iv: initialization vector, updated to input block for chaining
+ * @key: AES key
+ *
+ * Single block AES decrypt in CBC (Cipher Block Chaining) mode.
+ * The input block is decrypted, then XORed with the IV.
+ * IV is updated at the end and is prepared for the next invocation.
+ */
+void AES_cbc_decrypt(const unsigned char *in, unsigned char *out,
+ unsigned char *iv, const AES_KEY *key);
+
+/**
+ * AES_ctr_encrypt:
+ * @in: input data block of AES_BLOCK_SIZE bytes
+ * @out: output data block of AES_BLOCK_SIZE bytes
+ * @ctr: counter value of AES_BLOCK_SIZE bytes
+ * @key: AES key
+ *
+ * Single block AES encrypt/decrypt in CTR (Counter) mode.
+ * The counter block is encrypted, then XORed with the
+ * input data block.
+ * In CTR mode encrypt and decrypt are identical operations.
+ * Note that the caller is responsible for incrementing the
+ * counter block.
+ */
+void AES_ctr_encrypt(const unsigned char *in, unsigned char *out,
+ const unsigned char *ctr, const AES_KEY *key);
+
+/**
+ * AES_xts_prep_next_tweak:
+ * @tweak: pointer to tweak value to be updated (16 bytes buffer
+ * containing a 128 bit little endian integer)
+ *
+ * Tweak calculation for AES XTS.
+ * Prepares the next tweak value for AES-XTS mode by multiplying
+ * the current tweak by α (x) in GF(2^128) according to IEEE 1619-2007.
+ */
+void AES_xts_prep_next_tweak(unsigned char *tweak);
+
+/**
+ * AES_xts_encrypt:
+ * @in: input plaintext block of AES_BLOCK_SIZE bytes
+ * @out: output ciphertext block of AES_BLOCK_SIZE bytes
+ * @tweak: tweak value (16 bytes)
+ * @key: AES key
+ *
+ * Single block AES encrypt in XTS mode.
+ * The input is XORed with the tweak, encrypted, then XORed with
+ * the tweak again to produce the output.
+ * Note that the caller is responsible for managing the tweak value.
+ * Use AES_xts_prep_next_tweak() to advance the tweak for the next block.
+ */
+void AES_xts_encrypt(const unsigned char *in, unsigned char *out,
+ const unsigned char *tweak, const AES_KEY *key);
+
+/**
+ * AES_xts_decrypt:
+ * @in: input ciphertext block of AES_BLOCK_SIZE bytes
+ * @out: output plaintext block of AES_BLOCK_SIZE bytes
+ * @tweak: tweak value (16 bytes)
+ * @key: AES key
+ *
+ * Single block AES decrypt in XTS mode.
+ * The input is XORed with the tweak, decrypted, then XORed with
+ * the tweak again to produce the output.
+ * Note that the caller is responsible for managing the tweak value.
+ * Use AES_xts_prep_next_tweak() to advance the tweak for the next block.
+ */
+void AES_xts_decrypt(const unsigned char *in, unsigned char *out,
+ const unsigned char *tweak, const AES_KEY *key);
+
+#endif
--
2.55.0
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PULL 08/33] target/s390x: Support AES ECB for cpacf km instruction
2026-09-21 20:07 [PULL 00/33] s390x queue for 11.2 Eric Farman
` (6 preceding siblings ...)
2026-09-21 20:08 ` [PULL 07/33] crypto: Add aes-helpers file to support some AES modes Eric Farman
@ 2026-09-21 20:08 ` Eric Farman
2026-09-21 20:08 ` [PULL 09/33] target/s390x: Support AES CBC for cpacf kmc instruction Eric Farman
` (25 subsequent siblings)
33 siblings, 0 replies; 35+ messages in thread
From: Eric Farman @ 2026-09-21 20:08 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-s390x, Matthew Rosato, Cornelia Huck, Harald Freudenberger,
Eric Farman
From: Harald Freudenberger <freude@linux.ibm.com>
Support the subfunctions CPACF_KM_AES_128, CPACF_KM_AES_192
and CPACF_KM_AES_256 for the cpacf km instruction.
Signed-off-by: Harald Freudenberger <freude@linux.ibm.com>
Tested-by: Holger Dengler <dengler@linux.ibm.com>
Reviewed-by: Finn Callies <fcallies@linux.ibm.com>
Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260824083204.40877-9-freude@linux.ibm.com
[farman@linux.ibm.com: Resolve merge conflict in gen-features.c]
Signed-off-by: Eric Farman <farman@linux.ibm.com>
---
target/s390x/gen-features.c | 3 +
target/s390x/tcg/cpacf.h | 6 ++
target/s390x/tcg/cpacf_aes.c | 137 +++++++++++++++++++++++++++++++
target/s390x/tcg/crypto_helper.c | 24 ++++++
target/s390x/tcg/meson.build | 1 +
5 files changed, 171 insertions(+)
create mode 100644 target/s390x/tcg/cpacf_aes.c
diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c
index e1d924d04c..d6d4c45434 100644
--- a/target/s390x/gen-features.c
+++ b/target/s390x/gen-features.c
@@ -929,6 +929,9 @@ static uint16_t qemu_MAX[] = {
S390_FEAT_CERT_STORE,
S390_FEAT_SIPL,
S390_FEAT_SCLAF,
+ S390_FEAT_KM_AES_128,
+ S390_FEAT_KM_AES_192,
+ S390_FEAT_KM_AES_256,
};
/****** END FEATURE DEFS ******/
diff --git a/target/s390x/tcg/cpacf.h b/target/s390x/tcg/cpacf.h
index 67b8368e4d..49630bab5e 100644
--- a/target/s390x/tcg/cpacf.h
+++ b/target/s390x/tcg/cpacf.h
@@ -18,4 +18,10 @@ int cpacf_sha512(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
uint64_t param_addr, uint64_t *message_reg, uint64_t *len_reg,
uint32_t type);
+/* from cpacf_aes.c */
+int cpacf_aes_ecb(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
+ uint64_t param_addr, uint64_t *dst_ptr_reg,
+ uint64_t *src_ptr_reg, uint64_t *src_len_reg,
+ uint32_t type, uint8_t fc, uint8_t mod);
+
#endif /* S390X_CPACF_H */
diff --git a/target/s390x/tcg/cpacf_aes.c b/target/s390x/tcg/cpacf_aes.c
new file mode 100644
index 0000000000..d87da18c19
--- /dev/null
+++ b/target/s390x/tcg/cpacf_aes.c
@@ -0,0 +1,137 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * s390 cpacf aes
+ *
+ * Authors:
+ * Harald Freudenberger <freude@linux.ibm.com>
+ */
+
+#include "qemu/osdep.h"
+#include "s390x-internal.h"
+#include "tcg_s390x.h"
+#include "accel/tcg/cpu-ldst-common.h"
+#include "accel/tcg/cpu-mmu-index.h"
+#include "crypto/aes.h"
+#include "crypto/aes-helpers.h"
+#include "target/s390x/tcg/cpacf-arch.h"
+#include "target/s390x/tcg/cpacf.h"
+#include "target/s390x/tcg/crypto_helper.h"
+
+/*
+ * read exactly one AES block from guest memory into a local buffer
+ */
+static inline void aes_read_block(CPUS390XState *env, const int mmu_idx,
+ const uintptr_t ra, uint64_t guest_addr,
+ uint8_t *buf)
+{
+ read_guest_wrap_u8(env, mmu_idx, ra, guest_addr, buf, AES_BLOCK_SIZE);
+}
+
+/*
+ * write exactly one AES block from local buffer to guest memory
+ */
+static void aes_write_block(CPUS390XState *env, const int mmu_idx,
+ const uintptr_t ra, uint64_t guest_addr,
+ uint8_t *buf)
+{
+ write_guest_wrap_u8(env, mmu_idx, ra, guest_addr, buf, AES_BLOCK_SIZE);
+}
+
+/*
+ * Helper function returning the bitsize of the address mode.
+ * Within this file only 64 bit and 32 bit are supported and
+ * thus this function returns either 64 or 32 or 0.
+ */
+static int get_address_bitsize(CPUS390XState *env)
+{
+ if (env->psw.mask & PSW_MASK_64) {
+ return 64;
+ } else if (env->psw.mask & PSW_MASK_32) {
+ return 32;
+ } else {
+ /* unknown or unsupported here */
+ return 0;
+ }
+}
+
+int cpacf_aes_ecb(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
+ uint64_t param_addr, uint64_t *dst_ptr_reg,
+ uint64_t *src_ptr_reg, uint64_t *src_len_reg,
+ uint32_t type, uint8_t fc, uint8_t mod)
+{
+ enum { MAX_BLOCKS_PER_RUN = 8192 / AES_BLOCK_SIZE };
+ uint8_t in[AES_BLOCK_SIZE], out[AES_BLOCK_SIZE];
+ uint64_t len = *src_len_reg, done = 0;
+ int i, keysize, addr_reg_size;
+ uint8_t key[32];
+ AES_KEY exkey;
+
+ g_assert(type == S390_FEAT_TYPE_KM);
+ switch (fc) {
+ case CPACF_KM_AES_128:
+ keysize = 16;
+ break;
+ case CPACF_KM_AES_192:
+ keysize = 24;
+ break;
+ case CPACF_KM_AES_256:
+ keysize = 32;
+ break;
+ default:
+ g_assert_not_reached();
+ }
+
+ /* check addressing mode, raise exception if not supported here */
+ addr_reg_size = get_address_bitsize(env);
+ switch (addr_reg_size) {
+ case 64:
+ break;
+ case 32:
+ len = (uint32_t)len;
+ break;
+ default:
+ tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
+ }
+
+ /* early bail out if length is zero */
+ if (!len) {
+ return 0;
+ }
+
+ /* length has to be properly aligned. */
+ if (!QEMU_IS_ALIGNED(len, AES_BLOCK_SIZE)) {
+ tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
+ }
+
+ /* fetch key from param block */
+ read_guest_wrap_u8(env, mmu_idx, ra, param_addr, key, keysize);
+
+ /* expand key */
+ if (mod) {
+ AES_set_decrypt_key(key, keysize * 8, &exkey);
+ } else {
+ AES_set_encrypt_key(key, keysize * 8, &exkey);
+ }
+
+ /* process up to MAX_BLOCKS_PER_RUN aes blocks */
+ for (i = 0; i < MAX_BLOCKS_PER_RUN && len >= AES_BLOCK_SIZE; i++) {
+ aes_read_block(env, mmu_idx, ra, *src_ptr_reg + done, in);
+ if (mod) {
+ AES_decrypt(in, out, &exkey);
+ } else {
+ AES_encrypt(in, out, &exkey);
+ }
+ aes_write_block(env, mmu_idx, ra, *dst_ptr_reg + done, out);
+ len -= AES_BLOCK_SIZE;
+ done += AES_BLOCK_SIZE;
+ }
+
+ *src_ptr_reg = deposit64(*src_ptr_reg, 0, addr_reg_size,
+ *src_ptr_reg + done);
+ *dst_ptr_reg = deposit64(*dst_ptr_reg, 0, addr_reg_size,
+ *dst_ptr_reg + done);
+ *src_len_reg -= done;
+
+ return !len ? 0 : 3;
+}
diff --git a/target/s390x/tcg/crypto_helper.c b/target/s390x/tcg/crypto_helper.c
index 27decdda63..534498173c 100644
--- a/target/s390x/tcg/crypto_helper.c
+++ b/target/s390x/tcg/crypto_helper.c
@@ -98,6 +98,27 @@ static int cpacf_klmd(CPUS390XState *env, const int mmu_idx, const uintptr_t ra,
return rc;
}
+static int cpacf_km(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
+ uint32_t r1, uint32_t r2, uint32_t r3,
+ uint8_t fc, uint8_t mod)
+{
+ int rc = 0;
+
+ switch (fc) {
+ case CPACF_KM_AES_128:
+ case CPACF_KM_AES_192:
+ case CPACF_KM_AES_256:
+ rc = cpacf_aes_ecb(env, mmu_idx, ra, env->regs[1],
+ &env->regs[r1], &env->regs[r2], &env->regs[r2 + 1],
+ S390_FEAT_TYPE_KM, fc, mod);
+ break;
+ default:
+ tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
+ }
+
+ return rc;
+}
+
static int cpacf_ppno(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
uint32_t r1, uint32_t r2, uint32_t r3, uint8_t fc)
{
@@ -166,6 +187,9 @@ uint32_t HELPER(msa)(CPUS390XState *env, uint32_t r1, uint32_t r2, uint32_t r3,
case S390_FEAT_TYPE_KLMD:
rc = cpacf_klmd(env, mmu_idx, ra, r1, r2, r3, fc);
break;
+ case S390_FEAT_TYPE_KM:
+ rc = cpacf_km(env, mmu_idx, ra, r1, r2, r3, fc, mod);
+ break;
case S390_FEAT_TYPE_PPNO:
rc = cpacf_ppno(env, mmu_idx, ra, r1, r2, r3, fc);
break;
diff --git a/target/s390x/tcg/meson.build b/target/s390x/tcg/meson.build
index 8ae8da9708..6f2e75764b 100644
--- a/target/s390x/tcg/meson.build
+++ b/target/s390x/tcg/meson.build
@@ -5,6 +5,7 @@ s390x_ss.add(when: 'CONFIG_TCG', if_true: files(
))
s390x_common_ss.add(when: 'CONFIG_TCG', if_true: files(
'cc_helper.c',
+ 'cpacf_aes.c',
'cpacf_sha256.c',
'cpacf_sha512.c',
'crypto_helper.c',
--
2.55.0
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PULL 09/33] target/s390x: Support AES CBC for cpacf kmc instruction
2026-09-21 20:07 [PULL 00/33] s390x queue for 11.2 Eric Farman
` (7 preceding siblings ...)
2026-09-21 20:08 ` [PULL 08/33] target/s390x: Support AES ECB for cpacf km instruction Eric Farman
@ 2026-09-21 20:08 ` Eric Farman
2026-09-21 20:08 ` [PULL 10/33] target/s390x: Support AES CTR for cpacf kmctr instruction Eric Farman
` (24 subsequent siblings)
33 siblings, 0 replies; 35+ messages in thread
From: Eric Farman @ 2026-09-21 20:08 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-s390x, Matthew Rosato, Cornelia Huck, Harald Freudenberger,
Eric Farman
From: Harald Freudenberger <freude@linux.ibm.com>
Support the subfunctions CPACF_KMC_AES_128, CPACF_KMC_AES_192
and CPACF_KMC_AES_256 for the cpacf kmc instruction.
Signed-off-by: Harald Freudenberger <freude@linux.ibm.com>
Tested-by: Holger Dengler <dengler@linux.ibm.com>
Reviewed-by: Finn Callies <fcallies@linux.ibm.com>
Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260824083204.40877-10-freude@linux.ibm.com
Signed-off-by: Eric Farman <farman@linux.ibm.com>
---
target/s390x/gen-features.c | 3 ++
target/s390x/tcg/cpacf.h | 4 ++
target/s390x/tcg/cpacf_aes.c | 91 ++++++++++++++++++++++++++++++++
target/s390x/tcg/crypto_helper.c | 24 +++++++++
4 files changed, 122 insertions(+)
diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c
index d6d4c45434..1dadbcd34c 100644
--- a/target/s390x/gen-features.c
+++ b/target/s390x/gen-features.c
@@ -932,6 +932,9 @@ static uint16_t qemu_MAX[] = {
S390_FEAT_KM_AES_128,
S390_FEAT_KM_AES_192,
S390_FEAT_KM_AES_256,
+ S390_FEAT_KMC_AES_128,
+ S390_FEAT_KMC_AES_192,
+ S390_FEAT_KMC_AES_256,
};
/****** END FEATURE DEFS ******/
diff --git a/target/s390x/tcg/cpacf.h b/target/s390x/tcg/cpacf.h
index 49630bab5e..7dde122879 100644
--- a/target/s390x/tcg/cpacf.h
+++ b/target/s390x/tcg/cpacf.h
@@ -23,5 +23,9 @@ int cpacf_aes_ecb(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
uint64_t param_addr, uint64_t *dst_ptr_reg,
uint64_t *src_ptr_reg, uint64_t *src_len_reg,
uint32_t type, uint8_t fc, uint8_t mod);
+int cpacf_aes_cbc(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
+ uint64_t param_addr, uint64_t *dst_ptr_reg,
+ uint64_t *src_ptr_reg, uint64_t *src_len_reg,
+ uint32_t type, uint8_t fc, uint8_t mod);
#endif /* S390X_CPACF_H */
diff --git a/target/s390x/tcg/cpacf_aes.c b/target/s390x/tcg/cpacf_aes.c
index d87da18c19..c937514e9b 100644
--- a/target/s390x/tcg/cpacf_aes.c
+++ b/target/s390x/tcg/cpacf_aes.c
@@ -135,3 +135,94 @@ int cpacf_aes_ecb(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
return !len ? 0 : 3;
}
+
+int cpacf_aes_cbc(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
+ uint64_t param_addr, uint64_t *dst_ptr_reg,
+ uint64_t *src_ptr_reg, uint64_t *src_len_reg,
+ uint32_t type, uint8_t fc, uint8_t mod)
+{
+ enum { MAX_BLOCKS_PER_RUN = 8192 / AES_BLOCK_SIZE };
+ uint8_t in[AES_BLOCK_SIZE], out[AES_BLOCK_SIZE];
+ uint64_t len = *src_len_reg, done = 0;
+ uint8_t key[32], iv[AES_BLOCK_SIZE];
+ int i, keysize, addr_reg_size;
+ AES_KEY exkey;
+
+ g_assert(type == S390_FEAT_TYPE_KMC);
+
+ switch (fc) {
+ case CPACF_KMC_AES_128:
+ keysize = 16;
+ break;
+ case CPACF_KMC_AES_192:
+ keysize = 24;
+ break;
+ case CPACF_KMC_AES_256:
+ keysize = 32;
+ break;
+ default:
+ g_assert_not_reached();
+ }
+
+ /* check addressing mode, raise exception if not supported here */
+ addr_reg_size = get_address_bitsize(env);
+ switch (addr_reg_size) {
+ case 64:
+ break;
+ case 32:
+ len = (uint32_t)len;
+ break;
+ default:
+ tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
+ }
+
+ /* early bail out if length is zero */
+ if (!len) {
+ return 0;
+ }
+
+ /* length has to be properly aligned. */
+ if (!QEMU_IS_ALIGNED(len, AES_BLOCK_SIZE)) {
+ tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
+ }
+
+ /* fetch iv from param block */
+ read_guest_wrap_u8(env, mmu_idx, ra, param_addr, iv, AES_BLOCK_SIZE);
+
+ /* fetch key from param block */
+ read_guest_wrap_u8(env, mmu_idx, ra,
+ param_addr + AES_BLOCK_SIZE, key, keysize);
+
+ /* expand key */
+ if (mod) {
+ AES_set_decrypt_key(key, keysize * 8, &exkey);
+ } else {
+ AES_set_encrypt_key(key, keysize * 8, &exkey);
+ }
+
+ /* process up to MAX_BLOCKS_PER_RUN aes blocks */
+ for (i = 0; i < MAX_BLOCKS_PER_RUN && len >= AES_BLOCK_SIZE; i++) {
+ aes_read_block(env, mmu_idx, ra, *src_ptr_reg + done, in);
+ if (mod) {
+ /* decrypt in => out */
+ AES_cbc_decrypt(in, out, iv, &exkey);
+ } else {
+ /* encrypt in => out */
+ AES_cbc_encrypt(in, out, iv, &exkey);
+ }
+ aes_write_block(env, mmu_idx, ra, *dst_ptr_reg + done, out);
+ len -= AES_BLOCK_SIZE;
+ done += AES_BLOCK_SIZE;
+ }
+
+ /* update iv in param block */
+ write_guest_wrap_u8(env, mmu_idx, ra, param_addr, iv, AES_BLOCK_SIZE);
+
+ *src_ptr_reg = deposit64(*src_ptr_reg, 0, addr_reg_size,
+ *src_ptr_reg + done);
+ *dst_ptr_reg = deposit64(*dst_ptr_reg, 0, addr_reg_size,
+ *dst_ptr_reg + done);
+ *src_len_reg -= done;
+
+ return !len ? 0 : 3;
+}
diff --git a/target/s390x/tcg/crypto_helper.c b/target/s390x/tcg/crypto_helper.c
index 534498173c..7368c25e5d 100644
--- a/target/s390x/tcg/crypto_helper.c
+++ b/target/s390x/tcg/crypto_helper.c
@@ -119,6 +119,27 @@ static int cpacf_km(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
return rc;
}
+static int cpacf_kmc(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
+ uint32_t r1, uint32_t r2, uint32_t r3,
+ uint8_t fc, uint8_t mod)
+{
+ int rc = 0;
+
+ switch (fc) {
+ case CPACF_KMC_AES_128:
+ case CPACF_KMC_AES_192:
+ case CPACF_KMC_AES_256:
+ rc = cpacf_aes_cbc(env, mmu_idx, ra, env->regs[1],
+ &env->regs[r1], &env->regs[r2], &env->regs[r2 + 1],
+ S390_FEAT_TYPE_KMC, fc, mod);
+ break;
+ default:
+ tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
+ }
+
+ return rc;
+}
+
static int cpacf_ppno(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
uint32_t r1, uint32_t r2, uint32_t r3, uint8_t fc)
{
@@ -190,6 +211,9 @@ uint32_t HELPER(msa)(CPUS390XState *env, uint32_t r1, uint32_t r2, uint32_t r3,
case S390_FEAT_TYPE_KM:
rc = cpacf_km(env, mmu_idx, ra, r1, r2, r3, fc, mod);
break;
+ case S390_FEAT_TYPE_KMC:
+ rc = cpacf_kmc(env, mmu_idx, ra, r1, r2, r3, fc, mod);
+ break;
case S390_FEAT_TYPE_PPNO:
rc = cpacf_ppno(env, mmu_idx, ra, r1, r2, r3, fc);
break;
--
2.55.0
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PULL 10/33] target/s390x: Support AES CTR for cpacf kmctr instruction
2026-09-21 20:07 [PULL 00/33] s390x queue for 11.2 Eric Farman
` (8 preceding siblings ...)
2026-09-21 20:08 ` [PULL 09/33] target/s390x: Support AES CBC for cpacf kmc instruction Eric Farman
@ 2026-09-21 20:08 ` Eric Farman
2026-09-21 20:08 ` [PULL 11/33] target/s390x: Minimal AES XTS support for cpacf pcc instruction Eric Farman
` (23 subsequent siblings)
33 siblings, 0 replies; 35+ messages in thread
From: Eric Farman @ 2026-09-21 20:08 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-s390x, Matthew Rosato, Cornelia Huck, Harald Freudenberger,
Eric Farman
From: Harald Freudenberger <freude@linux.ibm.com>
Support the subfunctions CPACF_KMCTR_AES_128, CPACF_KMCTR_AES_192
and CPACF_KMCTR_AES_256 for the cpacf kmctr instruction.
Signed-off-by: Harald Freudenberger <freude@linux.ibm.com>
Reviewed-by: Finn Callies <fcallies@linux.ibm.com>
Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260824083204.40877-11-freude@linux.ibm.com
Signed-off-by: Eric Farman <farman@linux.ibm.com>
---
target/s390x/gen-features.c | 3 ++
target/s390x/tcg/cpacf.h | 5 ++
target/s390x/tcg/cpacf_aes.c | 82 ++++++++++++++++++++++++++++++++
target/s390x/tcg/crypto_helper.c | 24 ++++++++++
4 files changed, 114 insertions(+)
diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c
index 1dadbcd34c..d2452b51d9 100644
--- a/target/s390x/gen-features.c
+++ b/target/s390x/gen-features.c
@@ -935,6 +935,9 @@ static uint16_t qemu_MAX[] = {
S390_FEAT_KMC_AES_128,
S390_FEAT_KMC_AES_192,
S390_FEAT_KMC_AES_256,
+ S390_FEAT_KMCTR_AES_128,
+ S390_FEAT_KMCTR_AES_192,
+ S390_FEAT_KMCTR_AES_256,
};
/****** END FEATURE DEFS ******/
diff --git a/target/s390x/tcg/cpacf.h b/target/s390x/tcg/cpacf.h
index 7dde122879..a78ddc2821 100644
--- a/target/s390x/tcg/cpacf.h
+++ b/target/s390x/tcg/cpacf.h
@@ -27,5 +27,10 @@ int cpacf_aes_cbc(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
uint64_t param_addr, uint64_t *dst_ptr_reg,
uint64_t *src_ptr_reg, uint64_t *src_len_reg,
uint32_t type, uint8_t fc, uint8_t mod);
+int cpacf_aes_ctr(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
+ uint64_t param_addr, uint64_t *dst_ptr_reg,
+ uint64_t *src_ptr_reg, uint64_t *src_len_reg,
+ uint64_t *ctr_ptr_reg, uint32_t type,
+ uint8_t fc, uint8_t mod);
#endif /* S390X_CPACF_H */
diff --git a/target/s390x/tcg/cpacf_aes.c b/target/s390x/tcg/cpacf_aes.c
index c937514e9b..474516bb5f 100644
--- a/target/s390x/tcg/cpacf_aes.c
+++ b/target/s390x/tcg/cpacf_aes.c
@@ -226,3 +226,85 @@ int cpacf_aes_cbc(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
return !len ? 0 : 3;
}
+
+int cpacf_aes_ctr(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
+ uint64_t param_addr, uint64_t *dst_ptr_reg,
+ uint64_t *src_ptr_reg, uint64_t *src_len_reg,
+ uint64_t *ctr_ptr_reg, uint32_t type,
+ uint8_t fc, uint8_t mod)
+{
+ enum { MAX_BLOCKS_PER_RUN = 8192 / AES_BLOCK_SIZE };
+ uint8_t in[AES_BLOCK_SIZE], out[AES_BLOCK_SIZE];
+ uint64_t len = *src_len_reg, done = 0;
+ uint8_t ctr[AES_BLOCK_SIZE], key[32];
+ int i, keysize, addr_reg_size;
+ AES_KEY exkey;
+
+ g_assert(type == S390_FEAT_TYPE_KMCTR);
+
+ switch (fc) {
+ case CPACF_KMCTR_AES_128:
+ keysize = 16;
+ break;
+ case CPACF_KMCTR_AES_192:
+ keysize = 24;
+ break;
+ case CPACF_KMCTR_AES_256:
+ keysize = 32;
+ break;
+ default:
+ g_assert_not_reached();
+ }
+
+ /* check addressing mode, raise exception if not supported here */
+ addr_reg_size = get_address_bitsize(env);
+ switch (addr_reg_size) {
+ case 64:
+ break;
+ case 32:
+ len = (uint32_t)len;
+ break;
+ default:
+ tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
+ }
+
+ /* early bail out if length is zero */
+ if (!len) {
+ return 0;
+ }
+
+ /* length has to be properly aligned. */
+ if (!QEMU_IS_ALIGNED(len, AES_BLOCK_SIZE)) {
+ tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
+ }
+
+ /* fetch key from param block */
+ read_guest_wrap_u8(env, mmu_idx, ra, param_addr, key, keysize);
+
+ /* expand key */
+ AES_set_encrypt_key(key, keysize * 8, &exkey);
+
+ /* process up to MAX_BLOCKS_PER_RUN aes blocks */
+ for (i = 0; i < MAX_BLOCKS_PER_RUN && len >= AES_BLOCK_SIZE; i++) {
+ /* read in nonce/ctr => ctr */
+ aes_read_block(env, mmu_idx, ra, *ctr_ptr_reg + done, ctr);
+ /* read in one block of input data => in */
+ aes_read_block(env, mmu_idx, ra, *src_ptr_reg + done, in);
+ /* encrypt ctr and xor with in => out */
+ AES_ctr_encrypt(in, out, ctr, &exkey);
+ /* write out the processed block */
+ aes_write_block(env, mmu_idx, ra, *dst_ptr_reg + done, out);
+ len -= AES_BLOCK_SIZE;
+ done += AES_BLOCK_SIZE;
+ }
+
+ *src_ptr_reg = deposit64(*src_ptr_reg, 0, addr_reg_size,
+ *src_ptr_reg + done);
+ *dst_ptr_reg = deposit64(*dst_ptr_reg, 0, addr_reg_size,
+ *dst_ptr_reg + done);
+ *ctr_ptr_reg = deposit64(*ctr_ptr_reg, 0, addr_reg_size,
+ *ctr_ptr_reg + done);
+ *src_len_reg -= done;
+
+ return !len ? 0 : 3;
+}
diff --git a/target/s390x/tcg/crypto_helper.c b/target/s390x/tcg/crypto_helper.c
index 7368c25e5d..3135974234 100644
--- a/target/s390x/tcg/crypto_helper.c
+++ b/target/s390x/tcg/crypto_helper.c
@@ -140,6 +140,27 @@ static int cpacf_kmc(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
return rc;
}
+static int cpacf_kmctr(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
+ uint32_t r1, uint32_t r2, uint32_t r3,
+ uint8_t fc, uint8_t mod)
+{
+ int rc = 0;
+
+ switch (fc) {
+ case CPACF_KMCTR_AES_128:
+ case CPACF_KMCTR_AES_192:
+ case CPACF_KMCTR_AES_256:
+ rc = cpacf_aes_ctr(env, mmu_idx, ra, env->regs[1],
+ &env->regs[r1], &env->regs[r2], &env->regs[r2 + 1],
+ &env->regs[r3], S390_FEAT_TYPE_KMCTR, fc, mod);
+ break;
+ default:
+ tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
+ }
+
+ return rc;
+}
+
static int cpacf_ppno(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
uint32_t r1, uint32_t r2, uint32_t r3, uint8_t fc)
{
@@ -214,6 +235,9 @@ uint32_t HELPER(msa)(CPUS390XState *env, uint32_t r1, uint32_t r2, uint32_t r3,
case S390_FEAT_TYPE_KMC:
rc = cpacf_kmc(env, mmu_idx, ra, r1, r2, r3, fc, mod);
break;
+ case S390_FEAT_TYPE_KMCTR:
+ rc = cpacf_kmctr(env, mmu_idx, ra, r1, r2, r3, fc, mod);
+ break;
case S390_FEAT_TYPE_PPNO:
rc = cpacf_ppno(env, mmu_idx, ra, r1, r2, r3, fc);
break;
--
2.55.0
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PULL 11/33] target/s390x: Minimal AES XTS support for cpacf pcc instruction
2026-09-21 20:07 [PULL 00/33] s390x queue for 11.2 Eric Farman
` (9 preceding siblings ...)
2026-09-21 20:08 ` [PULL 10/33] target/s390x: Support AES CTR for cpacf kmctr instruction Eric Farman
@ 2026-09-21 20:08 ` Eric Farman
2026-09-21 20:08 ` [PULL 12/33] target/s390x: Support AES XTS for cpacf km instruction Eric Farman
` (22 subsequent siblings)
33 siblings, 0 replies; 35+ messages in thread
From: Eric Farman @ 2026-09-21 20:08 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-s390x, Matthew Rosato, Cornelia Huck, Harald Freudenberger,
Eric Farman
From: Harald Freudenberger <freude@linux.ibm.com>
Support CPACF pcc subfunctions PCC-Compute-XTS-Parameter-AES-128
and PCC-Compute-XTS-Parameter-AES-245 but only for the special
case block sequential number is 0. However, this covers the s390
AES XTS implementation in the Linux kernel and Libica and thus
also Opencryptoki clear key via Libica.
Signed-off-by: Harald Freudenberger <freude@linux.ibm.com>
Tested-by: Holger Dengler <dengler@linux.ibm.com>
Reviewed-by: Holger Dengler <dengler@linux.ibm.com>
Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260824083204.40877-12-freude@linux.ibm.com
Signed-off-by: Eric Farman <farman@linux.ibm.com>
---
target/s390x/gen-features.c | 2 ++
target/s390x/tcg/cpacf.h | 2 ++
target/s390x/tcg/cpacf_aes.c | 53 ++++++++++++++++++++++++++++++++
target/s390x/tcg/crypto_helper.c | 20 ++++++++++++
4 files changed, 77 insertions(+)
diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c
index d2452b51d9..34e2be3af1 100644
--- a/target/s390x/gen-features.c
+++ b/target/s390x/gen-features.c
@@ -938,6 +938,8 @@ static uint16_t qemu_MAX[] = {
S390_FEAT_KMCTR_AES_128,
S390_FEAT_KMCTR_AES_192,
S390_FEAT_KMCTR_AES_256,
+ S390_FEAT_PCC_XTS_AES_128,
+ S390_FEAT_PCC_XTS_AES_256,
};
/****** END FEATURE DEFS ******/
diff --git a/target/s390x/tcg/cpacf.h b/target/s390x/tcg/cpacf.h
index a78ddc2821..4a20aeacde 100644
--- a/target/s390x/tcg/cpacf.h
+++ b/target/s390x/tcg/cpacf.h
@@ -32,5 +32,7 @@ int cpacf_aes_ctr(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
uint64_t *src_ptr_reg, uint64_t *src_len_reg,
uint64_t *ctr_ptr_reg, uint32_t type,
uint8_t fc, uint8_t mod);
+int cpacf_aes_pcc(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
+ uint64_t param_addr, uint8_t fc);
#endif /* S390X_CPACF_H */
diff --git a/target/s390x/tcg/cpacf_aes.c b/target/s390x/tcg/cpacf_aes.c
index 474516bb5f..6c7b959bd9 100644
--- a/target/s390x/tcg/cpacf_aes.c
+++ b/target/s390x/tcg/cpacf_aes.c
@@ -308,3 +308,56 @@ int cpacf_aes_ctr(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
return !len ? 0 : 3;
}
+
+int cpacf_aes_pcc(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
+ uint64_t param_addr, uint8_t fc)
+{
+ uint8_t key[32], tweak[AES_BLOCK_SIZE], buf[AES_BLOCK_SIZE];
+ int keysize, i;
+ AES_KEY exkey;
+
+ switch (fc) {
+ case CPACF_PCC_XTS_AES_128:
+ keysize = 16;
+ break;
+ case CPACF_PCC_XTS_AES_256:
+ keysize = 32;
+ break;
+ default:
+ g_assert_not_reached();
+ }
+
+ /* fetch block sequence nr from param block into buf */
+ read_guest_wrap_u8(env, mmu_idx, ra,
+ param_addr + keysize + AES_BLOCK_SIZE,
+ buf, AES_BLOCK_SIZE);
+
+ /* is the block sequence nr 0 ? */
+ for (i = 0; i < AES_BLOCK_SIZE && !buf[i]; i++) {
+ ;
+ }
+ if (i < AES_BLOCK_SIZE) {
+ /* no, sorry handling of non zero block sequence is not implemented */
+ tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
+ }
+
+ /* fetch key from param block */
+ read_guest_wrap_u8(env, mmu_idx, ra, param_addr, key, keysize);
+
+ /* fetch tweak from param block into tweak */
+ read_guest_wrap_u8(env, mmu_idx, ra,
+ param_addr + keysize, tweak, AES_BLOCK_SIZE);
+
+ /* expand key */
+ AES_set_encrypt_key(key, keysize * 8, &exkey);
+
+ /* encrypt tweak */
+ AES_encrypt(tweak, buf, &exkey);
+
+ /* store encrypted tweak into xts parameter field of the param block */
+ write_guest_wrap_u8(env, mmu_idx, ra,
+ param_addr + keysize + 3 * AES_BLOCK_SIZE,
+ buf, AES_BLOCK_SIZE);
+
+ return 0;
+}
diff --git a/target/s390x/tcg/crypto_helper.c b/target/s390x/tcg/crypto_helper.c
index 3135974234..c829d16f74 100644
--- a/target/s390x/tcg/crypto_helper.c
+++ b/target/s390x/tcg/crypto_helper.c
@@ -182,6 +182,23 @@ static int cpacf_ppno(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
return rc;
}
+static int cpacf_pcc(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
+ uint8_t fc)
+{
+ int rc = 0;
+
+ switch (fc) {
+ case CPACF_PCC_XTS_AES_128:
+ case CPACF_PCC_XTS_AES_256:
+ rc = cpacf_aes_pcc(env, mmu_idx, ra, env->regs[1], fc);
+ break;
+ default:
+ tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
+ }
+
+ return rc;
+}
+
uint32_t HELPER(msa)(CPUS390XState *env, uint32_t r1, uint32_t r2, uint32_t r3,
uint32_t type)
{
@@ -238,6 +255,9 @@ uint32_t HELPER(msa)(CPUS390XState *env, uint32_t r1, uint32_t r2, uint32_t r3,
case S390_FEAT_TYPE_KMCTR:
rc = cpacf_kmctr(env, mmu_idx, ra, r1, r2, r3, fc, mod);
break;
+ case S390_FEAT_TYPE_PCC:
+ rc = cpacf_pcc(env, mmu_idx, ra, fc);
+ break;
case S390_FEAT_TYPE_PPNO:
rc = cpacf_ppno(env, mmu_idx, ra, r1, r2, r3, fc);
break;
--
2.55.0
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PULL 12/33] target/s390x: Support AES XTS for cpacf km instruction
2026-09-21 20:07 [PULL 00/33] s390x queue for 11.2 Eric Farman
` (10 preceding siblings ...)
2026-09-21 20:08 ` [PULL 11/33] target/s390x: Minimal AES XTS support for cpacf pcc instruction Eric Farman
@ 2026-09-21 20:08 ` Eric Farman
2026-09-21 20:08 ` [PULL 13/33] target/s390x: Base support for cpacf protected keys and pckmo Eric Farman
` (21 subsequent siblings)
33 siblings, 0 replies; 35+ messages in thread
From: Eric Farman @ 2026-09-21 20:08 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-s390x, Matthew Rosato, Cornelia Huck, Harald Freudenberger,
Eric Farman
From: Harald Freudenberger <freude@linux.ibm.com>
Support the subfunctions XTS-AES-128 and XTS-AES-256
for the cpacf km instruction.
Signed-off-by: Harald Freudenberger <freude@linux.ibm.com>
Tested-by: Holger Dengler <dengler@linux.ibm.com>
Reviewed-by: Holger Dengler <dengler@linux.ibm.com>
Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260824083204.40877-13-freude@linux.ibm.com
Signed-off-by: Eric Farman <farman@linux.ibm.com>
---
target/s390x/gen-features.c | 2 +
target/s390x/tcg/cpacf.h | 4 ++
target/s390x/tcg/cpacf_aes.c | 93 ++++++++++++++++++++++++++++++++
target/s390x/tcg/crypto_helper.c | 6 +++
4 files changed, 105 insertions(+)
diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c
index 34e2be3af1..ad99f9ff85 100644
--- a/target/s390x/gen-features.c
+++ b/target/s390x/gen-features.c
@@ -932,6 +932,8 @@ static uint16_t qemu_MAX[] = {
S390_FEAT_KM_AES_128,
S390_FEAT_KM_AES_192,
S390_FEAT_KM_AES_256,
+ S390_FEAT_KM_XTS_AES_128,
+ S390_FEAT_KM_XTS_AES_256,
S390_FEAT_KMC_AES_128,
S390_FEAT_KMC_AES_192,
S390_FEAT_KMC_AES_256,
diff --git a/target/s390x/tcg/cpacf.h b/target/s390x/tcg/cpacf.h
index 4a20aeacde..5013e19907 100644
--- a/target/s390x/tcg/cpacf.h
+++ b/target/s390x/tcg/cpacf.h
@@ -34,5 +34,9 @@ int cpacf_aes_ctr(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
uint8_t fc, uint8_t mod);
int cpacf_aes_pcc(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
uint64_t param_addr, uint8_t fc);
+int cpacf_aes_xts(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
+ uint64_t param_addr, uint64_t *dst_ptr_reg,
+ uint64_t *src_ptr_reg, uint64_t *src_len_reg,
+ uint32_t type, uint8_t fc, uint8_t mod);
#endif /* S390X_CPACF_H */
diff --git a/target/s390x/tcg/cpacf_aes.c b/target/s390x/tcg/cpacf_aes.c
index 6c7b959bd9..f705bd6677 100644
--- a/target/s390x/tcg/cpacf_aes.c
+++ b/target/s390x/tcg/cpacf_aes.c
@@ -361,3 +361,96 @@ int cpacf_aes_pcc(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
return 0;
}
+
+int cpacf_aes_xts(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
+ uint64_t param_addr, uint64_t *dst_ptr_reg,
+ uint64_t *src_ptr_reg, uint64_t *src_len_reg,
+ uint32_t type, uint8_t fc, uint8_t mod)
+{
+ enum { MAX_BLOCKS_PER_RUN = 8192 / AES_BLOCK_SIZE };
+ uint8_t in[AES_BLOCK_SIZE], out[AES_BLOCK_SIZE];
+ uint64_t len = *src_len_reg, done = 0;
+ uint8_t key[32], tweak[AES_BLOCK_SIZE];
+ int i, keysize, addr_reg_size;
+ AES_KEY exkey;
+
+ g_assert(type == S390_FEAT_TYPE_KM);
+
+ switch (fc) {
+ case CPACF_KM_XTS_128:
+ keysize = 16;
+ break;
+ case CPACF_KM_XTS_256:
+ keysize = 32;
+ break;
+ default:
+ g_assert_not_reached();
+ }
+
+ /* check addressing mode, raise exception if not supported here */
+ addr_reg_size = get_address_bitsize(env);
+ switch (addr_reg_size) {
+ case 64:
+ break;
+ case 32:
+ len = (uint32_t)len;
+ break;
+ default:
+ tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
+ }
+
+ /* early bail out if length is zero */
+ if (!len) {
+ return 0;
+ }
+
+ /* length has to be properly aligned. */
+ if (!QEMU_IS_ALIGNED(len, AES_BLOCK_SIZE)) {
+ tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
+ }
+
+ /* fetch key from param block */
+ read_guest_wrap_u8(env, mmu_idx, ra, param_addr, key, keysize);
+
+ /* expand key */
+ if (mod) {
+ AES_set_decrypt_key(key, keysize * 8, &exkey);
+ } else {
+ AES_set_encrypt_key(key, keysize * 8, &exkey);
+ }
+
+ /* fetch tweak from param block */
+ read_guest_wrap_u8(env, mmu_idx, ra,
+ param_addr + keysize, tweak, AES_BLOCK_SIZE);
+
+ /* process up to MAX_BLOCKS_PER_RUN aes blocks */
+ for (i = 0; i < MAX_BLOCKS_PER_RUN && len >= AES_BLOCK_SIZE; i++) {
+ /* fetch one AES block into in */
+ aes_read_block(env, mmu_idx, ra, *src_ptr_reg + done, in);
+ if (mod) {
+ /* decrypt in => out */
+ AES_xts_decrypt(in, out, tweak, &exkey);
+ } else {
+ /* encrypt in => out */
+ AES_xts_encrypt(in, out, tweak, &exkey);
+ }
+ /* prep tweak for next round */
+ AES_xts_prep_next_tweak(tweak);
+ /* write out this processed block from out */
+ aes_write_block(env, mmu_idx, ra, *dst_ptr_reg + done, out);
+ len -= AES_BLOCK_SIZE;
+ done += AES_BLOCK_SIZE;
+ }
+
+ /* update tweak in param block */
+ write_guest_wrap_u8(env, mmu_idx, ra,
+ param_addr + keysize, tweak, AES_BLOCK_SIZE);
+
+ *src_ptr_reg = deposit64(*src_ptr_reg, 0, addr_reg_size,
+ *src_ptr_reg + done);
+ *dst_ptr_reg = deposit64(*dst_ptr_reg, 0, addr_reg_size,
+ *dst_ptr_reg + done);
+ *src_len_reg -= done;
+
+ return !len ? 0 : 3;
+}
diff --git a/target/s390x/tcg/crypto_helper.c b/target/s390x/tcg/crypto_helper.c
index c829d16f74..2bd39f8978 100644
--- a/target/s390x/tcg/crypto_helper.c
+++ b/target/s390x/tcg/crypto_helper.c
@@ -112,6 +112,12 @@ static int cpacf_km(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
&env->regs[r1], &env->regs[r2], &env->regs[r2 + 1],
S390_FEAT_TYPE_KM, fc, mod);
break;
+ case CPACF_KM_XTS_128:
+ case CPACF_KM_XTS_256:
+ rc = cpacf_aes_xts(env, mmu_idx, ra, env->regs[1],
+ &env->regs[r1], &env->regs[r2], &env->regs[r2 + 1],
+ S390_FEAT_TYPE_KM, fc, mod);
+ break;
default:
tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
}
--
2.55.0
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PULL 13/33] target/s390x: Base support for cpacf protected keys and pckmo
2026-09-21 20:07 [PULL 00/33] s390x queue for 11.2 Eric Farman
` (11 preceding siblings ...)
2026-09-21 20:08 ` [PULL 12/33] target/s390x: Support AES XTS for cpacf km instruction Eric Farman
@ 2026-09-21 20:08 ` Eric Farman
2026-09-21 20:08 ` [PULL 14/33] target/s390x: Support protected key AES ECB for cpacf km instruction Eric Farman
` (20 subsequent siblings)
33 siblings, 0 replies; 35+ messages in thread
From: Eric Farman @ 2026-09-21 20:08 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-s390x, Matthew Rosato, Cornelia Huck, Harald Freudenberger,
Eric Farman
From: Harald Freudenberger <freude@linux.ibm.com>
Add base support for cpacf protected key handling.
Add support for the pckmo subfunctions PCKMO-Encrypt-AES-128-Key,
PCKMO-Encrypt-AES-192-Key and PCKMO-Encrypt-AES-256-Key which deal
with protected keys. These pckmo subfunctions derive a protected key
from an AES clear key by encrypting it with an internal AES wrapping
key. More details about protected keys can be found in the
"z/Architecture Prinziples of Operation" document.
The qemu version provided here is only a fake intended to make
protected key available for developing and testing purpose:
* The protected key is 'derived' from the clear key by xoring
the fixed pattern 0xAAAA... onto the key value.
* The AES Wrapping Key Verification Pattern is a fixed
value of 32 bytes 0x0F0A0C0E0F0A0C0E...
Add preprocessor defines for the xor pattern and wkvp used to
construct ('encrypt') a protected key from a clear key value with
this implementation. Also add some static functions to 'encrypt'
from clear key to protected key and 'decrypt' back to cpacf_aes.c.
The preprocessor defines shall be used later in testcases to
construct and decode protected keys.
Signed-off-by: Harald Freudenberger <freude@linux.ibm.com>
Tested-by: Holger Dengler <dengler@linux.ibm.com>
Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260824083204.40877-14-freude@linux.ibm.com
Signed-off-by: Eric Farman <farman@linux.ibm.com>
---
target/s390x/gen-features.c | 3 ++
target/s390x/tcg/cpacf-arch.h | 25 +++++++++++++
target/s390x/tcg/cpacf.h | 2 +
target/s390x/tcg/cpacf_aes.c | 64 ++++++++++++++++++++++++++++++++
target/s390x/tcg/crypto_helper.c | 21 +++++++++++
target/s390x/tcg/translate.c | 14 +++++--
6 files changed, 126 insertions(+), 3 deletions(-)
diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c
index ad99f9ff85..e00255af67 100644
--- a/target/s390x/gen-features.c
+++ b/target/s390x/gen-features.c
@@ -942,6 +942,9 @@ static uint16_t qemu_MAX[] = {
S390_FEAT_KMCTR_AES_256,
S390_FEAT_PCC_XTS_AES_128,
S390_FEAT_PCC_XTS_AES_256,
+ S390_FEAT_PCKMO_AES_128,
+ S390_FEAT_PCKMO_AES_192,
+ S390_FEAT_PCKMO_AES_256,
};
/****** END FEATURE DEFS ******/
diff --git a/target/s390x/tcg/cpacf-arch.h b/target/s390x/tcg/cpacf-arch.h
index f92e4b44e3..cd51169c45 100644
--- a/target/s390x/tcg/cpacf-arch.h
+++ b/target/s390x/tcg/cpacf-arch.h
@@ -223,4 +223,29 @@
#define CPACF_KDSA_PSIGN_ED25519 48
#define CPACF_KDSA_PSIGN_ED448 52
+/*
+ * Support for protected key cpacf functions. Note that this is
+ * a fake implementation intended for debugging and development.
+ * Do not use for production load !
+ */
+
+/*
+ * Hard coded pattern xored with the AES clear key
+ * to 'produce' the protected key.
+ */
+#define PROTKEY_XOR_PATTERN { \
+ 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, \
+ 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, \
+ 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, \
+ 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA }
+
+/*
+ * Hard coded wkvp ("Wrapping Key Verification Pattern")
+ */
+#define PROTKEY_WKVP { \
+ 0x0F, 0x0A, 0x0C, 0x0E, 0x0F, 0x0A, 0x0C, 0x0E, \
+ 0x0F, 0x0A, 0x0C, 0x0E, 0x0F, 0x0A, 0x0C, 0x0E, \
+ 0x0F, 0x0A, 0x0C, 0x0E, 0x0F, 0x0A, 0x0C, 0x0E, \
+ 0x0F, 0x0A, 0x0C, 0x0E, 0x0F, 0x0A, 0x0C, 0x0E }
+
#endif /* S390X_CPACF_ARCH_H */
diff --git a/target/s390x/tcg/cpacf.h b/target/s390x/tcg/cpacf.h
index 5013e19907..1964de5b6d 100644
--- a/target/s390x/tcg/cpacf.h
+++ b/target/s390x/tcg/cpacf.h
@@ -38,5 +38,7 @@ int cpacf_aes_xts(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
uint64_t param_addr, uint64_t *dst_ptr_reg,
uint64_t *src_ptr_reg, uint64_t *src_len_reg,
uint32_t type, uint8_t fc, uint8_t mod);
+int cpacf_aes_pckmo(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
+ uint64_t param_addr, uint8_t fc);
#endif /* S390X_CPACF_H */
diff --git a/target/s390x/tcg/cpacf_aes.c b/target/s390x/tcg/cpacf_aes.c
index f705bd6677..5a835016df 100644
--- a/target/s390x/tcg/cpacf_aes.c
+++ b/target/s390x/tcg/cpacf_aes.c
@@ -454,3 +454,67 @@ int cpacf_aes_xts(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
return !len ? 0 : 3;
}
+
+/*
+ * Support for protected key cpacf functions. Note that this is
+ * a fake implementation intended for debugging and development.
+ * Do not use for production load !
+ */
+
+/*
+ * Hard coded pattern xored with the AES clear key
+ * to 'produce' the protected key.
+ */
+static const uint8_t protkey_xor_pattern[32] = PROTKEY_XOR_PATTERN;
+
+/*
+ * Hard coded wkvp ("Wrapping Key Verification Pattern")
+ */
+static const uint8_t protkey_wkvp[32] = PROTKEY_WKVP;
+
+/*
+ * 'encrypt' the clear key value into a protected key
+ * by xor-ing the protkey_xor_pattern onto it.
+ */
+static void encrypt_clrkey(uint8_t *key, int keysize)
+{
+ for (int i = 0; i < keysize; i++) {
+ key[i] ^= protkey_xor_pattern[i];
+ }
+}
+
+int cpacf_aes_pckmo(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
+ uint64_t param_addr, uint8_t fc)
+{
+ uint8_t key[32];
+ int keysize;
+
+ switch (fc) {
+ case CPACF_PCKMO_ENC_AES_128_KEY:
+ keysize = 16;
+ break;
+ case CPACF_PCKMO_ENC_AES_192_KEY:
+ keysize = 24;
+ break;
+ case CPACF_PCKMO_ENC_AES_256_KEY:
+ keysize = 32;
+ break;
+ default:
+ g_assert_not_reached();
+ }
+
+ /* fetch key from param block */
+ read_guest_wrap_u8(env, mmu_idx, ra, param_addr, key, keysize);
+
+ /* 'derive' the protected key from the clear key */
+ encrypt_clrkey(key, keysize);
+
+ /* store the protected key into param block */
+ write_guest_wrap_u8(env, mmu_idx, ra, param_addr, key, keysize);
+ /* followed by the fake wkvp */
+ write_guest_wrap_u8(env, mmu_idx, ra,
+ param_addr + keysize,
+ protkey_wkvp, sizeof(protkey_wkvp));
+
+ return 0;
+}
diff --git a/target/s390x/tcg/crypto_helper.c b/target/s390x/tcg/crypto_helper.c
index 2bd39f8978..191b30e0f8 100644
--- a/target/s390x/tcg/crypto_helper.c
+++ b/target/s390x/tcg/crypto_helper.c
@@ -205,6 +205,24 @@ static int cpacf_pcc(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
return rc;
}
+static int cpacf_pckmo(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
+ uint8_t fc)
+{
+ int rc = 0;
+
+ switch (fc) {
+ case CPACF_PCKMO_ENC_AES_128_KEY:
+ case CPACF_PCKMO_ENC_AES_192_KEY:
+ case CPACF_PCKMO_ENC_AES_256_KEY:
+ rc = cpacf_aes_pckmo(env, mmu_idx, ra, env->regs[1], fc);
+ break;
+ default:
+ tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
+ }
+
+ return rc;
+}
+
uint32_t HELPER(msa)(CPUS390XState *env, uint32_t r1, uint32_t r2, uint32_t r3,
uint32_t type)
{
@@ -264,6 +282,9 @@ uint32_t HELPER(msa)(CPUS390XState *env, uint32_t r1, uint32_t r2, uint32_t r3,
case S390_FEAT_TYPE_PCC:
rc = cpacf_pcc(env, mmu_idx, ra, fc);
break;
+ case S390_FEAT_TYPE_PCKMO:
+ rc = cpacf_pckmo(env, mmu_idx, ra, fc);
+ break;
case S390_FEAT_TYPE_PPNO:
rc = cpacf_ppno(env, mmu_idx, ra, r1, r2, r3, fc);
break;
diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c
index 7e74e9742f..474d604ed1 100644
--- a/target/s390x/tcg/translate.c
+++ b/target/s390x/tcg/translate.c
@@ -2558,6 +2558,7 @@ static DisasJumpType op_msa(DisasContext *s, DisasOps *o)
int r2 = have_field(s, r2) ? get_field(s, r2) : 0;
int r3 = have_field(s, r3) ? get_field(s, r3) : 0;
TCGv_i32 t_r1, t_r2, t_r3, type;
+ bool update_cc = true;
switch (s->insn->data) {
case S390_FEAT_TYPE_KMA:
@@ -2590,8 +2591,10 @@ static DisasJumpType op_msa(DisasContext *s, DisasOps *o)
gen_program_exception(s, PGM_SPECIFICATION);
return DISAS_NORETURN;
}
- /* FALL THROUGH */
+ break;
case S390_FEAT_TYPE_PCKMO:
+ update_cc = false;
+ /* FALL THROUGH */
case S390_FEAT_TYPE_PCC:
break;
default:
@@ -2602,8 +2605,13 @@ static DisasJumpType op_msa(DisasContext *s, DisasOps *o)
t_r2 = tcg_constant_i32(r2);
t_r3 = tcg_constant_i32(r3);
type = tcg_constant_i32(s->insn->data);
- gen_helper_msa(cc_op, tcg_env, t_r1, t_r2, t_r3, type);
- set_cc_static(s);
+ if (update_cc) {
+ gen_helper_msa(cc_op, tcg_env, t_r1, t_r2, t_r3, type);
+ set_cc_static(s);
+ } else {
+ TCGv_i32 cc_dummy = tcg_temp_new_i32();
+ gen_helper_msa(cc_dummy, tcg_env, t_r1, t_r2, t_r3, type);
+ }
return DISAS_NEXT;
}
--
2.55.0
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PULL 14/33] target/s390x: Support protected key AES ECB for cpacf km instruction
2026-09-21 20:07 [PULL 00/33] s390x queue for 11.2 Eric Farman
` (12 preceding siblings ...)
2026-09-21 20:08 ` [PULL 13/33] target/s390x: Base support for cpacf protected keys and pckmo Eric Farman
@ 2026-09-21 20:08 ` Eric Farman
2026-09-21 20:08 ` [PULL 15/33] target/s390x: Support protected key AES CBC for cpacf kmc instruction Eric Farman
` (19 subsequent siblings)
33 siblings, 0 replies; 35+ messages in thread
From: Eric Farman @ 2026-09-21 20:08 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-s390x, Matthew Rosato, Cornelia Huck, Harald Freudenberger,
Eric Farman
From: Harald Freudenberger <freude@linux.ibm.com>
Support the subfunctions CPACF_KM_PAES_128, CPACF_KM_PAES_192
and CPACF_KM_PAES_256 for the cpacf km instruction.
Signed-off-by: Harald Freudenberger <freude@linux.ibm.com>
Tested-by: Holger Dengler <dengler@linux.ibm.com>
Reviewed-by: Finn Callies <fcallies@linux.ibm.com>
Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260824083204.40877-15-freude@linux.ibm.com
Signed-off-by: Eric Farman <farman@linux.ibm.com>
---
target/s390x/gen-features.c | 3 +
target/s390x/tcg/cpacf.h | 4 ++
target/s390x/tcg/cpacf_aes.c | 103 +++++++++++++++++++++++++++++++
target/s390x/tcg/crypto_helper.c | 7 +++
4 files changed, 117 insertions(+)
diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c
index e00255af67..4e3d851873 100644
--- a/target/s390x/gen-features.c
+++ b/target/s390x/gen-features.c
@@ -932,6 +932,9 @@ static uint16_t qemu_MAX[] = {
S390_FEAT_KM_AES_128,
S390_FEAT_KM_AES_192,
S390_FEAT_KM_AES_256,
+ S390_FEAT_KM_EAES_128,
+ S390_FEAT_KM_EAES_192,
+ S390_FEAT_KM_EAES_256,
S390_FEAT_KM_XTS_AES_128,
S390_FEAT_KM_XTS_AES_256,
S390_FEAT_KMC_AES_128,
diff --git a/target/s390x/tcg/cpacf.h b/target/s390x/tcg/cpacf.h
index 1964de5b6d..9c654c3353 100644
--- a/target/s390x/tcg/cpacf.h
+++ b/target/s390x/tcg/cpacf.h
@@ -40,5 +40,9 @@ int cpacf_aes_xts(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
uint32_t type, uint8_t fc, uint8_t mod);
int cpacf_aes_pckmo(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
uint64_t param_addr, uint8_t fc);
+int cpacf_paes_ecb(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
+ uint64_t param_addr, uint64_t *dst_ptr_reg,
+ uint64_t *src_ptr_reg, uint64_t *src_len_reg,
+ uint32_t type, uint8_t fc, uint8_t mod);
#endif /* S390X_CPACF_H */
diff --git a/target/s390x/tcg/cpacf_aes.c b/target/s390x/tcg/cpacf_aes.c
index 5a835016df..cbe7547c0b 100644
--- a/target/s390x/tcg/cpacf_aes.c
+++ b/target/s390x/tcg/cpacf_aes.c
@@ -483,6 +483,17 @@ static void encrypt_clrkey(uint8_t *key, int keysize)
}
}
+/*
+ * 'decrypt' the protected key by reverting the xor
+ * of the protkey_xor_pattern onto the clear key value.
+ */
+static void decrypt_protkey(uint8_t *key, int keysize)
+{
+ for (int i = 0; i < keysize; i++) {
+ key[i] ^= protkey_xor_pattern[i];
+ }
+}
+
int cpacf_aes_pckmo(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
uint64_t param_addr, uint8_t fc)
{
@@ -518,3 +529,95 @@ int cpacf_aes_pckmo(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
return 0;
}
+
+int cpacf_paes_ecb(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
+ uint64_t param_addr, uint64_t *dst_ptr_reg,
+ uint64_t *src_ptr_reg, uint64_t *src_len_reg,
+ uint32_t type, uint8_t fc, uint8_t mod)
+{
+ enum { MAX_BLOCKS_PER_RUN = 8192 / AES_BLOCK_SIZE };
+ uint8_t in[AES_BLOCK_SIZE], out[AES_BLOCK_SIZE];
+ uint64_t len = *src_len_reg, done = 0;
+ int i, keysize, addr_reg_size;
+ uint8_t key[32], wkvp[32];
+ AES_KEY exkey;
+
+ g_assert(type == S390_FEAT_TYPE_KM);
+
+ switch (fc) {
+ case CPACF_KM_PAES_128:
+ keysize = 16;
+ break;
+ case CPACF_KM_PAES_192:
+ keysize = 24;
+ break;
+ case CPACF_KM_PAES_256:
+ keysize = 32;
+ break;
+ default:
+ g_assert_not_reached();
+ }
+
+ /* check addressing mode, raise exception if not supported here */
+ addr_reg_size = get_address_bitsize(env);
+ switch (addr_reg_size) {
+ case 64:
+ break;
+ case 32:
+ len = (uint32_t)len;
+ break;
+ default:
+ tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
+ }
+
+ /* early bail out if length is zero */
+ if (!len) {
+ return 0;
+ }
+
+ /* length has to be properly aligned. */
+ if (!QEMU_IS_ALIGNED(len, AES_BLOCK_SIZE)) {
+ tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
+ }
+
+ /* fetch and check wkvp from param block */
+ read_guest_wrap_u8(env, mmu_idx, ra,
+ param_addr + keysize, wkvp, sizeof(wkvp));
+ if (memcmp(wkvp, protkey_wkvp, sizeof(wkvp))) {
+ /* wkvp mismatch -> return with cc 1 */
+ return 1;
+ }
+
+ /* fetch protected key from param block */
+ read_guest_wrap_u8(env, mmu_idx, ra, param_addr, key, keysize);
+ /* decrypt the protected key */
+ decrypt_protkey(key, keysize);
+
+ /* expand key */
+ if (mod) {
+ AES_set_decrypt_key(key, keysize * 8, &exkey);
+ } else {
+ AES_set_encrypt_key(key, keysize * 8, &exkey);
+ }
+
+ /* process up to MAX_BLOCKS_PER_RUN aes blocks */
+ for (i = 0; i < MAX_BLOCKS_PER_RUN && len >= AES_BLOCK_SIZE; i++) {
+ aes_read_block(env, mmu_idx, ra, *src_ptr_reg + done, in);
+ if (mod) {
+ AES_decrypt(in, out, &exkey);
+ } else {
+ AES_encrypt(in, out, &exkey);
+ }
+ aes_write_block(env, mmu_idx, ra, *dst_ptr_reg + done, out);
+ len -= AES_BLOCK_SIZE;
+ done += AES_BLOCK_SIZE;
+ }
+
+ *src_ptr_reg = deposit64(*src_ptr_reg, 0, addr_reg_size,
+ *src_ptr_reg + done);
+ *dst_ptr_reg = deposit64(*dst_ptr_reg, 0, addr_reg_size,
+ *dst_ptr_reg + done);
+ *src_len_reg -= done;
+
+ return !len ? 0 : 3;
+}
diff --git a/target/s390x/tcg/crypto_helper.c b/target/s390x/tcg/crypto_helper.c
index 191b30e0f8..82d03fb8a1 100644
--- a/target/s390x/tcg/crypto_helper.c
+++ b/target/s390x/tcg/crypto_helper.c
@@ -112,6 +112,13 @@ static int cpacf_km(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
&env->regs[r1], &env->regs[r2], &env->regs[r2 + 1],
S390_FEAT_TYPE_KM, fc, mod);
break;
+ case CPACF_KM_PAES_128:
+ case CPACF_KM_PAES_192:
+ case CPACF_KM_PAES_256:
+ rc = cpacf_paes_ecb(env, mmu_idx, ra, env->regs[1],
+ &env->regs[r1], &env->regs[r2], &env->regs[r2 + 1],
+ S390_FEAT_TYPE_KM, fc, mod);
+ break;
case CPACF_KM_XTS_128:
case CPACF_KM_XTS_256:
rc = cpacf_aes_xts(env, mmu_idx, ra, env->regs[1],
--
2.55.0
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PULL 15/33] target/s390x: Support protected key AES CBC for cpacf kmc instruction
2026-09-21 20:07 [PULL 00/33] s390x queue for 11.2 Eric Farman
` (13 preceding siblings ...)
2026-09-21 20:08 ` [PULL 14/33] target/s390x: Support protected key AES ECB for cpacf km instruction Eric Farman
@ 2026-09-21 20:08 ` Eric Farman
2026-09-21 20:08 ` [PULL 16/33] target/s390x: Support protected key AES CTR for cpacf kmctr instruction Eric Farman
` (18 subsequent siblings)
33 siblings, 0 replies; 35+ messages in thread
From: Eric Farman @ 2026-09-21 20:08 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-s390x, Matthew Rosato, Cornelia Huck, Harald Freudenberger,
Eric Farman
From: Harald Freudenberger <freude@linux.ibm.com>
Support the subfunctions CPACF_KMC_PAES_128, CPACF_KMC_PAES_192
and CPACF_KMC_PAES_256 for the cpacf kmc instruction.
Signed-off-by: Harald Freudenberger <freude@linux.ibm.com>
Tested-by: Holger Dengler <dengler@linux.ibm.com>
Reviewed-by: Finn Callies <fcallies@linux.ibm.com>
Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260824083204.40877-16-freude@linux.ibm.com
Signed-off-by: Eric Farman <farman@linux.ibm.com>
---
target/s390x/gen-features.c | 3 +
target/s390x/tcg/cpacf.h | 4 ++
target/s390x/tcg/cpacf_aes.c | 102 +++++++++++++++++++++++++++++++
target/s390x/tcg/crypto_helper.c | 7 +++
4 files changed, 116 insertions(+)
diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c
index 4e3d851873..eb7c00a448 100644
--- a/target/s390x/gen-features.c
+++ b/target/s390x/gen-features.c
@@ -940,6 +940,9 @@ static uint16_t qemu_MAX[] = {
S390_FEAT_KMC_AES_128,
S390_FEAT_KMC_AES_192,
S390_FEAT_KMC_AES_256,
+ S390_FEAT_KMC_EAES_128,
+ S390_FEAT_KMC_EAES_192,
+ S390_FEAT_KMC_EAES_256,
S390_FEAT_KMCTR_AES_128,
S390_FEAT_KMCTR_AES_192,
S390_FEAT_KMCTR_AES_256,
diff --git a/target/s390x/tcg/cpacf.h b/target/s390x/tcg/cpacf.h
index 9c654c3353..73cb564c0b 100644
--- a/target/s390x/tcg/cpacf.h
+++ b/target/s390x/tcg/cpacf.h
@@ -44,5 +44,9 @@ int cpacf_paes_ecb(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
uint64_t param_addr, uint64_t *dst_ptr_reg,
uint64_t *src_ptr_reg, uint64_t *src_len_reg,
uint32_t type, uint8_t fc, uint8_t mod);
+int cpacf_paes_cbc(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
+ uint64_t param_addr, uint64_t *dst_ptr_reg,
+ uint64_t *src_ptr_reg, uint64_t *src_len_reg,
+ uint32_t type, uint8_t fc, uint8_t mod);
#endif /* S390X_CPACF_H */
diff --git a/target/s390x/tcg/cpacf_aes.c b/target/s390x/tcg/cpacf_aes.c
index cbe7547c0b..e155387fa8 100644
--- a/target/s390x/tcg/cpacf_aes.c
+++ b/target/s390x/tcg/cpacf_aes.c
@@ -621,3 +621,105 @@ int cpacf_paes_ecb(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
return !len ? 0 : 3;
}
+
+int cpacf_paes_cbc(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
+ uint64_t param_addr, uint64_t *dst_ptr_reg,
+ uint64_t *src_ptr_reg, uint64_t *src_len_reg,
+ uint32_t type, uint8_t fc, uint8_t mod)
+{
+ enum { MAX_BLOCKS_PER_RUN = 8192 / AES_BLOCK_SIZE };
+ uint8_t in[AES_BLOCK_SIZE], out[AES_BLOCK_SIZE];
+ uint8_t key[32], wkvp[32], iv[AES_BLOCK_SIZE];
+ uint64_t len = *src_len_reg, done = 0;
+ int i, keysize, addr_reg_size;
+ AES_KEY exkey;
+
+ g_assert(type == S390_FEAT_TYPE_KMC);
+
+ switch (fc) {
+ case CPACF_KMC_PAES_128:
+ keysize = 16;
+ break;
+ case CPACF_KMC_PAES_192:
+ keysize = 24;
+ break;
+ case CPACF_KMC_PAES_256:
+ keysize = 32;
+ break;
+ default:
+ g_assert_not_reached();
+ }
+
+ /* check addressing mode, raise exception if not supported here */
+ addr_reg_size = get_address_bitsize(env);
+ switch (addr_reg_size) {
+ case 64:
+ break;
+ case 32:
+ len = (uint32_t)len;
+ break;
+ default:
+ tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
+ }
+
+ /* early bail out if length is zero */
+ if (!len) {
+ return 0;
+ }
+
+ /* length has to be properly aligned. */
+ if (!QEMU_IS_ALIGNED(len, AES_BLOCK_SIZE)) {
+ tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
+ }
+
+ /* fetch and check wkvp from param block */
+ read_guest_wrap_u8(env, mmu_idx, ra,
+ param_addr + AES_BLOCK_SIZE + keysize,
+ wkvp, sizeof(wkvp));
+ if (memcmp(wkvp, protkey_wkvp, sizeof(wkvp))) {
+ /* wkvp mismatch -> return with cc 1 */
+ return 1;
+ }
+
+ /* fetch iv from param block */
+ read_guest_wrap_u8(env, mmu_idx, ra, param_addr, iv, AES_BLOCK_SIZE);
+
+ /* fetch protected key from param block */
+ read_guest_wrap_u8(env, mmu_idx, ra,
+ param_addr + AES_BLOCK_SIZE, key, keysize);
+ /* decrypt the protected key */
+ decrypt_protkey(key, keysize);
+
+ /* expand key */
+ if (mod) {
+ AES_set_decrypt_key(key, keysize * 8, &exkey);
+ } else {
+ AES_set_encrypt_key(key, keysize * 8, &exkey);
+ }
+
+ /* process up to MAX_BLOCKS_PER_RUN aes blocks */
+ for (i = 0; i < MAX_BLOCKS_PER_RUN && len >= AES_BLOCK_SIZE; i++) {
+ aes_read_block(env, mmu_idx, ra, *src_ptr_reg + done, in);
+ if (mod) {
+ /* decrypt in => out */
+ AES_cbc_decrypt(in, out, iv, &exkey);
+ } else {
+ /* encrypt in => out */
+ AES_cbc_encrypt(in, out, iv, &exkey);
+ }
+ aes_write_block(env, mmu_idx, ra, *dst_ptr_reg + done, out);
+ len -= AES_BLOCK_SIZE;
+ done += AES_BLOCK_SIZE;
+ }
+
+ /* update iv in param block */
+ write_guest_wrap_u8(env, mmu_idx, ra, param_addr, iv, AES_BLOCK_SIZE);
+
+ *src_ptr_reg = deposit64(*src_ptr_reg, 0, addr_reg_size,
+ *src_ptr_reg + done);
+ *dst_ptr_reg = deposit64(*dst_ptr_reg, 0, addr_reg_size,
+ *dst_ptr_reg + done);
+ *src_len_reg -= done;
+
+ return !len ? 0 : 3;
+}
diff --git a/target/s390x/tcg/crypto_helper.c b/target/s390x/tcg/crypto_helper.c
index 82d03fb8a1..8141f833a3 100644
--- a/target/s390x/tcg/crypto_helper.c
+++ b/target/s390x/tcg/crypto_helper.c
@@ -146,6 +146,13 @@ static int cpacf_kmc(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
&env->regs[r1], &env->regs[r2], &env->regs[r2 + 1],
S390_FEAT_TYPE_KMC, fc, mod);
break;
+ case CPACF_KMC_PAES_128:
+ case CPACF_KMC_PAES_192:
+ case CPACF_KMC_PAES_256:
+ rc = cpacf_paes_cbc(env, mmu_idx, ra, env->regs[1],
+ &env->regs[r1], &env->regs[r2], &env->regs[r2 + 1],
+ S390_FEAT_TYPE_KMC, fc, mod);
+ break;
default:
tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
}
--
2.55.0
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PULL 16/33] target/s390x: Support protected key AES CTR for cpacf kmctr instruction
2026-09-21 20:07 [PULL 00/33] s390x queue for 11.2 Eric Farman
` (14 preceding siblings ...)
2026-09-21 20:08 ` [PULL 15/33] target/s390x: Support protected key AES CBC for cpacf kmc instruction Eric Farman
@ 2026-09-21 20:08 ` Eric Farman
2026-09-21 20:08 ` [PULL 17/33] target/s390x: Minimal protected key AES XTS support for cpacf pcc instruction Eric Farman
` (17 subsequent siblings)
33 siblings, 0 replies; 35+ messages in thread
From: Eric Farman @ 2026-09-21 20:08 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-s390x, Matthew Rosato, Cornelia Huck, Harald Freudenberger,
Eric Farman
From: Harald Freudenberger <freude@linux.ibm.com>
Support the subfunctions CPACF_KMCTR_PAES_128, CPACF_KMCTR_PAES_192
and CPACF_KMCTR_PAES_256 for the cpacf kmctr instruction.
Signed-off-by: Harald Freudenberger <freude@linux.ibm.com>
Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260824083204.40877-17-freude@linux.ibm.com
Signed-off-by: Eric Farman <farman@linux.ibm.com>
---
target/s390x/gen-features.c | 3 ++
target/s390x/tcg/cpacf.h | 5 ++
target/s390x/tcg/cpacf_aes.c | 92 ++++++++++++++++++++++++++++++++
target/s390x/tcg/crypto_helper.c | 7 +++
4 files changed, 107 insertions(+)
diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c
index eb7c00a448..01149a04c5 100644
--- a/target/s390x/gen-features.c
+++ b/target/s390x/gen-features.c
@@ -946,6 +946,9 @@ static uint16_t qemu_MAX[] = {
S390_FEAT_KMCTR_AES_128,
S390_FEAT_KMCTR_AES_192,
S390_FEAT_KMCTR_AES_256,
+ S390_FEAT_KMCTR_EAES_128,
+ S390_FEAT_KMCTR_EAES_192,
+ S390_FEAT_KMCTR_EAES_256,
S390_FEAT_PCC_XTS_AES_128,
S390_FEAT_PCC_XTS_AES_256,
S390_FEAT_PCKMO_AES_128,
diff --git a/target/s390x/tcg/cpacf.h b/target/s390x/tcg/cpacf.h
index 73cb564c0b..15fd860e3a 100644
--- a/target/s390x/tcg/cpacf.h
+++ b/target/s390x/tcg/cpacf.h
@@ -48,5 +48,10 @@ int cpacf_paes_cbc(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
uint64_t param_addr, uint64_t *dst_ptr_reg,
uint64_t *src_ptr_reg, uint64_t *src_len_reg,
uint32_t type, uint8_t fc, uint8_t mod);
+int cpacf_paes_ctr(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
+ uint64_t param_addr, uint64_t *dst_ptr_reg,
+ uint64_t *src_ptr_reg, uint64_t *src_len_reg,
+ uint64_t *ctr_ptr_reg, uint32_t type,
+ uint8_t fc, uint8_t mod);
#endif /* S390X_CPACF_H */
diff --git a/target/s390x/tcg/cpacf_aes.c b/target/s390x/tcg/cpacf_aes.c
index e155387fa8..52f8644468 100644
--- a/target/s390x/tcg/cpacf_aes.c
+++ b/target/s390x/tcg/cpacf_aes.c
@@ -723,3 +723,95 @@ int cpacf_paes_cbc(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
return !len ? 0 : 3;
}
+
+int cpacf_paes_ctr(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
+ uint64_t param_addr, uint64_t *dst_ptr_reg,
+ uint64_t *src_ptr_reg, uint64_t *src_len_reg,
+ uint64_t *ctr_ptr_reg, uint32_t type,
+ uint8_t fc, uint8_t mod)
+{
+ enum { MAX_BLOCKS_PER_RUN = 8192 / AES_BLOCK_SIZE };
+ uint8_t in[AES_BLOCK_SIZE], out[AES_BLOCK_SIZE];
+ uint8_t ctr[AES_BLOCK_SIZE], key[32], wkvp[32];
+ uint64_t len = *src_len_reg, done = 0;
+ int i, keysize, addr_reg_size;
+ AES_KEY exkey;
+
+ g_assert(type == S390_FEAT_TYPE_KMCTR);
+
+ switch (fc) {
+ case CPACF_KMCTR_PAES_128:
+ keysize = 16;
+ break;
+ case CPACF_KMCTR_PAES_192:
+ keysize = 24;
+ break;
+ case CPACF_KMCTR_PAES_256:
+ keysize = 32;
+ break;
+ default:
+ g_assert_not_reached();
+ }
+
+ /* check addressing mode, raise exception if not supported here */
+ addr_reg_size = get_address_bitsize(env);
+ switch (addr_reg_size) {
+ case 64:
+ break;
+ case 32:
+ len = (uint32_t)len;
+ break;
+ default:
+ tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
+ }
+
+ /* early bail out if length is zero */
+ if (!len) {
+ return 0;
+ }
+
+ /* length has to be properly aligned. */
+ if (!QEMU_IS_ALIGNED(len, AES_BLOCK_SIZE)) {
+ tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
+ }
+
+ /* fetch and check wkvp from param block */
+ read_guest_wrap_u8(env, mmu_idx, ra,
+ param_addr + keysize, wkvp, sizeof(wkvp));
+ if (memcmp(wkvp, protkey_wkvp, sizeof(wkvp))) {
+ /* wkvp mismatch -> return with cc 1 */
+ return 1;
+ }
+
+ /* fetch protected key from param block */
+ read_guest_wrap_u8(env, mmu_idx, ra, param_addr, key, keysize);
+ /* decrypt the protected key */
+ decrypt_protkey(key, keysize);
+
+ /* expand key */
+ AES_set_encrypt_key(key, keysize * 8, &exkey);
+
+ /* process up to MAX_BLOCKS_PER_RUN aes blocks */
+ for (i = 0; i < MAX_BLOCKS_PER_RUN && len >= AES_BLOCK_SIZE; i++) {
+ /* read in nonce/ctr => ctr */
+ aes_read_block(env, mmu_idx, ra, *ctr_ptr_reg + done, ctr);
+ /* read in one block of input data => in */
+ aes_read_block(env, mmu_idx, ra, *src_ptr_reg + done, in);
+ /* encrypt ctr and xor with in => out */
+ AES_ctr_encrypt(in, out, ctr, &exkey);
+ /* write out the processed block */
+ aes_write_block(env, mmu_idx, ra, *dst_ptr_reg + done, out);
+ len -= AES_BLOCK_SIZE;
+ done += AES_BLOCK_SIZE;
+ }
+
+ *src_ptr_reg = deposit64(*src_ptr_reg, 0, addr_reg_size,
+ *src_ptr_reg + done);
+ *dst_ptr_reg = deposit64(*dst_ptr_reg, 0, addr_reg_size,
+ *dst_ptr_reg + done);
+ *ctr_ptr_reg = deposit64(*ctr_ptr_reg, 0, addr_reg_size,
+ *ctr_ptr_reg + done);
+ *src_len_reg -= done;
+
+ return !len ? 0 : 3;
+}
diff --git a/target/s390x/tcg/crypto_helper.c b/target/s390x/tcg/crypto_helper.c
index 8141f833a3..44fb7611cd 100644
--- a/target/s390x/tcg/crypto_helper.c
+++ b/target/s390x/tcg/crypto_helper.c
@@ -174,6 +174,13 @@ static int cpacf_kmctr(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
&env->regs[r1], &env->regs[r2], &env->regs[r2 + 1],
&env->regs[r3], S390_FEAT_TYPE_KMCTR, fc, mod);
break;
+ case CPACF_KMCTR_PAES_128:
+ case CPACF_KMCTR_PAES_192:
+ case CPACF_KMCTR_PAES_256:
+ rc = cpacf_paes_ctr(env, mmu_idx, ra, env->regs[1],
+ &env->regs[r1], &env->regs[r2], &env->regs[r2 + 1],
+ &env->regs[r3], S390_FEAT_TYPE_KMCTR, fc, mod);
+ break;
default:
tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
}
--
2.55.0
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PULL 17/33] target/s390x: Minimal protected key AES XTS support for cpacf pcc instruction
2026-09-21 20:07 [PULL 00/33] s390x queue for 11.2 Eric Farman
` (15 preceding siblings ...)
2026-09-21 20:08 ` [PULL 16/33] target/s390x: Support protected key AES CTR for cpacf kmctr instruction Eric Farman
@ 2026-09-21 20:08 ` Eric Farman
2026-09-21 20:08 ` [PULL 18/33] target/s390x: Support protected key AES XTS for cpacf km instruction Eric Farman
` (16 subsequent siblings)
33 siblings, 0 replies; 35+ messages in thread
From: Eric Farman @ 2026-09-21 20:08 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-s390x, Matthew Rosato, Cornelia Huck, Harald Freudenberger,
Eric Farman
From: Harald Freudenberger <freude@linux.ibm.com>
Support CPACF pcc subfunctions PCC-Compute-XTS-Parameter-Encrypted-AES-128
and PCC-Compute-XTS-Parameter-Encrypted-AES-128 but only for the special
case block sequential number is 0. However, this covers the s390 PAES XTS
implementation in the Linux kernel.
Signed-off-by: Harald Freudenberger <freude@linux.ibm.com>
Tested-by: Holger Dengler <dengler@linux.ibm.com>
Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260824083204.40877-18-freude@linux.ibm.com
Signed-off-by: Eric Farman <farman@linux.ibm.com>
---
target/s390x/gen-features.c | 2 +
target/s390x/tcg/cpacf.h | 2 +
target/s390x/tcg/cpacf_aes.c | 64 ++++++++++++++++++++++++++++++++
target/s390x/tcg/crypto_helper.c | 4 ++
4 files changed, 72 insertions(+)
diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c
index 01149a04c5..1ed0d4efeb 100644
--- a/target/s390x/gen-features.c
+++ b/target/s390x/gen-features.c
@@ -951,6 +951,8 @@ static uint16_t qemu_MAX[] = {
S390_FEAT_KMCTR_EAES_256,
S390_FEAT_PCC_XTS_AES_128,
S390_FEAT_PCC_XTS_AES_256,
+ S390_FEAT_PCC_XTS_EAES_128,
+ S390_FEAT_PCC_XTS_EAES_256,
S390_FEAT_PCKMO_AES_128,
S390_FEAT_PCKMO_AES_192,
S390_FEAT_PCKMO_AES_256,
diff --git a/target/s390x/tcg/cpacf.h b/target/s390x/tcg/cpacf.h
index 15fd860e3a..f0c2e7fb6c 100644
--- a/target/s390x/tcg/cpacf.h
+++ b/target/s390x/tcg/cpacf.h
@@ -53,5 +53,7 @@ int cpacf_paes_ctr(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
uint64_t *src_ptr_reg, uint64_t *src_len_reg,
uint64_t *ctr_ptr_reg, uint32_t type,
uint8_t fc, uint8_t mod);
+int cpacf_paes_pcc(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
+ uint64_t param_addr, uint8_t fc);
#endif /* S390X_CPACF_H */
diff --git a/target/s390x/tcg/cpacf_aes.c b/target/s390x/tcg/cpacf_aes.c
index 52f8644468..dbbe5bda64 100644
--- a/target/s390x/tcg/cpacf_aes.c
+++ b/target/s390x/tcg/cpacf_aes.c
@@ -815,3 +815,67 @@ int cpacf_paes_ctr(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
return !len ? 0 : 3;
}
+
+int cpacf_paes_pcc(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
+ uint64_t param_addr, uint8_t fc)
+{
+ uint8_t key[32], wkvp[32], tweak[AES_BLOCK_SIZE], buf[AES_BLOCK_SIZE];
+ int keysize, i;
+ AES_KEY exkey;
+
+ switch (fc) {
+ case CPACF_PCC_XTS_PAES_128:
+ keysize = 16;
+ break;
+ case CPACF_PCC_XTS_PAES_256:
+ keysize = 32;
+ break;
+ default:
+ g_assert_not_reached();
+ }
+
+ /* fetch and check wkvp from param block */
+ read_guest_wrap_u8(env, mmu_idx, ra,
+ param_addr + keysize, wkvp, sizeof(wkvp));
+ if (memcmp(wkvp, protkey_wkvp, sizeof(wkvp))) {
+ /* wkvp mismatch -> return with cc 1 */
+ return 1;
+ }
+
+ /* fetch block sequence nr from param block into buf */
+ read_guest_wrap_u8(env, mmu_idx, ra,
+ param_addr + keysize + sizeof(wkvp) + AES_BLOCK_SIZE,
+ buf, AES_BLOCK_SIZE);
+
+ /* is the block sequence nr 0 ? */
+ for (i = 0; i < AES_BLOCK_SIZE && !buf[i]; i++) {
+ ;
+ }
+ if (i < AES_BLOCK_SIZE) {
+ /* no, sorry handling of non zero block sequence is not implemented */
+ tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
+ }
+
+ /* fetch protected key from param block */
+ read_guest_wrap_u8(env, mmu_idx, ra, param_addr, key, keysize);
+ /* decrypt the protected key */
+ decrypt_protkey(key, keysize);
+
+ /* fetch tweak from param block into tweak */
+ read_guest_wrap_u8(env, mmu_idx, ra,
+ param_addr + keysize + sizeof(wkvp),
+ tweak, AES_BLOCK_SIZE);
+
+ /* expand key */
+ AES_set_encrypt_key(key, keysize * 8, &exkey);
+
+ /* encrypt tweak */
+ AES_encrypt(tweak, buf, &exkey);
+
+ /* store encrypted tweak into xts parameter field of the param block */
+ write_guest_wrap_u8(env, mmu_idx, ra,
+ param_addr + keysize + sizeof(wkvp) + 3 * AES_BLOCK_SIZE,
+ buf, AES_BLOCK_SIZE);
+
+ return 0;
+}
diff --git a/target/s390x/tcg/crypto_helper.c b/target/s390x/tcg/crypto_helper.c
index 44fb7611cd..886f9c72d6 100644
--- a/target/s390x/tcg/crypto_helper.c
+++ b/target/s390x/tcg/crypto_helper.c
@@ -219,6 +219,10 @@ static int cpacf_pcc(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
case CPACF_PCC_XTS_AES_256:
rc = cpacf_aes_pcc(env, mmu_idx, ra, env->regs[1], fc);
break;
+ case CPACF_PCC_XTS_PAES_128:
+ case CPACF_PCC_XTS_PAES_256:
+ rc = cpacf_paes_pcc(env, mmu_idx, ra, env->regs[1], fc);
+ break;
default:
tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
}
--
2.55.0
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PULL 18/33] target/s390x: Support protected key AES XTS for cpacf km instruction
2026-09-21 20:07 [PULL 00/33] s390x queue for 11.2 Eric Farman
` (16 preceding siblings ...)
2026-09-21 20:08 ` [PULL 17/33] target/s390x: Minimal protected key AES XTS support for cpacf pcc instruction Eric Farman
@ 2026-09-21 20:08 ` Eric Farman
2026-09-21 20:08 ` [PULL 19/33] docs/s390: Document CPACF instructions support Eric Farman
` (15 subsequent siblings)
33 siblings, 0 replies; 35+ messages in thread
From: Eric Farman @ 2026-09-21 20:08 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-s390x, Matthew Rosato, Cornelia Huck, Harald Freudenberger,
Eric Farman
From: Harald Freudenberger <freude@linux.ibm.com>
Support the subfunctions CPACF_KM_PXTS_128 and CPACF_KM_PXTS_256
for the cpacf km instruction.
Signed-off-by: Harald Freudenberger <freude@linux.ibm.com>
Tested-by: Holger Dengler <dengler@linux.ibm.com>
Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260824083204.40877-19-freude@linux.ibm.com
Signed-off-by: Eric Farman <farman@linux.ibm.com>
---
target/s390x/gen-features.c | 2 +
target/s390x/tcg/cpacf.h | 4 ++
target/s390x/tcg/cpacf_aes.c | 105 +++++++++++++++++++++++++++++++
target/s390x/tcg/crypto_helper.c | 6 ++
4 files changed, 117 insertions(+)
diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c
index 1ed0d4efeb..aa489e0d9c 100644
--- a/target/s390x/gen-features.c
+++ b/target/s390x/gen-features.c
@@ -937,6 +937,8 @@ static uint16_t qemu_MAX[] = {
S390_FEAT_KM_EAES_256,
S390_FEAT_KM_XTS_AES_128,
S390_FEAT_KM_XTS_AES_256,
+ S390_FEAT_KM_XTS_EAES_128,
+ S390_FEAT_KM_XTS_EAES_256,
S390_FEAT_KMC_AES_128,
S390_FEAT_KMC_AES_192,
S390_FEAT_KMC_AES_256,
diff --git a/target/s390x/tcg/cpacf.h b/target/s390x/tcg/cpacf.h
index f0c2e7fb6c..550a6ee183 100644
--- a/target/s390x/tcg/cpacf.h
+++ b/target/s390x/tcg/cpacf.h
@@ -55,5 +55,9 @@ int cpacf_paes_ctr(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
uint8_t fc, uint8_t mod);
int cpacf_paes_pcc(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
uint64_t param_addr, uint8_t fc);
+int cpacf_paes_xts(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
+ uint64_t param_addr, uint64_t *dst_ptr_reg,
+ uint64_t *src_ptr_reg, uint64_t *src_len_reg,
+ uint32_t type, uint8_t fc, uint8_t mod);
#endif /* S390X_CPACF_H */
diff --git a/target/s390x/tcg/cpacf_aes.c b/target/s390x/tcg/cpacf_aes.c
index dbbe5bda64..92884c4120 100644
--- a/target/s390x/tcg/cpacf_aes.c
+++ b/target/s390x/tcg/cpacf_aes.c
@@ -879,3 +879,108 @@ int cpacf_paes_pcc(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
return 0;
}
+
+int cpacf_paes_xts(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
+ uint64_t param_addr, uint64_t *dst_ptr_reg,
+ uint64_t *src_ptr_reg, uint64_t *src_len_reg,
+ uint32_t type, uint8_t fc, uint8_t mod)
+{
+ enum { MAX_BLOCKS_PER_RUN = 8192 / AES_BLOCK_SIZE };
+ uint8_t in[AES_BLOCK_SIZE], out[AES_BLOCK_SIZE];
+ uint8_t key[32], wkvp[32], tweak[AES_BLOCK_SIZE];
+ uint64_t len = *src_len_reg, done = 0;
+ int i, keysize, addr_reg_size;
+ AES_KEY exkey;
+
+ g_assert(type == S390_FEAT_TYPE_KM);
+
+ switch (fc) {
+ case CPACF_KM_PXTS_128:
+ keysize = 16;
+ break;
+ case CPACF_KM_PXTS_256:
+ keysize = 32;
+ break;
+ default:
+ g_assert_not_reached();
+ }
+
+ /* check addressing mode, raise exception if not supported here */
+ addr_reg_size = get_address_bitsize(env);
+ switch (addr_reg_size) {
+ case 64:
+ break;
+ case 32:
+ len = (uint32_t)len;
+ break;
+ default:
+ tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
+ }
+
+ /* early bail out if length is zero */
+ if (!len) {
+ return 0;
+ }
+
+ /* length has to be properly aligned. */
+ if (!QEMU_IS_ALIGNED(len, AES_BLOCK_SIZE)) {
+ tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
+ }
+
+ /* fetch and check wkvp from param block */
+ read_guest_wrap_u8(env, mmu_idx, ra,
+ param_addr + keysize, wkvp, sizeof(wkvp));
+ if (memcmp(wkvp, protkey_wkvp, sizeof(wkvp))) {
+ /* wkvp mismatch -> return with cc 1 */
+ return 1;
+ }
+
+ /* fetch protected key from param block */
+ read_guest_wrap_u8(env, mmu_idx, ra, param_addr, key, keysize);
+ /* decrypt the protected key */
+ decrypt_protkey(key, keysize);
+
+ /* expand key */
+ if (mod) {
+ AES_set_decrypt_key(key, keysize * 8, &exkey);
+ } else {
+ AES_set_encrypt_key(key, keysize * 8, &exkey);
+ }
+
+ /* fetch tweak from param block */
+ read_guest_wrap_u8(env, mmu_idx, ra,
+ param_addr + keysize + sizeof(wkvp),
+ tweak, AES_BLOCK_SIZE);
+
+ /* process up to MAX_BLOCKS_PER_RUN aes blocks */
+ for (i = 0; i < MAX_BLOCKS_PER_RUN && len >= AES_BLOCK_SIZE; i++) {
+ /* fetch one AES block into in */
+ aes_read_block(env, mmu_idx, ra, *src_ptr_reg + done, in);
+ if (mod) {
+ /* decrypt in => out */
+ AES_xts_decrypt(in, out, tweak, &exkey);
+ } else {
+ /* encrypt in => out */
+ AES_xts_encrypt(in, out, tweak, &exkey);
+ }
+ /* prep tweak for next round */
+ AES_xts_prep_next_tweak(tweak);
+ /* write out this processed block from out */
+ aes_write_block(env, mmu_idx, ra, *dst_ptr_reg + done, out);
+ len -= AES_BLOCK_SIZE;
+ done += AES_BLOCK_SIZE;
+ }
+
+ /* update tweak in param block */
+ write_guest_wrap_u8(env, mmu_idx, ra,
+ param_addr + keysize + sizeof(wkvp),
+ tweak, AES_BLOCK_SIZE);
+
+ *src_ptr_reg = deposit64(*src_ptr_reg, 0, addr_reg_size,
+ *src_ptr_reg + done);
+ *dst_ptr_reg = deposit64(*dst_ptr_reg, 0, addr_reg_size,
+ *dst_ptr_reg + done);
+ *src_len_reg -= done;
+
+ return !len ? 0 : 3;
+}
diff --git a/target/s390x/tcg/crypto_helper.c b/target/s390x/tcg/crypto_helper.c
index 886f9c72d6..1014f1d954 100644
--- a/target/s390x/tcg/crypto_helper.c
+++ b/target/s390x/tcg/crypto_helper.c
@@ -125,6 +125,12 @@ static int cpacf_km(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
&env->regs[r1], &env->regs[r2], &env->regs[r2 + 1],
S390_FEAT_TYPE_KM, fc, mod);
break;
+ case CPACF_KM_PXTS_128:
+ case CPACF_KM_PXTS_256:
+ rc = cpacf_paes_xts(env, mmu_idx, ra, env->regs[1],
+ &env->regs[r1], &env->regs[r2], &env->regs[r2 + 1],
+ S390_FEAT_TYPE_KM, fc, mod);
+ break;
default:
tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
}
--
2.55.0
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PULL 19/33] docs/s390: Document CPACF instructions support
2026-09-21 20:07 [PULL 00/33] s390x queue for 11.2 Eric Farman
` (17 preceding siblings ...)
2026-09-21 20:08 ` [PULL 18/33] target/s390x: Support protected key AES XTS for cpacf km instruction Eric Farman
@ 2026-09-21 20:08 ` Eric Farman
2026-09-21 20:08 ` [PULL 20/33] tests/tcg/s390x: Add tests for CPACF instructions Eric Farman
` (14 subsequent siblings)
33 siblings, 0 replies; 35+ messages in thread
From: Eric Farman @ 2026-09-21 20:08 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-s390x, Matthew Rosato, Cornelia Huck, Harald Freudenberger,
Eric Farman
From: Harald Freudenberger <freude@linux.ibm.com>
Add a first document covering the Qemu s390 CPACF instructions
and functions supported.
Signed-off-by: Harald Freudenberger <freude@linux.ibm.com>
Reviewed-by: Finn Callies <fcallies@linux.ibm.com>
Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260824083204.40877-20-freude@linux.ibm.com
[farman@linux.ibm.com: Resolve merge conflict in target-s390x.rst]
Signed-off-by: Eric Farman <farman@linux.ibm.com>
---
docs/system/s390x/cpacf.rst | 143 +++++++++++++++++++++++++++++++++++
docs/system/target-s390x.rst | 1 +
2 files changed, 144 insertions(+)
create mode 100644 docs/system/s390x/cpacf.rst
diff --git a/docs/system/s390x/cpacf.rst b/docs/system/s390x/cpacf.rst
new file mode 100644
index 0000000000..c68aa74abe
--- /dev/null
+++ b/docs/system/s390x/cpacf.rst
@@ -0,0 +1,143 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later
+
+CPACF Support
+=============
+
+CPACF
+-----
+
+CP Assist for Cryptographic Function (CPACF) is a hardware-integrated
+coprocessor feature built into every processor core of IBM Z and
+LinuxONE mainframes (s390x architecture). It provides high-speed,
+hardware-accelerated encryption and hashing directly on the CPU.
+
+CPACF provides a set of z/Architecture instructions (known as Message
+Security Assist or MSA) that execute cryptographic operations
+synchronously with the main processor.
+
+- Symmetric Encryption: Support for AES (128, 192, 256-bit), DES, and
+ Triple-DES (TDES).
+- Hashing: Acceleration for SHA-1, SHA-2 (up to SHA-512), SHA-3 and
+ SHAKE.
+- Random Number Generation: Pseudo Random Number Generator (PRNG) and
+ a hardware-based True Random Number Generator (TRNG).
+- Asymmetric Support: Elliptic Curve Cryptography (ECC) primitives
+ P-256, P-384, P-521, Montgomery/Edwards curves (e.g., Ed25519).
+
+Documentation about CPACF instructions is publicly available and
+can be found in the "z/Architecture Principles of Operation"
+accessible at the IBM documentation hub https://www.ibm.com/docs/en.
+For example the latest version as a pdf is available here:
+https://www.ibm.com/support/pages/zvm/library/other/22783214.pdf
+
+
+CPACF instructions
+------------------
+
+Here is a list of implemented CPACF instructions and the supported
+functions for each instruction:
+
+KDSA (COMPUTE DIGITAL SIGNATURE AUTHENTICATION)
+- Function code 0x00 - Function Query
+
+KIMD (COMPUTE INTERMEDIATE MESSAGE DIGEST)
+- Function code 0x00 - Function Query
+- Function code 0x02 - CPACF_KIMD_SHA_256
+- Function code 0x03 - CPACF_KIMD_SHA_512
+
+KLMD (COMPUTE LAST MESSAGE DIGEST)
+- Function code 0x00 - Function Query
+- Function code 0x02 - CPACF_KLMD_SHA_256
+- Function code 0x03 - CPACF_KLMD_SHA_512
+
+KM (CIPHER MESSAGE)
+- Function code 0x00 - Function Query
+- Function code 0x12 - CPACF_KM_AES_128
+- Function code 0x13 - CPACF_KM_AES_192
+- Function code 0x14 - CPACF_KM_AES_256
+- Function code 0x1a - CPACF_KM_PAES_128
+- Function code 0x1b - CPACF_KM_PAES_192
+- Function code 0x1c - CPACF_KM_PAES_256
+- Function code 0x32 - CPACF_KM_XTS_128
+- Function code 0x34 - CPACF_KM_XTS_256
+- Function code 0x3a - CPACF_KM_PXTS_128
+- Function code 0x3c - CPACF_KM_PXTS_256
+
+KMAC (COMPUTE MESSAGE AUTHENTICATION CODE)
+- Function code 0x00 - Function Query
+
+KMC (CIPHER MESSAGE WITH CHAINING)
+- Function code 0x00 - Function Query
+- Function code 0x12 - CPACF_KMC_AES_128
+- Function code 0x13 - CPACF_KMC_AES_192
+- Function code 0x14 - CPACF_KMC_AES_256
+- Function code 0x1a - CPACF_KMC_PAES_128
+- Function code 0x1b - CPACF_KMC_PAES_192
+- Function code 0x1c - CPACF_KMC_PAES_256
+
+KMCTR (CIPHER MESSAGE WITH COUNTER)
+- Function code 0x00 - Function Query
+- Function code 0x12 - CPACF_KMCTR_AES_128
+- Function code 0x13 - CPACF_KMCTR_AES_192
+- Function code 0x14 - CPACF_KMCTR_AES_256
+- Function code 0x1a - CPACF_KMCTR_PAES_128
+- Function code 0x1b - CPACF_KMCTR_PAES_192
+- Function code 0x1c - CPACF_KMCTR_PAES_256
+
+KMF (CIPHER MESSAGE WITH CIPHER FEEDBACK)
+- not supported
+
+KMO (CIPHER MESSAGE WITH OUTPUT FEEDBACK)
+- not supported
+
+PCC (PERFORM CRYPTOGRAPHIC COMPUTATION)
+- Function code 0x00 - Function Query
+- Function code 0x32 - compute XTS param AES-128
+- Function code 0x34 - compute XTS param AES-256
+- Function code 0x3a - compute XTS param Encrypted AES-128
+- Function code 0x3c - compute XTS param Encrypted AES-256
+
+PCKMO (PERFORM CRYPTOGRAPHIC KEY MANAGEMENT OPERATION)
+- Function code 0x00 - Function Query
+- Function code 0x12 - CPACF_PCKMO_ENC_AES_128_KEY
+- Function code 0x13 - CPACF_PCKMO_ENC_AES_192_KEY
+- Function code 0x14 - CPACF_PCKMO_ENC_AES_256_KEY
+
+PRNO (PERFORM RANDOM NUMBER OPERATION)
+- Function code 0x00 - Function Query
+- Function code 0x72 - CPACF_PRNO_TRNG
+
+Not listed CPACF instructions (KMA) cause an Operation Exception when
+used. Instructions with only query function support (KMF, KMO, KDSA)
+perform register validation and raise a Specification Exception for
+invalid registers or non-query function codes. The query function for
+these instructions will return a function status word with all but the
+query function bit set to 0.
+
+
+Protected key support
+---------------------
+
+The qemu version for protected key support is only a fake provided
+here for developing and testing purpose:
+
+- The protected key is _derived_ from the clear key by xoring the
+ fixed pattern 0xAAAA... onto the key value.
+- The AES Wrapping Key Verification Pattern is a fixed value of 32
+ bytes 0x0F0A0C0E0F0A0C0E...
+
+The PCKMO instruction implementation does exactly this - _derive_ a
+_protected_ key from the clear key given by xor 0xAAAA... and writing
+the fixed value for the WKVP of 0x0F0A0C0E0F0A0C0E... into the blob.
+The other subfunctions of the CPACF instructions dealing with
+protected key treat the protected key blob by first checking for the
+WKVP (against the fixed value of 0x0F0A0C0E0F0A0C0E...) and second
+_decrypting_ the key value by xoring 0xAAAA... and then execute the
+clear key operation with the decrypted key value.
+This is suitable for testing purpose but such keys are not for real
+production load and would open up a huge security breach!
+
+For more details about protected keys see the "z/Architecture
+Principles of Operation" document chapter "General Instructions"
+sub-chapter "Protection of Cryptographic Keys" and again the
+implementation here does NOT implement what is explained there.
diff --git a/docs/system/target-s390x.rst b/docs/system/target-s390x.rst
index 8938a13d10..1454dae48d 100644
--- a/docs/system/target-s390x.rst
+++ b/docs/system/target-s390x.rst
@@ -36,3 +36,4 @@ Architectural features
s390x/protvirt
s390x/cpu-topology
s390x/secure-ipl
+ s390x/cpacf
--
2.55.0
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PULL 20/33] tests/tcg/s390x: Add tests for CPACF instructions
2026-09-21 20:07 [PULL 00/33] s390x queue for 11.2 Eric Farman
` (18 preceding siblings ...)
2026-09-21 20:08 ` [PULL 19/33] docs/s390: Document CPACF instructions support Eric Farman
@ 2026-09-21 20:08 ` Eric Farman
2026-09-21 20:08 ` [PULL 21/33] hw/s390x/ipl: Add secure boot support to PCI dev IPLB builder Eric Farman
` (13 subsequent siblings)
33 siblings, 0 replies; 35+ messages in thread
From: Eric Farman @ 2026-09-21 20:08 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-s390x, Matthew Rosato, Cornelia Huck, Harald Freudenberger,
Eric Farman
From: Harald Freudenberger <freude@linux.ibm.com>
Add simple tests for the CPACF instructions implemented:
- kdsa - minimal as only query is implemented
- kimd - query, sha256, sha512
- klmd - query, sha256, sha512
- km - query, aes 128, 192, 256 with clear and prot key
- kmac - minimal as only query is implemented
- kmc - query, aes 128, 192, 256 with clear and prot key
- kmctr - query, aes 128, 192, 256 with clear and prot key
- pcc - query, xts aes 128, 256 and prot key xts aes 128, 256
- pckmo - run query and check for SIGILL
- prno - query, trng
No test for kma, kmf, kmo as these instructions are currently
not implemented at all.
Signed-off-by: Harald Freudenberger <freude@linux.ibm.com>
Acked-by: Ilya Leoshkevich <iii@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260824083204.40877-21-freude@linux.ibm.com
[farman@linux.ibm.com: Convert Makefile hunk to meson]
Signed-off-by: Eric Farman <farman@linux.ibm.com>
---
tests/tcg/s390x/cpacf-kdsa.c | 58 ++++
tests/tcg/s390x/cpacf-kimd.c | 166 ++++++++++
tests/tcg/s390x/cpacf-klmd.c | 206 ++++++++++++
tests/tcg/s390x/cpacf-km.c | 590 ++++++++++++++++++++++++++++++++++
tests/tcg/s390x/cpacf-kmac.c | 58 ++++
tests/tcg/s390x/cpacf-kmc.c | 351 ++++++++++++++++++++
tests/tcg/s390x/cpacf-kmctr.c | 360 +++++++++++++++++++++
tests/tcg/s390x/cpacf-pcc.c | 245 ++++++++++++++
tests/tcg/s390x/cpacf-pckmo.c | 45 +++
tests/tcg/s390x/cpacf-prno.c | 131 ++++++++
tests/tcg/s390x/cpacf.h | 570 ++++++++++++++++++++++++++++++++
tests/tcg/s390x/meson.build | 10 +
12 files changed, 2790 insertions(+)
create mode 100644 tests/tcg/s390x/cpacf-kdsa.c
create mode 100644 tests/tcg/s390x/cpacf-kimd.c
create mode 100644 tests/tcg/s390x/cpacf-klmd.c
create mode 100644 tests/tcg/s390x/cpacf-km.c
create mode 100644 tests/tcg/s390x/cpacf-kmac.c
create mode 100644 tests/tcg/s390x/cpacf-kmc.c
create mode 100644 tests/tcg/s390x/cpacf-kmctr.c
create mode 100644 tests/tcg/s390x/cpacf-pcc.c
create mode 100644 tests/tcg/s390x/cpacf-pckmo.c
create mode 100644 tests/tcg/s390x/cpacf-prno.c
create mode 100644 tests/tcg/s390x/cpacf.h
diff --git a/tests/tcg/s390x/cpacf-kdsa.c b/tests/tcg/s390x/cpacf-kdsa.c
new file mode 100644
index 0000000000..cc06e60f11
--- /dev/null
+++ b/tests/tcg/s390x/cpacf-kdsa.c
@@ -0,0 +1,58 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * Simple test for the CPACF KDSA instruction
+ */
+
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include "cpacf.h"
+
+#define QUERY_BLOCK_SIZE 16
+
+/* expected kdsa query block */
+static uint8_t exp_query_block[QUERY_BLOCK_SIZE] = {
+ 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
+static int test_kdsa_query(void)
+{
+ uint8_t query_block[QUERY_BLOCK_SIZE] = {0};
+ unsigned long cc = 0;
+ int i, rc = 0;
+
+ cpacf_kdsa(CPACF_KDSA_QUERY, query_block, NULL, 0, &cc);
+
+ /* compare with expected query block */
+ for (i = 0; i < QUERY_BLOCK_SIZE; i++) {
+ if ((query_block[i] & exp_query_block[i]) != exp_query_block[i]) {
+ rc++;
+ break;
+ }
+ }
+
+ if (rc) {
+ printf("%s failed\n", __func__);
+ }
+
+ return rc;
+}
+
+int main(void)
+{
+ int rc;
+
+ /* Test query function */
+ rc = test_kdsa_query();
+
+ /* As of now only KDSA query is implemented */
+
+ if (rc) {
+ printf("cpacf-kdsa: %d failures\n", rc);
+ }
+
+ return rc ? EXIT_FAILURE : EXIT_SUCCESS;
+}
diff --git a/tests/tcg/s390x/cpacf-kimd.c b/tests/tcg/s390x/cpacf-kimd.c
new file mode 100644
index 0000000000..61c5268ccb
--- /dev/null
+++ b/tests/tcg/s390x/cpacf-kimd.c
@@ -0,0 +1,166 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * Simple test for CPACF KIMD instruction
+ */
+
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include "cpacf.h"
+
+#define QUERY_BLOCK_SIZE 16
+
+/* expected kimd query block */
+static uint8_t exp_query_block[QUERY_BLOCK_SIZE] = {
+ 0xB0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
+/* SHA-256 test data */
+static const uint8_t sha256in[] = {
+ 0x5a, 0x86, 0xb7, 0x37, 0xea, 0xea, 0x8e, 0xe9,
+ 0x76, 0xa0, 0xa2, 0x4d, 0xa6, 0x3e, 0x7e, 0xd7,
+ 0xee, 0xfa, 0xd1, 0x8a, 0x10, 0x1c, 0x12, 0x11,
+ 0xe2, 0xb3, 0x65, 0x0c, 0x51, 0x87, 0xc2, 0xa8,
+ 0xa6, 0x50, 0x54, 0x72, 0x08, 0x25, 0x1f, 0x6d,
+ 0x42, 0x37, 0xe6, 0x61, 0xc7, 0xbf, 0x4c, 0x77,
+ 0xf3, 0x35, 0x39, 0x03, 0x94, 0xc3, 0x7f, 0xa1,
+ 0xa9, 0xf9, 0xbe, 0x83, 0x6a, 0xc2, 0x85, 0x09
+};
+
+/* SHA-512 test data */
+static const uint8_t sha512in[] = {
+ 0xfd, 0x22, 0x03, 0xe4, 0x67, 0x57, 0x4e, 0x83,
+ 0x4a, 0xb0, 0x7c, 0x90, 0x97, 0xae, 0x16, 0x45,
+ 0x32, 0xf2, 0x4b, 0xe1, 0xeb, 0x5d, 0x88, 0xf1,
+ 0xaf, 0x77, 0x48, 0xce, 0xff, 0x0d, 0x2c, 0x67,
+ 0xa2, 0x1f, 0x4e, 0x40, 0x97, 0xf9, 0xd3, 0xbb,
+ 0x4e, 0x9f, 0xbf, 0x97, 0x18, 0x6e, 0x0d, 0xb6,
+ 0xdb, 0x01, 0x00, 0x23, 0x0a, 0x52, 0xb4, 0x53,
+ 0xd4, 0x21, 0xf8, 0xab, 0x9c, 0x9a, 0x60, 0x43,
+ 0xaa, 0x32, 0x95, 0xea, 0x20, 0xd2, 0xf0, 0x6a,
+ 0x2f, 0x37, 0x47, 0x0d, 0x8a, 0x99, 0x07, 0x5f,
+ 0x1b, 0x8a, 0x83, 0x36, 0xf6, 0x22, 0x8c, 0xf0,
+ 0x8b, 0x59, 0x42, 0xfc, 0x1f, 0xb4, 0x29, 0x9c,
+ 0x7d, 0x24, 0x80, 0xe8, 0xe8, 0x2b, 0xce, 0x17,
+ 0x55, 0x40, 0xbd, 0xfa, 0xd7, 0x75, 0x2b, 0xc9,
+ 0x5b, 0x57, 0x7f, 0x22, 0x95, 0x15, 0x39, 0x4f,
+ 0x3a, 0xe5, 0xce, 0xc8, 0x70, 0xa4, 0xb2, 0xf8
+};
+
+/*
+ * Query test for kimd
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_kimd_query(void)
+{
+ uint8_t query_block[QUERY_BLOCK_SIZE] = {0};
+ unsigned long cc = 0;
+ int i, rc = 0;
+
+ cpacf_kimd(CPACF_KIMD_QUERY, query_block, NULL, 0, &cc);
+
+ /* compare with expected query block */
+ for (i = 0; i < QUERY_BLOCK_SIZE; i++) {
+ if ((query_block[i] & exp_query_block[i]) != exp_query_block[i]) {
+ rc++;
+ break;
+ }
+ }
+
+ if (rc) {
+ printf("%s failed\n", __func__);
+ }
+
+ return rc;
+}
+
+/*
+ * Subfunction CPACF_KIMD_SHA_256 test for kimd
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_kimd_sha256(void)
+{
+ uint32_t param[8];
+ unsigned long cc = 0;
+ int rc = 0;
+
+ /* Initialize SHA-256 hash values */
+ param[0] = 0x6a09e667u;
+ param[1] = 0xbb67ae85u;
+ param[2] = 0x3c6ef372u;
+ param[3] = 0xa54ff53au;
+ param[4] = 0x510e527fu;
+ param[5] = 0x9b05688cu;
+ param[6] = 0x1f83d9abu;
+ param[7] = 0x5be0cd19u;
+
+ /* Process input data */
+ cpacf_kimd(CPACF_KIMD_SHA_256, param, sha256in, sizeof(sha256in), &cc);
+
+ /* No check of the result in param block as this is an intermediate value */
+
+ /* Check for correct condition code (should be 0 on success) */
+ if (cc != 0) {
+ printf("%s failed: unexpected cc=%lu\n", __func__, cc);
+ rc = 1;
+ }
+
+ return rc;
+}
+
+/*
+ * Subfunction CPACF_KIMD_SHA_512 test for kimd
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_kimd_sha512(void)
+{
+ uint64_t param[8];
+ unsigned long cc = 0;
+ int rc = 0;
+
+ /* Initialize SHA-512 hash values */
+ param[0] = 0x6a09e667f3bcc908lu;
+ param[1] = 0xbb67ae8584caa73blu;
+ param[2] = 0x3c6ef372fe94f82blu;
+ param[3] = 0xa54ff53a5f1d36f1lu;
+ param[4] = 0x510e527fade682d1lu;
+ param[5] = 0x9b05688c2b3e6c1flu;
+ param[6] = 0x1f83d9abfb41bd6blu;
+ param[7] = 0x5be0cd19137e2179lu;
+
+ /* Process input data */
+ cpacf_kimd(CPACF_KIMD_SHA_512, param, sha512in, sizeof(sha512in), &cc);
+
+ /* No check of the result in param block as this is an intermediate value */
+
+ /* Check for correct condition code (should be 0 on success) */
+ if (cc != 0) {
+ printf("%s failed: unexpected cc=%lu\n", __func__, cc);
+ rc = 1;
+ }
+
+ return rc;
+}
+
+int main(void)
+{
+ int rc = 0;
+
+ /* Test query function */
+ rc += test_kimd_query();
+
+ /* Test SHA-256 */
+ rc += test_kimd_sha256();
+
+ /* Test SHA-512 */
+ rc += test_kimd_sha512();
+
+ if (rc) {
+ printf("cpacf-kimd: %d failures\n", rc);
+ }
+
+ return rc ? EXIT_FAILURE : EXIT_SUCCESS;
+}
diff --git a/tests/tcg/s390x/cpacf-klmd.c b/tests/tcg/s390x/cpacf-klmd.c
new file mode 100644
index 0000000000..1761bb64f9
--- /dev/null
+++ b/tests/tcg/s390x/cpacf-klmd.c
@@ -0,0 +1,206 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * Simple test for CPACF KLMD instruction
+ */
+
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include "cpacf.h"
+
+#define QUERY_BLOCK_SIZE 16
+
+/* expected klmd query block */
+static uint8_t exp_query_block[QUERY_BLOCK_SIZE] = {
+ 0xB0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
+/* SHA-256 test data */
+static const uint8_t sha256in[] = {
+ 0x5a, 0x86, 0xb7, 0x37, 0xea, 0xea, 0x8e, 0xe9,
+ 0x76, 0xa0, 0xa2, 0x4d, 0xa6, 0x3e, 0x7e, 0xd7,
+ 0xee, 0xfa, 0xd1, 0x8a, 0x10, 0x1c, 0x12, 0x11,
+ 0xe2, 0xb3, 0x65, 0x0c, 0x51, 0x87, 0xc2, 0xa8,
+ 0xa6, 0x50, 0x54, 0x72, 0x08, 0x25, 0x1f, 0x6d,
+ 0x42, 0x37, 0xe6, 0x61, 0xc7, 0xbf, 0x4c, 0x77,
+ 0xf3, 0x35, 0x39, 0x03, 0x94, 0xc3, 0x7f, 0xa1,
+ 0xa9, 0xf9, 0xbe, 0x83, 0x6a, 0xc2, 0x85, 0x09
+};
+
+static const uint8_t sha256md[] = {
+ 0x42, 0xe6, 0x1e, 0x17, 0x4f, 0xbb, 0x38, 0x97,
+ 0xd6, 0xdd, 0x6c, 0xef, 0x3d, 0xd2, 0x80, 0x2f,
+ 0xe6, 0x7b, 0x33, 0x19, 0x53, 0xb0, 0x61, 0x14,
+ 0xa6, 0x5c, 0x77, 0x28, 0x59, 0xdf, 0xc1, 0xaa
+};
+
+/* SHA-512 test data */
+static const uint8_t sha512in[] = {
+ 0xfd, 0x22, 0x03, 0xe4, 0x67, 0x57, 0x4e, 0x83,
+ 0x4a, 0xb0, 0x7c, 0x90, 0x97, 0xae, 0x16, 0x45,
+ 0x32, 0xf2, 0x4b, 0xe1, 0xeb, 0x5d, 0x88, 0xf1,
+ 0xaf, 0x77, 0x48, 0xce, 0xff, 0x0d, 0x2c, 0x67,
+ 0xa2, 0x1f, 0x4e, 0x40, 0x97, 0xf9, 0xd3, 0xbb,
+ 0x4e, 0x9f, 0xbf, 0x97, 0x18, 0x6e, 0x0d, 0xb6,
+ 0xdb, 0x01, 0x00, 0x23, 0x0a, 0x52, 0xb4, 0x53,
+ 0xd4, 0x21, 0xf8, 0xab, 0x9c, 0x9a, 0x60, 0x43,
+ 0xaa, 0x32, 0x95, 0xea, 0x20, 0xd2, 0xf0, 0x6a,
+ 0x2f, 0x37, 0x47, 0x0d, 0x8a, 0x99, 0x07, 0x5f,
+ 0x1b, 0x8a, 0x83, 0x36, 0xf6, 0x22, 0x8c, 0xf0,
+ 0x8b, 0x59, 0x42, 0xfc, 0x1f, 0xb4, 0x29, 0x9c,
+ 0x7d, 0x24, 0x80, 0xe8, 0xe8, 0x2b, 0xce, 0x17,
+ 0x55, 0x40, 0xbd, 0xfa, 0xd7, 0x75, 0x2b, 0xc9,
+ 0x5b, 0x57, 0x7f, 0x22, 0x95, 0x15, 0x39, 0x4f,
+ 0x3a, 0xe5, 0xce, 0xc8, 0x70, 0xa4, 0xb2, 0xf8
+};
+
+static const uint8_t sha512md[] = {
+ 0xa2, 0x1b, 0x10, 0x77, 0xd5, 0x2b, 0x27, 0xac,
+ 0x54, 0x5a, 0xf6, 0x3b, 0x32, 0x74, 0x6c, 0x6e,
+ 0x3c, 0x51, 0xcb, 0x0c, 0xb9, 0xf2, 0x81, 0xeb,
+ 0x9f, 0x35, 0x80, 0xa6, 0xd4, 0x99, 0x6d, 0x5c,
+ 0x99, 0x17, 0xd2, 0xa6, 0xe4, 0x84, 0x62, 0x7a,
+ 0x9d, 0x5a, 0x06, 0xfa, 0x1b, 0x25, 0x32, 0x7a,
+ 0x9d, 0x71, 0x0e, 0x02, 0x73, 0x87, 0xfc, 0x3e,
+ 0x07, 0xd7, 0xc4, 0xd1, 0x4c, 0x60, 0x86, 0xcc
+};
+
+/*
+ * Query test for klmd
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_klmd_query(void)
+{
+ uint8_t query_block[QUERY_BLOCK_SIZE] = {0};
+ unsigned long cc = 0;
+ int i, rc = 0;
+
+ cpacf_klmd(CPACF_KLMD_QUERY, query_block, NULL, 0, NULL, 0, &cc);
+
+ /* compare with expected query block */
+ for (i = 0; i < QUERY_BLOCK_SIZE; i++) {
+ if ((query_block[i] & exp_query_block[i]) != exp_query_block[i]) {
+ rc++;
+ break;
+ }
+ }
+
+ if (rc) {
+ printf("%s failed\n", __func__);
+ }
+
+ return rc;
+}
+
+/*
+ * Subfunction CPACF_KLMD_SHA_256 test for klmd
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_klmd_sha256(void)
+{
+ uint8_t param[40]; /* 32 bytes hash + 8 bytes message bit length */
+ uint32_t *hash = (uint32_t *)param;
+ uint64_t *mbl = (uint64_t *)(param + 32);
+ unsigned long cc = 0;
+ int rc = 0;
+
+ /* Initialize SHA-256 hash values (H0-H7) */
+ hash[0] = 0x6a09e667u;
+ hash[1] = 0xbb67ae85u;
+ hash[2] = 0x3c6ef372u;
+ hash[3] = 0xa54ff53au;
+ hash[4] = 0x510e527fu;
+ hash[5] = 0x9b05688cu;
+ hash[6] = 0x1f83d9abu;
+ hash[7] = 0x5be0cd19u;
+
+ /* Set message bit length for KLMD */
+ *mbl = sizeof(sha256in) * 8;
+
+ /* Process input data with KLMD (finalize hash) */
+ cpacf_klmd(CPACF_KLMD_SHA_256, param, sha256in,
+ sizeof(sha256in), NULL, 0, &cc);
+
+ /* Check for correct condition code (should be 0 on success) */
+ if (cc != 0) {
+ printf("%s failed: unexpected cc=%lu\n", __func__, cc);
+ rc = 1;
+ }
+
+ /* Compare hash result in param with expected message digest */
+ if (memcmp(param, sha256md, sizeof(sha256md))) {
+ printf("%s failed: hash mismatch\n", __func__);
+ rc = 1;
+ }
+
+ return rc;
+}
+
+/*
+ * Subfunction CPACF_KLMD_SHA_512 test for klmd
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_klmd_sha512(void)
+{
+ uint8_t param[80]; /* 64 bytes hash + 16 bytes message bit length */
+ uint64_t *hash = (uint64_t *)param;
+ uint64_t *mbl_high = (uint64_t *)(param + 64);
+ uint64_t *mbl_low = (uint64_t *)(param + 72);
+ unsigned long cc = 0;
+ int rc = 0;
+
+ /* Initialize SHA-512 hash values (H0-H7) */
+ hash[0] = 0x6a09e667f3bcc908lu;
+ hash[1] = 0xbb67ae8584caa73blu;
+ hash[2] = 0x3c6ef372fe94f82blu;
+ hash[3] = 0xa54ff53a5f1d36f1lu;
+ hash[4] = 0x510e527fade682d1lu;
+ hash[5] = 0x9b05688c2b3e6c1flu;
+ hash[6] = 0x1f83d9abfb41bd6blu;
+ hash[7] = 0x5be0cd19137e2179lu;
+
+ /* Set message bit length for KLMD (128-bit, high and low) */
+ *mbl_high = 0;
+ *mbl_low = sizeof(sha512in) * 8;
+
+ /* Process input data with KLMD (finalize hash) */
+ cpacf_klmd(CPACF_KLMD_SHA_512, param, sha512in,
+ sizeof(sha512in), NULL, 0, &cc);
+
+ /* Check for correct condition code (should be 0 on success) */
+ if (cc != 0) {
+ printf("%s failed: unexpected cc=%lu\n", __func__, cc);
+ rc = 1;
+ }
+
+ /* Compare hash result in param with expected message digest */
+ if (memcmp(param, sha512md, sizeof(sha512md))) {
+ printf("%s failed: hash mismatch\n", __func__);
+ rc = 1;
+ }
+
+ return rc;
+}
+
+int main(void)
+{
+ int rc = 0;
+
+ /* Test query function */
+ rc += test_klmd_query();
+
+ /* Test SHA-256 */
+ rc += test_klmd_sha256();
+
+ /* Test SHA-512 */
+ rc += test_klmd_sha512();
+
+ if (rc) {
+ printf("cpacf-klmd: %d failures\n", rc);
+ }
+
+ return rc ? EXIT_FAILURE : EXIT_SUCCESS;
+}
diff --git a/tests/tcg/s390x/cpacf-km.c b/tests/tcg/s390x/cpacf-km.c
new file mode 100644
index 0000000000..35a5ecbfef
--- /dev/null
+++ b/tests/tcg/s390x/cpacf-km.c
@@ -0,0 +1,590 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * Simple test for CPACF KM instruction
+ */
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <string.h>
+#include "cpacf.h"
+
+#define QUERY_BLOCK_SIZE 16
+
+/* expected km query block */
+static uint8_t exp_query_block[QUERY_BLOCK_SIZE] = {
+ 0x80, 0x00, 0x38, 0x38, 0x00, 0x00, 0x28, 0x28,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
+/* KM AES-128 test data */
+static const uint8_t kmaes128key[] = {
+ 0xed, 0xfd, 0xb2, 0x57, 0xcb, 0x37, 0xcd, 0xf1,
+ 0x82, 0xc5, 0x45, 0x5b, 0x0c, 0x0e, 0xfe, 0xbb
+};
+static const uint8_t kmaes128plain[] = {
+ 0x16, 0x95, 0xfe, 0x47, 0x54, 0x21, 0xca, 0xce,
+ 0x35, 0x57, 0xda, 0xca, 0x01, 0xf4, 0x45, 0xff
+};
+static const uint8_t kmaes128cipher[] = {
+ 0x78, 0x88, 0xbe, 0xae, 0x6e, 0x7a, 0x42, 0x63,
+ 0x32, 0xa7, 0xea, 0xa2, 0xf8, 0x08, 0xe6, 0x37
+};
+
+/* KM AES-192 test data */
+static const uint8_t kmaes192key[] = {
+ 0x61, 0x39, 0x6c, 0x53, 0x0c, 0xc1, 0x74, 0x9a,
+ 0x5b, 0xab, 0x6f, 0xbc, 0xf9, 0x06, 0xfe, 0x67,
+ 0x2d, 0x0c, 0x4a, 0xb2, 0x01, 0xaf, 0x45, 0x54
+};
+static const uint8_t kmaes192plain[] = {
+ 0x60, 0xbc, 0xdb, 0x94, 0x16, 0xba, 0xc0, 0x8d,
+ 0x7f, 0xd0, 0xd7, 0x80, 0x35, 0x37, 0x40, 0xa5
+};
+static const uint8_t kmaes192cipher[] = {
+ 0x24, 0xf4, 0x0c, 0x4e, 0xec, 0xd9, 0xc4, 0x98,
+ 0x25, 0x00, 0x0f, 0xcb, 0x49, 0x72, 0x64, 0x7a
+};
+
+/* KM AES-256 test data */
+static const uint8_t kmaes256key[] = {
+ 0xcc, 0x22, 0xda, 0x78, 0x7f, 0x37, 0x57, 0x11,
+ 0xc7, 0x63, 0x02, 0xbe, 0xf0, 0x97, 0x9d, 0x8e,
+ 0xdd, 0xf8, 0x42, 0x82, 0x9c, 0x2b, 0x99, 0xef,
+ 0x3d, 0xd0, 0x4e, 0x23, 0xe5, 0x4c, 0xc2, 0x4b
+};
+static const uint8_t kmaes256plain[] = {
+ 0xcc, 0xc6, 0x2c, 0x6b, 0x0a, 0x09, 0xa6, 0x71,
+ 0xd6, 0x44, 0x56, 0x81, 0x8d, 0xb2, 0x9a, 0x4d
+};
+static const uint8_t kmaes256cipher[] = {
+ 0xdf, 0x86, 0x34, 0xca, 0x02, 0xb1, 0x3a, 0x12,
+ 0x5b, 0x78, 0x6e, 0x1d, 0xce, 0x90, 0x65, 0x8b
+};
+
+/* KM AES XTS-128 test data */
+static const uint8_t kmaesxts128key1[] = {
+ 0xa1, 0xb9, 0x0c, 0xba, 0x3f, 0x06, 0xac, 0x35,
+ 0x3b, 0x2c, 0x34, 0x38, 0x76, 0x08, 0x17, 0x62
+};
+static const uint8_t kmaesxts128key2[] = {
+ 0x09, 0x09, 0x23, 0x02, 0x6e, 0x91, 0x77, 0x18,
+ 0x15, 0xf2, 0x9d, 0xab, 0x01, 0x93, 0x2f, 0x2f
+};
+static const uint8_t kmaesxts128sect[] = {
+ 0x4f, 0xae, 0xf7, 0x11, 0x7c, 0xda, 0x59, 0xc6,
+ 0x6e, 0x4b, 0x92, 0x01, 0x3e, 0x76, 0x8a, 0xd5
+};
+static const uint8_t kmaesxts128plain[] = {
+ 0xeb, 0xab, 0xce, 0x95, 0xb1, 0x4d, 0x3c, 0x8d,
+ 0x6f, 0xb3, 0x50, 0x39, 0x07, 0x90, 0x31, 0x1c
+};
+static const uint8_t kmaesxts128cipher[] = {
+ 0x77, 0x8a, 0xe8, 0xb4, 0x3c, 0xb9, 0x8d, 0x5a,
+ 0x82, 0x50, 0x81, 0xd5, 0xbe, 0x47, 0x1c, 0x63
+};
+
+/* KM AES XTS-256 test data */
+static const uint8_t kmaesxts256key1[] = {
+ 0x1e, 0xa6, 0x61, 0xc5, 0x8d, 0x94, 0x3a, 0x0e,
+ 0x48, 0x01, 0xe4, 0x2f, 0x4b, 0x09, 0x47, 0x14,
+ 0x9e, 0x7f, 0x9f, 0x8e, 0x3e, 0x68, 0xd0, 0xc7,
+ 0x50, 0x52, 0x10, 0xbd, 0x31, 0x1a, 0x0e, 0x7c
+};
+static const uint8_t kmaesxts256key2[] = {
+ 0xd6, 0xe1, 0x3f, 0xfd, 0xf2, 0x41, 0x8d, 0x8d,
+ 0x19, 0x11, 0xc0, 0x04, 0xcd, 0xa5, 0x8d, 0xa3,
+ 0xd6, 0x19, 0xb7, 0xe2, 0xb9, 0x14, 0x1e, 0x58,
+ 0x31, 0x8e, 0xea, 0x39, 0x2c, 0xf4, 0x1b, 0x08
+};
+static const uint8_t kmaesxts256sect[] = {
+ 0xad, 0xf8, 0xd9, 0x26, 0x27, 0x46, 0x4a, 0xd2,
+ 0xf0, 0x42, 0x8e, 0x84, 0xa9, 0xf8, 0x75, 0x64
+};
+static const uint8_t kmaesxts256plain[] = {
+ 0x2e, 0xed, 0xea, 0x52, 0xcd, 0x82, 0x15, 0xe1,
+ 0xac, 0xc6, 0x47, 0xe8, 0x10, 0xbb, 0xc3, 0x64,
+ 0x2e, 0x87, 0x28, 0x7f, 0x8d, 0x2e, 0x57, 0xe3,
+ 0x6c, 0x0a, 0x24, 0xfb, 0xc1, 0x2a, 0x20, 0x2e
+};
+static const uint8_t kmaesxts256cipher[] = {
+ 0xcb, 0xaa, 0xd0, 0xe2, 0xf6, 0xce, 0xa3, 0xf5,
+ 0x0b, 0x37, 0xf9, 0x34, 0xd4, 0x6a, 0x9b, 0x13,
+ 0x0b, 0x9d, 0x54, 0xf0, 0x7e, 0x34, 0xf3, 0x6a,
+ 0xf7, 0x93, 0xe8, 0x6f, 0x73, 0xc6, 0xd7, 0xdb
+};
+
+/* static byte array containing the WKVP */
+static const uint8_t protkey_wkvp[32] = PROTKEY_WKVP;
+
+/*
+ * Query test for km
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_km_query(void)
+{
+ uint8_t query_block[QUERY_BLOCK_SIZE] = {0};
+ unsigned long cc = 0;
+ int i, rc = 0;
+
+ cpacf_km(CPACF_KM_QUERY, query_block, NULL, NULL, 0, &cc);
+
+ /* compare with expected query block */
+ for (i = 0; i < QUERY_BLOCK_SIZE; i++) {
+ if ((query_block[i] & exp_query_block[i]) != exp_query_block[i]) {
+ rc++;
+ break;
+ }
+ }
+
+ if (rc) {
+ printf("%s failed\n", __func__);
+ }
+
+ return rc;
+}
+
+/*
+ * Subfunction CPACF_KM_AES_128 test for km
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_km_aes_128(void)
+{
+ uint8_t param[16]; /* key only, no IV for ECB mode */
+ uint8_t output[16];
+ unsigned long cc = 0;
+ int rc = 0;
+
+ /* Setup parameter block: key only */
+ memcpy(param, kmaes128key, sizeof(kmaes128key));
+
+ /* Encrypt */
+ cpacf_km(CPACF_KM_AES_128, param, output, kmaes128plain,
+ sizeof(kmaes128plain), &cc);
+
+ /* Check for correct condition code */
+ if (cc != 0) {
+ printf("%s failed: unexpected cc=%lu\n", __func__, cc);
+ rc = 1;
+ }
+
+ /* Compare result with expected ciphertext */
+ if (memcmp(output, kmaes128cipher, sizeof(kmaes128cipher))) {
+ printf("%s failed: output mismatch\n", __func__);
+ rc = 1;
+ }
+
+ return rc;
+}
+
+/*
+ * Subfunction CPACF_KM_AES_192 test for km
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_km_aes_192(void)
+{
+ uint8_t param[24]; /* key only, no IV for ECB mode */
+ uint8_t output[16];
+ unsigned long cc = 0;
+ int rc = 0;
+
+ /* Setup parameter block: key only */
+ memcpy(param, kmaes192key, sizeof(kmaes192key));
+
+ /* Encrypt */
+ cpacf_km(CPACF_KM_AES_192, param, output, kmaes192plain,
+ sizeof(kmaes192plain), &cc);
+
+ /* Check for correct condition code */
+ if (cc != 0) {
+ printf("%s failed: unexpected cc=%lu\n", __func__, cc);
+ rc = 1;
+ }
+
+ /* Compare result with expected ciphertext */
+ if (memcmp(output, kmaes192cipher, sizeof(kmaes192cipher))) {
+ printf("%s failed: output mismatch\n", __func__);
+ rc = 1;
+ }
+
+ return rc;
+}
+
+/*
+ * Subfunction CPACF_KM_AES_256 test for km
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_km_aes_256(void)
+{
+ uint8_t param[32]; /* key only, no IV for ECB mode */
+ uint8_t output[16];
+ unsigned long cc = 0;
+ int rc = 0;
+
+ /* Setup parameter block: key only */
+ memcpy(param, kmaes256key, sizeof(kmaes256key));
+
+ /* Encrypt */
+ cpacf_km(CPACF_KM_AES_256, param, output, kmaes256plain,
+ sizeof(kmaes256plain), &cc);
+
+ /* Check for correct condition code */
+ if (cc != 0) {
+ printf("%s failed: unexpected cc=%lu\n", __func__, cc);
+ rc = 1;
+ }
+
+ /* Compare result with expected ciphertext */
+ if (memcmp(output, kmaes256cipher, sizeof(kmaes256cipher))) {
+ printf("%s failed: output mismatch\n", __func__);
+ rc = 1;
+ }
+
+ return rc;
+}
+
+/*
+ * Subfunction CPACF_KM_PAES_128 test for km
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_km_paes_128(void)
+{
+ uint8_t param[16 + 32]; /* protected key + wkvp */
+ uint8_t output[16];
+ unsigned long cc = 0;
+ int rc = 0;
+
+ /* Setup parameter block: protected key + wkvp */
+ memcpy(param, kmaes128key, sizeof(kmaes128key));
+ encrypt_clrkey(param, sizeof(kmaes128key));
+ memcpy(param + sizeof(kmaes128key), protkey_wkvp, sizeof(protkey_wkvp));
+
+ /* Encrypt */
+ cpacf_km(CPACF_KM_PAES_128, param, output, kmaes128plain,
+ sizeof(kmaes128plain), &cc);
+
+ /* Check for correct condition code */
+ if (cc != 0) {
+ printf("%s failed: unexpected cc=%lu\n", __func__, cc);
+ rc = 1;
+ }
+
+ /* Compare result with expected ciphertext */
+ if (memcmp(output, kmaes128cipher, sizeof(kmaes128cipher))) {
+ printf("%s failed: output mismatch\n", __func__);
+ rc = 1;
+ }
+
+ return rc;
+}
+
+/*
+ * Subfunction CPACF_KM_PAES_192 test for km
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_km_paes_192(void)
+{
+ uint8_t param[24 + 32]; /* protected key + wkvp */
+ uint8_t output[16];
+ unsigned long cc = 0;
+ int rc = 0;
+
+ /* Setup parameter block: protected key + wkvp */
+ memcpy(param, kmaes192key, sizeof(kmaes192key));
+ encrypt_clrkey(param, sizeof(kmaes192key));
+ memcpy(param + sizeof(kmaes192key), protkey_wkvp, sizeof(protkey_wkvp));
+
+ /* Encrypt */
+ cpacf_km(CPACF_KM_PAES_192, param, output, kmaes192plain,
+ sizeof(kmaes192plain), &cc);
+
+ /* Check for correct condition code */
+ if (cc != 0) {
+ printf("%s failed: unexpected cc=%lu\n", __func__, cc);
+ rc = 1;
+ }
+
+ /* Compare result with expected ciphertext */
+ if (memcmp(output, kmaes192cipher, sizeof(kmaes192cipher))) {
+ printf("%s failed: output mismatch\n", __func__);
+ rc = 1;
+ }
+
+ return rc;
+}
+
+/*
+ * Subfunction CPACF_KM_PAES_256 test for km
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_km_paes_256(void)
+{
+ uint8_t param[32 + 32]; /* protected key + wkvp */
+ uint8_t output[16];
+ unsigned long cc = 0;
+ int rc = 0;
+
+ /* Setup parameter block: protected key + wkvp */
+ memcpy(param, kmaes256key, sizeof(kmaes256key));
+ encrypt_clrkey(param, sizeof(kmaes256key));
+ memcpy(param + sizeof(kmaes256key), protkey_wkvp, sizeof(protkey_wkvp));
+
+ /* Encrypt */
+ cpacf_km(CPACF_KM_PAES_256, param, output, kmaes256plain,
+ sizeof(kmaes256plain), &cc);
+
+ /* Check for correct condition code */
+ if (cc != 0) {
+ printf("%s failed: unexpected cc=%lu\n", __func__, cc);
+ rc = 1;
+ }
+
+ /* Compare result with expected ciphertext */
+ if (memcmp(output, kmaes256cipher, sizeof(kmaes256cipher))) {
+ printf("%s failed: output mismatch\n", __func__);
+ rc = 1;
+ }
+
+ return rc;
+}
+
+/*
+ * Subfunction CPACF_KM_XTS_128 test for km
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_km_xts_128(void)
+{
+ uint8_t param[16 + 16]; /* key + initial XTS value */
+ uint8_t output[16];
+ uint8_t init_xts[16];
+ unsigned long cc = 0;
+ int rc = 0;
+
+ /* First compute initial XTS value using key2 and sector */
+ memcpy(param, kmaesxts128key2, sizeof(kmaesxts128key2));
+ cpacf_km(CPACF_KM_AES_128, param, init_xts, kmaesxts128sect,
+ sizeof(kmaesxts128sect), &cc);
+
+ if (cc != 0) {
+ printf("%s failed: initial XTS computation cc=%lu\n", __func__, cc);
+ return 1;
+ }
+
+ /* Setup parameter block: key1 + initial XTS value */
+ memcpy(param, kmaesxts128key1, sizeof(kmaesxts128key1));
+ memcpy(param + 16, init_xts, sizeof(init_xts));
+
+ /* Encrypt */
+ cpacf_km(CPACF_KM_XTS_128, param, output, kmaesxts128plain,
+ sizeof(kmaesxts128plain), &cc);
+
+ /* Check for correct condition code */
+ if (cc != 0) {
+ printf("%s failed: unexpected cc=%lu\n", __func__, cc);
+ rc = 1;
+ }
+
+ /* Compare result with expected ciphertext */
+ if (memcmp(output, kmaesxts128cipher, sizeof(kmaesxts128cipher))) {
+ printf("%s failed: output mismatch\n", __func__);
+ rc = 1;
+ }
+
+ return rc;
+}
+
+/*
+ * Subfunction CPACF_KM_XTS_256 test for km
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_km_xts_256(void)
+{
+ uint8_t param[32 + 16]; /* key + initial XTS value */
+ uint8_t output[32];
+ uint8_t init_xts[16];
+ unsigned long cc = 0;
+ int rc = 0;
+
+ /* First compute initial XTS value using key2 and sector */
+ memcpy(param, kmaesxts256key2, sizeof(kmaesxts256key2));
+ cpacf_km(CPACF_KM_AES_256, param, init_xts, kmaesxts256sect,
+ sizeof(kmaesxts256sect), &cc);
+
+ if (cc != 0) {
+ printf("%s failed: initial XTS computation cc=%lu\n", __func__, cc);
+ return 1;
+ }
+
+ /* Setup parameter block: key1 + initial XTS value */
+ memcpy(param, kmaesxts256key1, sizeof(kmaesxts256key1));
+ memcpy(param + 32, init_xts, sizeof(init_xts));
+
+ /* Encrypt */
+ cpacf_km(CPACF_KM_XTS_256, param, output, kmaesxts256plain,
+ sizeof(kmaesxts256plain), &cc);
+
+ /* Check for correct condition code */
+ if (cc != 0) {
+ printf("%s failed: unexpected cc=%lu\n", __func__, cc);
+ rc = 1;
+ }
+
+ /* Compare result with expected ciphertext */
+ if (memcmp(output, kmaesxts256cipher, sizeof(kmaesxts256cipher))) {
+ printf("%s failed: output mismatch\n", __func__);
+ rc = 1;
+ }
+
+ return rc;
+}
+
+/*
+ * Subfunction CPACF_KM_PXTS_128 test for km
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_km_pxts_128(void)
+{
+ uint8_t param[16 + 32 + 16]; /* protected key + wkvp + initial XTS value */
+ uint8_t output[16];
+ uint8_t init_xts[16];
+ uint8_t key2_param[16 + 32];
+ unsigned long cc = 0;
+ int rc = 0;
+
+ /* First compute initial XTS value using protected key2 and sector */
+ memcpy(key2_param, kmaesxts128key2, sizeof(kmaesxts128key2));
+ encrypt_clrkey(key2_param, sizeof(kmaesxts128key2));
+ memcpy(key2_param + sizeof(kmaesxts128key2),
+ protkey_wkvp, sizeof(protkey_wkvp));
+
+ cpacf_km(CPACF_KM_PAES_128, key2_param, init_xts, kmaesxts128sect,
+ sizeof(kmaesxts128sect), &cc);
+
+ if (cc != 0) {
+ printf("%s failed: initial XTS computation cc=%lu\n", __func__, cc);
+ return 1;
+ }
+
+ /* Setup parameter block: protected key1 + wkvp + initial XTS value */
+ memcpy(param, kmaesxts128key1, sizeof(kmaesxts128key1));
+ encrypt_clrkey(param, sizeof(kmaesxts128key1));
+ memcpy(param + sizeof(kmaesxts128key1), protkey_wkvp, sizeof(protkey_wkvp));
+ memcpy(param + sizeof(kmaesxts128key1) + sizeof(protkey_wkvp),
+ init_xts, sizeof(init_xts));
+
+ /* Encrypt */
+ cpacf_km(CPACF_KM_PXTS_128, param, output, kmaesxts128plain,
+ sizeof(kmaesxts128plain), &cc);
+
+ /* Check for correct condition code */
+ if (cc != 0) {
+ printf("%s failed: unexpected cc=%lu\n", __func__, cc);
+ rc = 1;
+ }
+
+ /* Compare result with expected ciphertext */
+ if (memcmp(output, kmaesxts128cipher, sizeof(kmaesxts128cipher))) {
+ printf("%s failed: output mismatch\n", __func__);
+ rc = 1;
+ }
+
+ return rc;
+}
+
+/*
+ * Subfunction CPACF_KM_PXTS_256 test for km
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_km_pxts_256(void)
+{
+ uint8_t param[32 + 32 + 16]; /* protected key + wkvp + initial XTS value */
+ uint8_t output[32];
+ uint8_t init_xts[16];
+ uint8_t key2_param[32 + 32];
+ unsigned long cc = 0;
+ int rc = 0;
+
+ /* First compute initial XTS value using protected key2 and sector */
+ memcpy(key2_param, kmaesxts256key2, sizeof(kmaesxts256key2));
+ encrypt_clrkey(key2_param, sizeof(kmaesxts256key2));
+ memcpy(key2_param + sizeof(kmaesxts256key2),
+ protkey_wkvp, sizeof(protkey_wkvp));
+
+ cpacf_km(CPACF_KM_PAES_256, key2_param, init_xts, kmaesxts256sect,
+ sizeof(kmaesxts256sect), &cc);
+
+ if (cc != 0) {
+ printf("%s failed: initial XTS computation cc=%lu\n", __func__, cc);
+ return 1;
+ }
+
+ /* Setup parameter block: protected key1 + wkvp + initial XTS value */
+ memcpy(param, kmaesxts256key1, sizeof(kmaesxts256key1));
+ encrypt_clrkey(param, sizeof(kmaesxts256key1));
+ memcpy(param + sizeof(kmaesxts256key1), protkey_wkvp, sizeof(protkey_wkvp));
+ memcpy(param + sizeof(kmaesxts256key1) + sizeof(protkey_wkvp),
+ init_xts, sizeof(init_xts));
+
+ /* Encrypt */
+ cpacf_km(CPACF_KM_PXTS_256, param, output, kmaesxts256plain,
+ sizeof(kmaesxts256plain), &cc);
+
+ /* Check for correct condition code */
+ if (cc != 0) {
+ printf("%s failed: unexpected cc=%lu\n", __func__, cc);
+ rc = 1;
+ }
+
+ /* Compare result with expected ciphertext */
+ if (memcmp(output, kmaesxts256cipher, sizeof(kmaesxts256cipher))) {
+ printf("%s failed: output mismatch\n", __func__);
+ rc = 1;
+ }
+
+ return rc;
+}
+
+int main(void)
+{
+ int rc = 0;
+
+ /* Test query function */
+ rc += test_km_query();
+
+ /* Test AES-128 */
+ rc += test_km_aes_128();
+
+ /* Test AES-192 */
+ rc += test_km_aes_192();
+
+ /* Test AES-256 */
+ rc += test_km_aes_256();
+
+ /* Test PAES-128 */
+ rc += test_km_paes_128();
+
+ /* Test PAES-192 */
+ rc += test_km_paes_192();
+
+ /* Test PAES-256 */
+ rc += test_km_paes_256();
+
+ /* Test XTS-128 */
+ rc += test_km_xts_128();
+
+ /* Test XTS-256 */
+ rc += test_km_xts_256();
+
+ /* Test PXTS-128 */
+ rc += test_km_pxts_128();
+
+ /* Test PXTS-256 */
+ rc += test_km_pxts_256();
+
+ if (rc) {
+ printf("cpacf-km: %d failures\n", rc);
+ }
+
+ return rc ? EXIT_FAILURE : EXIT_SUCCESS;
+}
diff --git a/tests/tcg/s390x/cpacf-kmac.c b/tests/tcg/s390x/cpacf-kmac.c
new file mode 100644
index 0000000000..c9ef847110
--- /dev/null
+++ b/tests/tcg/s390x/cpacf-kmac.c
@@ -0,0 +1,58 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * Simple test for the CPACF KMAC instruction
+ */
+
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include "cpacf.h"
+
+#define QUERY_BLOCK_SIZE 16
+
+/* expected kmac query block */
+static uint8_t exp_query_block[QUERY_BLOCK_SIZE] = {
+ 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
+static int test_kmac_query(void)
+{
+ uint8_t query_block[QUERY_BLOCK_SIZE] = {0};
+ unsigned long cc = 0;
+ int i, rc = 0;
+
+ cpacf_kmac(CPACF_KMAC_QUERY, query_block, NULL, 0, &cc);
+
+ /* compare with expected query block */
+ for (i = 0; i < QUERY_BLOCK_SIZE; i++) {
+ if ((query_block[i] & exp_query_block[i]) != exp_query_block[i]) {
+ rc++;
+ break;
+ }
+ }
+
+ if (rc) {
+ printf("%s failed\n", __func__);
+ }
+
+ return rc;
+}
+
+int main(void)
+{
+ int rc;
+
+ /* Test query function */
+ rc = test_kmac_query();
+
+ /* As of now only KMAC query is implemented */
+
+ if (rc) {
+ printf("cpacf-kmac: %d failures\n", rc);
+ }
+
+ return rc ? EXIT_FAILURE : EXIT_SUCCESS;
+}
diff --git a/tests/tcg/s390x/cpacf-kmc.c b/tests/tcg/s390x/cpacf-kmc.c
new file mode 100644
index 0000000000..671a8f3171
--- /dev/null
+++ b/tests/tcg/s390x/cpacf-kmc.c
@@ -0,0 +1,351 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * Simple test for CPACF KMC instruction
+ */
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <string.h>
+#include "cpacf.h"
+
+#define QUERY_BLOCK_SIZE 16
+
+/* expected kmc query block */
+static uint8_t exp_query_block[QUERY_BLOCK_SIZE] = {
+ 0x80, 0x00, 0x38, 0x38, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
+/* KMC AES-128 test data */
+static const uint8_t kmcaes128key[] = {
+ 0x1f, 0x8e, 0x49, 0x73, 0x95, 0x3f, 0x3f, 0xb0,
+ 0xbd, 0x6b, 0x16, 0x66, 0x2e, 0x9a, 0x3c, 0x17
+};
+static const uint8_t kmcaes128iv[] = {
+ 0x2f, 0xe2, 0xb3, 0x33, 0xce, 0xda, 0x8f, 0x98,
+ 0xf4, 0xa9, 0x9b, 0x40, 0xd2, 0xcd, 0x34, 0xa8
+};
+static const uint8_t kmcaes128plain[] = {
+ 0x45, 0xcf, 0x12, 0x96, 0x4f, 0xc8, 0x24, 0xab,
+ 0x76, 0x61, 0x6a, 0xe2, 0xf4, 0xbf, 0x08, 0x22
+};
+static const uint8_t kmcaes128cipher[] = {
+ 0x0f, 0x61, 0xc4, 0xd4, 0x4c, 0x51, 0x47, 0xc0,
+ 0x3c, 0x19, 0x5a, 0xd7, 0xe2, 0xcc, 0x12, 0xb2
+};
+
+/* KMC AES-192 test data */
+static const uint8_t kmcaes192key[] = {
+ 0xba, 0x75, 0xf4, 0xd1, 0xd9, 0xd7, 0xcf, 0x7f,
+ 0x55, 0x14, 0x45, 0xd5, 0x6c, 0xc1, 0xa8, 0xab,
+ 0x2a, 0x07, 0x8e, 0x15, 0xe0, 0x49, 0xdc, 0x2c
+};
+static const uint8_t kmcaes192iv[] = {
+ 0x53, 0x1c, 0xe7, 0x81, 0x76, 0x40, 0x16, 0x66,
+ 0xaa, 0x30, 0xdb, 0x94, 0xec, 0x4a, 0x30, 0xeb
+};
+static const uint8_t kmcaes192plain[] = {
+ 0xc5, 0x1f, 0xc2, 0x76, 0x77, 0x4d, 0xad, 0x94,
+ 0xbc, 0xdc, 0x1d, 0x28, 0x91, 0xec, 0x86, 0x68
+};
+static const uint8_t kmcaes192cipher[] = {
+ 0x70, 0xdd, 0x95, 0xa1, 0x4e, 0xe9, 0x75, 0xe2,
+ 0x39, 0xdf, 0x36, 0xff, 0x4a, 0xee, 0x1d, 0x5d
+};
+
+/* KMC AES-256 test data */
+static const uint8_t kmcaes256key[] = {
+ 0x6e, 0xd7, 0x6d, 0x2d, 0x97, 0xc6, 0x9f, 0xd1,
+ 0x33, 0x95, 0x89, 0x52, 0x39, 0x31, 0xf2, 0xa6,
+ 0xcf, 0xf5, 0x54, 0xb1, 0x5f, 0x73, 0x8f, 0x21,
+ 0xec, 0x72, 0xdd, 0x97, 0xa7, 0x33, 0x09, 0x07
+};
+static const uint8_t kmcaes256iv[] = {
+ 0x85, 0x1e, 0x87, 0x64, 0x77, 0x6e, 0x67, 0x96,
+ 0xaa, 0xb7, 0x22, 0xdb, 0xb6, 0x44, 0xac, 0xe8
+};
+static const uint8_t kmcaes256plain[] = {
+ 0x62, 0x82, 0xb8, 0xc0, 0x5c, 0x5c, 0x15, 0x30,
+ 0xb9, 0x7d, 0x48, 0x16, 0xca, 0x43, 0x47, 0x62
+};
+static const uint8_t kmcaes256cipher[] = {
+ 0x6a, 0xcc, 0x04, 0x14, 0x2e, 0x10, 0x0a, 0x65,
+ 0xf5, 0x1b, 0x97, 0xad, 0xf5, 0x17, 0x2c, 0x41
+};
+
+/* static byte array containing the WKVP */
+static const uint8_t protkey_wkvp[32] = PROTKEY_WKVP;
+
+/*
+ * Query test for kmc
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_kmc_query(void)
+{
+ uint8_t query_block[QUERY_BLOCK_SIZE] = {0};
+ unsigned long cc = 0;
+ int i, rc = 0;
+
+ cpacf_kmc(CPACF_KMC_QUERY, query_block, NULL, NULL, 0, &cc);
+
+ /* compare with expected query block */
+ for (i = 0; i < QUERY_BLOCK_SIZE; i++) {
+ if ((query_block[i] & exp_query_block[i]) != exp_query_block[i]) {
+ rc++;
+ break;
+ }
+ }
+
+ if (rc) {
+ printf("%s failed\n", __func__);
+ }
+
+ return rc;
+}
+
+/*
+ * Subfunction CPACF_KMC_AES_128 test for kmc
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_kmc_aes_128(void)
+{
+ uint8_t param[16 + 16]; /* IV + key */
+ uint8_t output[16];
+ unsigned long cc = 0;
+ int rc = 0;
+
+ /* Setup parameter block: IV followed by key */
+ memcpy(param, kmcaes128iv, sizeof(kmcaes128iv));
+ memcpy(param + sizeof(kmcaes128iv), kmcaes128key, sizeof(kmcaes128key));
+
+ /* Encrypt */
+ cpacf_kmc(CPACF_KMC_AES_128, param, output, kmcaes128plain,
+ sizeof(kmcaes128plain), &cc);
+
+ /* Check for correct condition code */
+ if (cc != 0) {
+ printf("%s failed: unexpected cc=%lu\n", __func__, cc);
+ rc = 1;
+ }
+
+ /* Compare result with expected ciphertext */
+ if (memcmp(output, kmcaes128cipher, sizeof(kmcaes128cipher))) {
+ printf("%s failed: output mismatch\n", __func__);
+ rc = 1;
+ }
+
+ return rc;
+}
+
+/*
+ * Subfunction CPACF_KMC_AES_192 test for kmc
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_kmc_aes_192(void)
+{
+ uint8_t param[16 + 24]; /* IV + key */
+ uint8_t output[16];
+ unsigned long cc = 0;
+ int rc = 0;
+
+ /* Setup parameter block: IV followed by key */
+ memcpy(param, kmcaes192iv, sizeof(kmcaes192iv));
+ memcpy(param + sizeof(kmcaes192iv), kmcaes192key, sizeof(kmcaes192key));
+
+ /* Encrypt */
+ cpacf_kmc(CPACF_KMC_AES_192, param, output, kmcaes192plain,
+ sizeof(kmcaes192plain), &cc);
+
+ /* Check for correct condition code */
+ if (cc != 0) {
+ printf("%s failed: unexpected cc=%lu\n", __func__, cc);
+ rc = 1;
+ }
+
+ /* Compare result with expected ciphertext */
+ if (memcmp(output, kmcaes192cipher, sizeof(kmcaes192cipher))) {
+ printf("%s failed: output mismatch\n", __func__);
+ rc = 1;
+ }
+
+ return rc;
+}
+
+/*
+ * Subfunction CPACF_KMC_AES_256 test for kmc
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_kmc_aes_256(void)
+{
+ uint8_t param[16 + 32]; /* IV + key */
+ uint8_t output[16];
+ unsigned long cc = 0;
+ int rc = 0;
+
+ /* Setup parameter block: IV followed by key */
+ memcpy(param, kmcaes256iv, sizeof(kmcaes256iv));
+ memcpy(param + sizeof(kmcaes256iv), kmcaes256key, sizeof(kmcaes256key));
+
+ /* Encrypt */
+ cpacf_kmc(CPACF_KMC_AES_256, param, output, kmcaes256plain,
+ sizeof(kmcaes256plain), &cc);
+
+ /* Check for correct condition code */
+ if (cc != 0) {
+ printf("%s failed: unexpected cc=%lu\n", __func__, cc);
+ rc = 1;
+ }
+
+ /* Compare result with expected ciphertext */
+ if (memcmp(output, kmcaes256cipher, sizeof(kmcaes256cipher))) {
+ printf("%s failed: output mismatch\n", __func__);
+ rc = 1;
+ }
+
+ return rc;
+}
+
+/*
+ * Subfunction CPACF_KMC_PAES_128 test for kmc
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_kmc_paes_128(void)
+{
+ uint8_t param[16 + 16 + 32]; /* IV + protected key + wkvp */
+ uint8_t output[16];
+ unsigned long cc = 0;
+ int rc = 0;
+
+ /* Setup parameter block: IV + protected key + wkvp */
+ memcpy(param, kmcaes128iv, sizeof(kmcaes128iv));
+ memcpy(param + sizeof(kmcaes128iv), kmcaes128key, sizeof(kmcaes128key));
+ encrypt_clrkey(param + sizeof(kmcaes128iv), sizeof(kmcaes128key));
+ memcpy(param + sizeof(kmcaes128iv) + sizeof(kmcaes128key),
+ protkey_wkvp, sizeof(protkey_wkvp));
+
+ /* Encrypt */
+ cpacf_kmc(CPACF_KMC_PAES_128, param, output, kmcaes128plain,
+ sizeof(kmcaes128plain), &cc);
+
+ /* Check for correct condition code */
+ if (cc != 0) {
+ printf("%s failed: unexpected cc=%lu\n", __func__, cc);
+ rc = 1;
+ }
+
+ /* Compare result with expected ciphertext */
+ if (memcmp(output, kmcaes128cipher, sizeof(kmcaes128cipher))) {
+ printf("%s failed: output mismatch\n", __func__);
+ rc = 1;
+ }
+
+ return rc;
+}
+
+/*
+ * Subfunction CPACF_KMC_PAES_192 test for kmc
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_kmc_paes_192(void)
+{
+ uint8_t param[16 + 24 + 32]; /* IV + protected key + wkvp */
+ uint8_t output[16];
+ unsigned long cc = 0;
+ int rc = 0;
+
+ /* Setup parameter block: IV + protected key + wkvp */
+ memcpy(param, kmcaes192iv, sizeof(kmcaes192iv));
+ memcpy(param + sizeof(kmcaes192iv), kmcaes192key, sizeof(kmcaes192key));
+ encrypt_clrkey(param + sizeof(kmcaes192iv), sizeof(kmcaes192key));
+ memcpy(param + sizeof(kmcaes192iv) + sizeof(kmcaes192key),
+ protkey_wkvp, sizeof(protkey_wkvp));
+
+ /* Encrypt */
+ cpacf_kmc(CPACF_KMC_PAES_192, param, output, kmcaes192plain,
+ sizeof(kmcaes192plain), &cc);
+
+ /* Check for correct condition code */
+ if (cc != 0) {
+ printf("%s failed: unexpected cc=%lu\n", __func__, cc);
+ rc = 1;
+ }
+
+ /* Compare result with expected ciphertext */
+ if (memcmp(output, kmcaes192cipher, sizeof(kmcaes192cipher))) {
+ printf("%s failed: output mismatch\n", __func__);
+ rc = 1;
+ }
+
+ return rc;
+}
+
+/*
+ * Subfunction CPACF_KMC_PAES_256 test for kmc
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_kmc_paes_256(void)
+{
+ uint8_t param[16 + 32 + 32]; /* IV + protected key + wkvp */
+ uint8_t output[16];
+ unsigned long cc = 0;
+ int rc = 0;
+
+ /* Setup parameter block: IV + protected key + wkvp */
+ memcpy(param, kmcaes256iv, sizeof(kmcaes256iv));
+ memcpy(param + sizeof(kmcaes256iv), kmcaes256key, sizeof(kmcaes256key));
+ encrypt_clrkey(param + sizeof(kmcaes256iv), sizeof(kmcaes256key));
+ memcpy(param + sizeof(kmcaes256iv) + sizeof(kmcaes256key),
+ protkey_wkvp, sizeof(protkey_wkvp));
+
+ /* Encrypt */
+ cpacf_kmc(CPACF_KMC_PAES_256, param, output, kmcaes256plain,
+ sizeof(kmcaes256plain), &cc);
+
+ /* Check for correct condition code */
+ if (cc != 0) {
+ printf("%s failed: unexpected cc=%lu\n", __func__, cc);
+ rc = 1;
+ }
+
+ /* Compare result with expected ciphertext */
+ if (memcmp(output, kmcaes256cipher, sizeof(kmcaes256cipher))) {
+ printf("%s failed: output mismatch\n", __func__);
+ rc = 1;
+ }
+
+ return rc;
+}
+
+int main(void)
+{
+ int rc = 0;
+
+ /* Test query function */
+ rc += test_kmc_query();
+
+ /* Test AES-128 */
+ rc += test_kmc_aes_128();
+
+ /* Test AES-192 */
+ rc += test_kmc_aes_192();
+
+ /* Test AES-256 */
+ rc += test_kmc_aes_256();
+
+ /* Test PAES-128 */
+ rc += test_kmc_paes_128();
+
+ /* Test PAES-192 */
+ rc += test_kmc_paes_192();
+
+ /* Test PAES-256 */
+ rc += test_kmc_paes_256();
+
+ if (rc) {
+ printf("cpacf-kmc: %d failures\n", rc);
+ }
+
+ return rc ? EXIT_FAILURE : EXIT_SUCCESS;
+}
diff --git a/tests/tcg/s390x/cpacf-kmctr.c b/tests/tcg/s390x/cpacf-kmctr.c
new file mode 100644
index 0000000000..515f94038b
--- /dev/null
+++ b/tests/tcg/s390x/cpacf-kmctr.c
@@ -0,0 +1,360 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * Simple test for CPACF KMCTR instruction
+ */
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <string.h>
+#include "cpacf.h"
+
+#define QUERY_BLOCK_SIZE 16
+
+/* expected kmctr query block */
+static uint8_t exp_query_block[QUERY_BLOCK_SIZE] = {
+ 0x80, 0x00, 0x38, 0x38, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
+/* KMCTR AES-128 test data */
+static const uint8_t kmctraes128key[] = {
+ 0xed, 0xfd, 0xb2, 0x57, 0xcb, 0x37, 0xcd, 0xf1,
+ 0x82, 0xc5, 0x45, 0x5b, 0x0c, 0x0e, 0xfe, 0xbb
+};
+static const uint8_t kmctraes128plain[] = {
+ 0x16, 0x95, 0xfe, 0x47, 0x54, 0x21, 0xca, 0xce,
+ 0x35, 0x57, 0xda, 0xca, 0x01, 0xf4, 0x45, 0xff
+};
+static const uint8_t kmctraes128cipher[] = {
+ 0x78, 0x88, 0xbe, 0xae, 0x6e, 0x7a, 0x42, 0x63,
+ 0x32, 0xa7, 0xea, 0xa2, 0xf8, 0x08, 0xe6, 0x37
+};
+
+/* KMCTR AES-192 test data */
+static const uint8_t kmctraes192key[] = {
+ 0x61, 0x39, 0x6c, 0x53, 0x0c, 0xc1, 0x74, 0x9a,
+ 0x5b, 0xab, 0x6f, 0xbc, 0xf9, 0x06, 0xfe, 0x67,
+ 0x2d, 0x0c, 0x4a, 0xb2, 0x01, 0xaf, 0x45, 0x54
+};
+static const uint8_t kmctraes192plain[] = {
+ 0x60, 0xbc, 0xdb, 0x94, 0x16, 0xba, 0xc0, 0x8d,
+ 0x7f, 0xd0, 0xd7, 0x80, 0x35, 0x37, 0x40, 0xa5
+};
+static const uint8_t kmctraes192cipher[] = {
+ 0x24, 0xf4, 0x0c, 0x4e, 0xec, 0xd9, 0xc4, 0x98,
+ 0x25, 0x00, 0x0f, 0xcb, 0x49, 0x72, 0x64, 0x7a
+};
+
+/* KMCTR AES-256 test data */
+static const uint8_t kmctraes256key[] = {
+ 0xcc, 0x22, 0xda, 0x78, 0x7f, 0x37, 0x57, 0x11,
+ 0xc7, 0x63, 0x02, 0xbe, 0xf0, 0x97, 0x9d, 0x8e,
+ 0xdd, 0xf8, 0x42, 0x82, 0x9c, 0x2b, 0x99, 0xef,
+ 0x3d, 0xd0, 0x4e, 0x23, 0xe5, 0x4c, 0xc2, 0x4b
+};
+static const uint8_t kmctraes256plain[] = {
+ 0xcc, 0xc6, 0x2c, 0x6b, 0x0a, 0x09, 0xa6, 0x71,
+ 0xd6, 0x44, 0x56, 0x81, 0x8d, 0xb2, 0x9a, 0x4d
+};
+static const uint8_t kmctraes256cipher[] = {
+ 0xdf, 0x86, 0x34, 0xca, 0x02, 0xb1, 0x3a, 0x12,
+ 0x5b, 0x78, 0x6e, 0x1d, 0xce, 0x90, 0x65, 0x8b
+};
+
+/* static byte array containing the WKVP */
+static const uint8_t protkey_wkvp[32] = PROTKEY_WKVP;
+
+/*
+ * Query test for kmctr
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_kmctr_query(void)
+{
+ uint8_t query_block[QUERY_BLOCK_SIZE] = {0};
+ unsigned long cc = 0;
+ int i, rc = 0;
+
+ cpacf_kmctr(CPACF_KMCTR_QUERY, query_block, NULL, NULL, 0, NULL, &cc);
+
+ /* compare with expected query block */
+ for (i = 0; i < QUERY_BLOCK_SIZE; i++) {
+ if ((query_block[i] & exp_query_block[i]) != exp_query_block[i]) {
+ rc++;
+ break;
+ }
+ }
+
+ if (rc) {
+ printf("%s failed\n", __func__);
+ }
+
+ return rc;
+}
+
+/*
+ * Subfunction CPACF_KMCTR_AES_128 test for kmctr
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_kmctr_aes_128(void)
+{
+ uint8_t param[16]; /* Parameter block: AES-128 key */
+ uint8_t src[16] = {0}; /* Source data (zeros for this test) */
+ uint8_t counter[16]; /* Counter value */
+ uint8_t output[16]; /* Output buffer */
+ unsigned long cc = 0;
+ int rc = 0;
+
+ /* Setup parameter block: key only */
+ memcpy(param, kmctraes128key, sizeof(kmctraes128key));
+
+ /* Setup counter buffer */
+ memcpy(counter, kmctraes128plain, sizeof(kmctraes128plain));
+
+ /* En/Decrypt src with given counter, note that src is all zero */
+ cpacf_kmctr(CPACF_KMCTR_AES_128, param, output, src,
+ sizeof(src), counter, &cc);
+
+ /* Check for correct condition code */
+ if (cc != 0) {
+ printf("%s failed: unexpected cc=%lu\n", __func__, cc);
+ rc = 1;
+ }
+
+ /* Compare result with expected ciphertext */
+ if (memcmp(output, kmctraes128cipher, sizeof(kmctraes128cipher))) {
+ printf("%s failed: output mismatch\n", __func__);
+ rc = 1;
+ }
+
+ return rc;
+}
+
+/*
+ * Subfunction CPACF_KMCTR_AES_192 test for kmctr
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_kmctr_aes_192(void)
+{
+ uint8_t param[24]; /* Parameter block: AES-192 key */
+ uint8_t src[16] = {0}; /* Source data (zeros for this test) */
+ uint8_t counter[16]; /* Counter value */
+ uint8_t output[16]; /* Output buffer */
+ unsigned long cc = 0;
+ int rc = 0;
+
+ /* Setup parameter block: key only */
+ memcpy(param, kmctraes192key, sizeof(kmctraes192key));
+
+ /* Setup counter buffer */
+ memcpy(counter, kmctraes192plain, sizeof(kmctraes192plain));
+
+ /* En/Decrypt src with given counter, note that src is all zero */
+ cpacf_kmctr(CPACF_KMCTR_AES_192, param, output, src,
+ sizeof(src), counter, &cc);
+
+ /* Check for correct condition code */
+ if (cc != 0) {
+ printf("%s failed: unexpected cc=%lu\n", __func__, cc);
+ rc = 1;
+ }
+
+ /* Compare result with expected ciphertext */
+ if (memcmp(output, kmctraes192cipher, sizeof(kmctraes192cipher))) {
+ printf("%s failed: output mismatch\n", __func__);
+ rc = 1;
+ }
+
+ return rc;
+}
+
+/*
+ * Subfunction CPACF_KMCTR_AES_256 test for kmctr
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_kmctr_aes_256(void)
+{
+ uint8_t param[32]; /* Parameter block: AES-256 key */
+ uint8_t src[16] = {0}; /* Source data (zeros for this test) */
+ uint8_t counter[16]; /* Counter value */
+ uint8_t output[16]; /* Output buffer */
+ unsigned long cc = 0;
+ int rc = 0;
+
+ /* Setup parameter block: key only */
+ memcpy(param, kmctraes256key, sizeof(kmctraes256key));
+
+ /* Setup counter buffer */
+ memcpy(counter, kmctraes256plain, sizeof(kmctraes256plain));
+
+ /* En/Decrypt src with given counter, note that src is all zero */
+ cpacf_kmctr(CPACF_KMCTR_AES_256, param, output, src,
+ sizeof(src), counter, &cc);
+
+ /* Check for correct condition code */
+ if (cc != 0) {
+ printf("%s failed: unexpected cc=%lu\n", __func__, cc);
+ rc = 1;
+ }
+
+ /* Compare result with expected ciphertext */
+ if (memcmp(output, kmctraes256cipher, sizeof(kmctraes256cipher))) {
+ printf("%s failed: output mismatch\n", __func__);
+ rc = 1;
+ }
+
+ return rc;
+}
+
+/*
+ * Subfunction CPACF_KMCTR_PAES_128 test for kmctr
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_kmctr_paes_128(void)
+{
+ uint8_t param[16 + 32]; /* Parameter block: protected key + wkvp */
+ uint8_t src[16] = {0}; /* Source data (zeros for this test) */
+ uint8_t counter[16]; /* Counter value */
+ uint8_t output[16]; /* Output buffer */
+ unsigned long cc = 0;
+ int rc = 0;
+
+ /* Setup parameter block: protected key + wkvp */
+ memcpy(param, kmctraes128key, sizeof(kmctraes128key));
+ encrypt_clrkey(param, sizeof(kmctraes128key));
+ memcpy(param + sizeof(kmctraes128key), protkey_wkvp, sizeof(protkey_wkvp));
+
+ /* Setup counter buffer */
+ memcpy(counter, kmctraes128plain, sizeof(kmctraes128plain));
+
+ /* En/Decrypt src with given counter, note that src is all zero */
+ cpacf_kmctr(CPACF_KMCTR_PAES_128, param, output, src,
+ sizeof(src), counter, &cc);
+
+ /* Check for correct condition code */
+ if (cc != 0) {
+ printf("%s failed: unexpected cc=%lu\n", __func__, cc);
+ rc = 1;
+ }
+
+ /* Compare result with expected ciphertext */
+ if (memcmp(output, kmctraes128cipher, sizeof(kmctraes128cipher))) {
+ printf("%s failed: output mismatch\n", __func__);
+ rc = 1;
+ }
+
+ return rc;
+}
+
+/*
+ * Subfunction CPACF_KMCTR_PAES_192 test for kmctr
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_kmctr_paes_192(void)
+{
+ uint8_t param[24 + 32]; /* Parameter block: protected key + wkvp */
+ uint8_t src[16] = {0}; /* Source data (zeros for this test) */
+ uint8_t counter[16]; /* Counter value */
+ uint8_t output[16]; /* Output buffer */
+ unsigned long cc = 0;
+ int rc = 0;
+
+ /* Setup parameter block: protected key + wkvp */
+ memcpy(param, kmctraes192key, sizeof(kmctraes192key));
+ encrypt_clrkey(param, sizeof(kmctraes192key));
+ memcpy(param + sizeof(kmctraes192key), protkey_wkvp, sizeof(protkey_wkvp));
+
+ /* Setup counter buffer */
+ memcpy(counter, kmctraes192plain, sizeof(kmctraes192plain));
+
+ /* En/Decrypt src with given counter, note that src is all zero */
+ cpacf_kmctr(CPACF_KMCTR_PAES_192, param, output, src,
+ sizeof(src), counter, &cc);
+
+ /* Check for correct condition code */
+ if (cc != 0) {
+ printf("%s failed: unexpected cc=%lu\n", __func__, cc);
+ rc = 1;
+ }
+
+ /* Compare result with expected ciphertext */
+ if (memcmp(output, kmctraes192cipher, sizeof(kmctraes192cipher))) {
+ printf("%s failed: output mismatch\n", __func__);
+ rc = 1;
+ }
+
+ return rc;
+}
+
+/*
+ * Subfunction CPACF_KMCTR_PAES_256 test for kmctr
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_kmctr_paes_256(void)
+{
+ uint8_t param[32 + 32]; /* Parameter block: protected key + wkvp */
+ uint8_t src[16] = {0}; /* Source data (zeros for this test) */
+ uint8_t counter[16]; /* Counter value */
+ uint8_t output[16]; /* Output buffer */
+ unsigned long cc = 0;
+ int rc = 0;
+
+ /* Setup parameter block: protected key + wkvp */
+ memcpy(param, kmctraes256key, sizeof(kmctraes256key));
+ encrypt_clrkey(param, sizeof(kmctraes256key));
+ memcpy(param + sizeof(kmctraes256key), protkey_wkvp, sizeof(protkey_wkvp));
+
+ /* Setup counter buffer */
+ memcpy(counter, kmctraes256plain, sizeof(kmctraes256plain));
+
+ /* En/Decrypt src with given counter, note that src is all zero */
+ cpacf_kmctr(CPACF_KMCTR_PAES_256, param, output, src,
+ sizeof(src), counter, &cc);
+
+ /* Check for correct condition code */
+ if (cc != 0) {
+ printf("%s failed: unexpected cc=%lu\n", __func__, cc);
+ rc = 1;
+ }
+
+ /* Compare result with expected ciphertext */
+ if (memcmp(output, kmctraes256cipher, sizeof(kmctraes256cipher))) {
+ printf("%s failed: output mismatch\n", __func__);
+ rc = 1;
+ }
+
+ return rc;
+}
+
+int main(void)
+{
+ int rc = 0;
+
+ /* Test query function */
+ rc += test_kmctr_query();
+
+ /* Test AES-128 */
+ rc += test_kmctr_aes_128();
+
+ /* Test AES-192 */
+ rc += test_kmctr_aes_192();
+
+ /* Test AES-256 */
+ rc += test_kmctr_aes_256();
+
+ /* Test PAES-128 */
+ rc += test_kmctr_paes_128();
+
+ /* Test PAES-192 */
+ rc += test_kmctr_paes_192();
+
+ /* Test PAES-256 */
+ rc += test_kmctr_paes_256();
+
+ if (rc) {
+ printf("cpacf-kmctr: %d failures\n", rc);
+ }
+
+ return rc ? EXIT_FAILURE : EXIT_SUCCESS;
+}
diff --git a/tests/tcg/s390x/cpacf-pcc.c b/tests/tcg/s390x/cpacf-pcc.c
new file mode 100644
index 0000000000..e61672f98b
--- /dev/null
+++ b/tests/tcg/s390x/cpacf-pcc.c
@@ -0,0 +1,245 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * Simple test for CPACF PCC instruction
+ */
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <string.h>
+#include "cpacf.h"
+
+#define QUERY_BLOCK_SIZE 16
+
+/* expected pcc query block */
+static uint8_t exp_query_block[QUERY_BLOCK_SIZE] = {
+ 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x28, 0x28,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
+/* PCC XTS AES-128 test data */
+static const uint8_t kmaes128key[] = {
+ 0xed, 0xfd, 0xb2, 0x57, 0xcb, 0x37, 0xcd, 0xf1,
+ 0x82, 0xc5, 0x45, 0x5b, 0x0c, 0x0e, 0xfe, 0xbb
+};
+static const uint8_t kmaes128plain[] = {
+ 0x16, 0x95, 0xfe, 0x47, 0x54, 0x21, 0xca, 0xce,
+ 0x35, 0x57, 0xda, 0xca, 0x01, 0xf4, 0x45, 0xff
+};
+static const uint8_t kmaes128cipher[] = {
+ 0x78, 0x88, 0xbe, 0xae, 0x6e, 0x7a, 0x42, 0x63,
+ 0x32, 0xa7, 0xea, 0xa2, 0xf8, 0x08, 0xe6, 0x37
+};
+
+/* PCC XTS AES-256 test data */
+static const uint8_t kmaes256key[] = {
+ 0xcc, 0x22, 0xda, 0x78, 0x7f, 0x37, 0x57, 0x11,
+ 0xc7, 0x63, 0x02, 0xbe, 0xf0, 0x97, 0x9d, 0x8e,
+ 0xdd, 0xf8, 0x42, 0x82, 0x9c, 0x2b, 0x99, 0xef,
+ 0x3d, 0xd0, 0x4e, 0x23, 0xe5, 0x4c, 0xc2, 0x4b
+};
+static const uint8_t kmaes256plain[] = {
+ 0xcc, 0xc6, 0x2c, 0x6b, 0x0a, 0x09, 0xa6, 0x71,
+ 0xd6, 0x44, 0x56, 0x81, 0x8d, 0xb2, 0x9a, 0x4d
+};
+static const uint8_t kmaes256cipher[] = {
+ 0xdf, 0x86, 0x34, 0xca, 0x02, 0xb1, 0x3a, 0x12,
+ 0x5b, 0x78, 0x6e, 0x1d, 0xce, 0x90, 0x65, 0x8b
+};
+
+/* static byte array containing the WKVP */
+static const uint8_t protkey_wkvp[32] = PROTKEY_WKVP;
+
+/*
+ * Query test for pcc
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_pcc_query(void)
+{
+ uint8_t query_block[QUERY_BLOCK_SIZE] = {0};
+ unsigned long cc = 0;
+ int i, rc = 0;
+
+ cpacf_pcc(CPACF_PCC_QUERY, query_block, &cc);
+
+ /* compare with expected query block */
+ for (i = 0; i < QUERY_BLOCK_SIZE; i++) {
+ if ((query_block[i] & exp_query_block[i]) != exp_query_block[i]) {
+ rc++;
+ break;
+ }
+ }
+
+ if (rc) {
+ printf("%s failed\n", __func__);
+ }
+
+ return rc;
+}
+
+/*
+ * Subfunction CPACF_PCC_XTS_AES_128 test for pcc
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_pcc_xts_aes_128(void)
+{
+ uint8_t param[80];
+ unsigned long cc = 0;
+ int rc = 0;
+
+ /* Setup parameter block: key + plaintext + zeros */
+ memcpy(param, kmaes128key, sizeof(kmaes128key));
+ memcpy(param + 16, kmaes128plain, sizeof(kmaes128plain));
+ /* Clear Block Sequential Nr, Intermediate Bit Index, and XTS Parameter */
+ memset(param + 32, 0, 48);
+
+ /* Execute PCC to compute XTS parameter */
+ cpacf_pcc(CPACF_PCC_XTS_AES_128, param, &cc);
+
+ /* Check for correct condition code */
+ if (cc != 0) {
+ printf("%s failed: unexpected cc=%lu\n", __func__, cc);
+ rc = 1;
+ }
+
+ /* Compare computed XTS parameter (at offset 64) with expected cipher */
+ if (memcmp(param + 64, kmaes128cipher, sizeof(kmaes128cipher))) {
+ printf("%s failed: XTS parameter mismatch\n", __func__);
+ rc = 1;
+ }
+
+ return rc;
+}
+
+/*
+ * Subfunction CPACF_PCC_XTS_AES_256 test for pcc
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_pcc_xts_aes_256(void)
+{
+ uint8_t param[96];
+ unsigned long cc = 0;
+ int rc = 0;
+
+ /* Setup parameter block: key + plaintext + zeros */
+ memcpy(param, kmaes256key, sizeof(kmaes256key));
+ memcpy(param + 32, kmaes256plain, sizeof(kmaes256plain));
+ /* Clear Block Sequential Nr, Intermediate Bit Index, and XTS Parameter */
+ memset(param + 48, 0, 48);
+
+ /* Execute PCC to compute XTS parameter */
+ cpacf_pcc(CPACF_PCC_XTS_AES_256, param, &cc);
+
+ /* Check for correct condition code */
+ if (cc != 0) {
+ printf("%s failed: unexpected cc=%lu\n", __func__, cc);
+ rc = 1;
+ }
+
+ /* Compare computed XTS parameter (at offset 80) with expected cipher */
+ if (memcmp(param + 80, kmaes256cipher, sizeof(kmaes256cipher))) {
+ printf("%s failed: XTS parameter mismatch\n", __func__);
+ rc = 1;
+ }
+
+ return rc;
+}
+
+/*
+ * Subfunction CPACF_PCC_XTS_PAES_128 test for pcc
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_pcc_xts_paes_128(void)
+{
+ uint8_t param[112];
+ unsigned long cc = 0;
+ int rc = 0;
+
+ /* Setup parameter block: protected key + wkvp + plaintext + zeros */
+ memcpy(param, kmaes128key, sizeof(kmaes128key));
+ encrypt_clrkey(param, sizeof(kmaes128key));
+ memcpy(param + 16, protkey_wkvp, sizeof(protkey_wkvp));
+ memcpy(param + 48, kmaes128plain, sizeof(kmaes128plain));
+ /* Clear Block Sequential Nr, Intermediate Bit Index, and XTS Parameter */
+ memset(param + 64, 0, 48);
+
+ /* Execute PCC to compute XTS parameter */
+ cpacf_pcc(CPACF_PCC_XTS_PAES_128, param, &cc);
+
+ /* Check for correct condition code */
+ if (cc != 0) {
+ printf("%s failed: unexpected cc=%lu\n", __func__, cc);
+ rc = 1;
+ }
+
+ /* Compare computed XTS parameter (at offset 96) with expected cipher */
+ if (memcmp(param + 96, kmaes128cipher, sizeof(kmaes128cipher))) {
+ printf("%s failed: XTS parameter mismatch\n", __func__);
+ rc = 1;
+ }
+
+ return rc;
+}
+
+/*
+ * Subfunction CPACF_PCC_XTS_PAES_256 test for pcc
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_pcc_xts_paes_256(void)
+{
+ uint8_t param[128];
+ unsigned long cc = 0;
+ int rc = 0;
+
+ /* Setup parameter block: protected key + wkvp + plaintext + zeros */
+ memcpy(param, kmaes256key, sizeof(kmaes256key));
+ encrypt_clrkey(param, sizeof(kmaes256key));
+ memcpy(param + 32, protkey_wkvp, sizeof(protkey_wkvp));
+ memcpy(param + 64, kmaes256plain, sizeof(kmaes256plain));
+ /* Clear Block Sequential Nr, Intermediate Bit Index, and XTS Parameter */
+ memset(param + 80, 0, 48);
+
+ /* Execute PCC to compute XTS parameter */
+ cpacf_pcc(CPACF_PCC_XTS_PAES_256, param, &cc);
+
+ /* Check for correct condition code */
+ if (cc != 0) {
+ printf("%s failed: unexpected cc=%lu\n", __func__, cc);
+ rc = 1;
+ }
+
+ /* Compare computed XTS parameter (at offset 112) with expected cipher */
+ if (memcmp(param + 112, kmaes256cipher, sizeof(kmaes256cipher))) {
+ printf("%s failed: XTS parameter mismatch\n", __func__);
+ rc = 1;
+ }
+
+ return rc;
+}
+
+int main(void)
+{
+ int rc = 0;
+
+ /* Test query function */
+ rc += test_pcc_query();
+
+ /* Test XTS-AES-128 */
+ rc += test_pcc_xts_aes_128();
+
+ /* Test XTS-AES-256 */
+ rc += test_pcc_xts_aes_256();
+
+ /* Test XTS-PAES-128 */
+ rc += test_pcc_xts_paes_128();
+
+ /* Test XTS-PAES-256 */
+ rc += test_pcc_xts_paes_256();
+
+ if (rc) {
+ printf("cpacf-pcc: %d failures\n", rc);
+ }
+
+ return rc ? EXIT_FAILURE : EXIT_SUCCESS;
+}
diff --git a/tests/tcg/s390x/cpacf-pckmo.c b/tests/tcg/s390x/cpacf-pckmo.c
new file mode 100644
index 0000000000..affcc88d56
--- /dev/null
+++ b/tests/tcg/s390x/cpacf-pckmo.c
@@ -0,0 +1,45 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * Simple test for CPACF PCKMO instruction (privileged operation).
+ *
+ * As PCKMO is a privileged instruction, when executed in user mode,
+ * it triggers a privileged operation exception, which is mapped to SIGILL.
+ */
+
+#include <assert.h>
+#include <signal.h>
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+#include "cpacf.h"
+
+static void handle_sigill(int sig, siginfo_t *info, void *ucontext)
+{
+ /* PCKMO is privileged, so we expect SIGILL - this is success */
+ _exit(EXIT_SUCCESS);
+}
+
+int main(void)
+{
+ struct sigaction act;
+ uint8_t param_block[32] = {0}; /* Parameter block for PCKMO */
+ int err;
+
+ /* Setup signal handler for SIGILL (privileged operation exception) */
+ memset(&act, 0, sizeof(act));
+ act.sa_sigaction = handle_sigill;
+ act.sa_flags = SA_SIGINFO;
+ err = sigaction(SIGILL, &act, NULL);
+ assert(err == 0);
+
+ /*
+ * Attempt to execute PCKMO with subfunction CPACF_PCKMO_QUERY.
+ * As PCKMO is privileged, it should trigger SIGILL.
+ */
+ cpacf_pckmo(CPACF_PCKMO_QUERY, param_block);
+
+ /* Should never be reached - PCKMO should trigger exception */
+ return EXIT_FAILURE;
+}
diff --git a/tests/tcg/s390x/cpacf-prno.c b/tests/tcg/s390x/cpacf-prno.c
new file mode 100644
index 0000000000..1081a9e970
--- /dev/null
+++ b/tests/tcg/s390x/cpacf-prno.c
@@ -0,0 +1,131 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * Simple test for CPACF PRNO instruction
+ */
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include <stdio.h>
+#include <string.h>
+#include "cpacf.h"
+
+#define QUERY_BLOCK_SIZE 16
+#define TRNG_OUTPUT_SIZE 32
+
+/* expected prno query block */
+static uint8_t exp_query_block[QUERY_BLOCK_SIZE] = {
+ 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x00,
+};
+
+/*
+ * Query test for prno
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_prno_query(void)
+{
+ uint8_t query_block[QUERY_BLOCK_SIZE] = {0};
+ unsigned long cc = 0;
+ int i, rc = 0;
+
+ cpacf_prno(CPACF_PRNO_QUERY, query_block, NULL, 0, NULL, 0, &cc);
+
+ /* compare with expected query block */
+ for (i = 0; i < QUERY_BLOCK_SIZE; i++) {
+ if ((query_block[i] & exp_query_block[i]) != exp_query_block[i]) {
+ rc++;
+ break;
+ }
+ }
+
+ if (rc) {
+ printf("%s failed\n", __func__);
+ }
+
+ return rc;
+}
+
+/* check for buffer is all zero */
+static bool is_all_zeros(const uint8_t *buf, size_t len)
+{
+ size_t i;
+
+ for (i = 0; i < len; i++) {
+ if (buf[i] != 0) {
+ return false;
+ }
+ }
+
+ return true;
+}
+
+/*
+ * Subfunction CPACF_PRNO_TRNG test for prno
+ * returns > 0 on failure, otherwise 0
+ */
+static int test_prno_trng(void)
+{
+ uint8_t output1[TRNG_OUTPUT_SIZE];
+ uint8_t output2[TRNG_OUTPUT_SIZE];
+ unsigned long cc = 0;
+ int rc = 0;
+
+ /* Initialize outputs to detect if they get filled */
+ memset(output1, 0, sizeof(output1));
+ memset(output2, 0, sizeof(output2));
+
+ /* First TRNG call */
+ cpacf_prno(CPACF_PRNO_TRNG, NULL, output1, sizeof(output1), NULL, 0, &cc);
+
+ /* Check for correct condition code */
+ if (cc != 0) {
+ printf("%s failed: unexpected cc=%lu on first call\n", __func__, cc);
+ rc = 1;
+ }
+ /* Verify output is not all zeros */
+ if (is_all_zeros(output1, TRNG_OUTPUT_SIZE)) {
+ printf("%s failed: output1 is all zeros\n", __func__);
+ rc = 1;
+ }
+
+ /* Second TRNG call */
+ cpacf_prno(CPACF_PRNO_TRNG, NULL, output2, sizeof(output2), NULL, 0, &cc);
+
+ /* Check for correct condition code */
+ if (cc != 0) {
+ printf("%s failed: unexpected cc=%lu on second call\n", __func__, cc);
+ rc = 1;
+ }
+ /* Verify output is not all zeros */
+ if (is_all_zeros(output2, TRNG_OUTPUT_SIZE)) {
+ printf("%s failed: output2 is all zeros\n", __func__);
+ rc = 1;
+ }
+
+ /* Verify the two outputs are different */
+ if (memcmp(output1, output2, TRNG_OUTPUT_SIZE) == 0) {
+ printf("%s failed: two TRNG calls produced same output\n", __func__);
+ rc = 1;
+ }
+
+ return rc;
+}
+
+int main(void)
+{
+ int rc = 0;
+
+ /* Test query function */
+ rc += test_prno_query();
+
+ /* Test TRNG */
+ rc += test_prno_trng();
+
+ if (rc) {
+ printf("cpacf-prno: %d failures\n", rc);
+ }
+
+ return rc ? EXIT_FAILURE : EXIT_SUCCESS;
+}
diff --git a/tests/tcg/s390x/cpacf.h b/tests/tcg/s390x/cpacf.h
new file mode 100644
index 0000000000..c0578abd09
--- /dev/null
+++ b/tests/tcg/s390x/cpacf.h
@@ -0,0 +1,570 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * Defines and inline functions around testing CPACF instructions
+ *
+ */
+
+#ifndef _S390_CPACF_H_
+#define _S390_CPACF_H_
+
+#include "../../../target/s390x/tcg/cpacf-arch.h"
+
+union register_pair {
+ unsigned __int128 pair;
+ struct {
+ unsigned long even;
+ unsigned long odd;
+ };
+};
+
+/*
+ * Instruction opcodes for the CPACF instructions
+ */
+#define CPACF_KMAC 0xb91e /* MSA */
+#define CPACF_KM 0xb92e /* MSA */
+#define CPACF_KMC 0xb92f /* MSA */
+#define CPACF_KIMD 0xb93e /* MSA */
+#define CPACF_KLMD 0xb93f /* MSA */
+#define CPACF_PCKMO 0xb928 /* MSA3 */
+#define CPACF_KMF 0xb92a /* MSA4 */
+#define CPACF_KMO 0xb92b /* MSA4 */
+#define CPACF_PCC 0xb92c /* MSA4 */
+#define CPACF_KMCTR 0xb92d /* MSA4 */
+#define CPACF_PRNO 0xb93c /* MSA5 */
+#define CPACF_KMA 0xb929 /* MSA8 */
+#define CPACF_KDSA 0xb93a /* MSA9 */
+
+/*
+ * 'encrypt' the clear key value into a protected key
+ * by xor-ing the protkey_xor_pattern onto it.
+ */
+static inline void encrypt_clrkey(uint8_t *key, int keysize)
+{
+ const uint8_t protkey_xor_pattern[32] = PROTKEY_XOR_PATTERN;
+
+ for (int i = 0; i < keysize; i++) {
+ key[i] ^= protkey_xor_pattern[i];
+ }
+}
+
+/**
+ * cpacf_km() - executes the KM instruction
+ * @func: the function code passed to KM; see CPACF_KM_xxx defines
+ * @param: address of parameter block; see POP for details on each func
+ * @dest: address of destination memory area
+ * @src: address of source memory area
+ * @src_len: length of src operand in bytes
+ *
+ * Returns 0 for the query func, number of processed bytes for
+ * encryption/decryption funcs
+ */
+static inline int cpacf_km(unsigned long func, void *param,
+ uint8_t *dest, const uint8_t *src, long src_len,
+ unsigned long *cc)
+{
+ union register_pair d, s;
+
+ *cc = 0;
+ d.even = (unsigned long)dest;
+ s.even = (unsigned long)src;
+ s.odd = (unsigned long)src_len;
+ asm volatile(
+ " lgr 0,%[fc]\n"
+ " lgr 1,%[pba]\n"
+ "0: .insn rre,%[opc] << 16,%[dst],%[src]\n"
+ " brc 1,0b\n" /* handle partial completion */
+ " brc 8,2f\n"
+ " brc 4,1f\n"
+ " agsi %[__cc],1\n"
+ "1: agsi %[__cc],1\n"
+ "2:\n"
+ : [src] "+&d" (s.pair), [dst] "+&d" (d.pair), [__cc] "+Q" (*cc)
+ : [fc] "d" (func), [pba] "d" ((unsigned long)param),
+ [opc] "i" (CPACF_KM)
+ : "cc", "memory", "0", "1");
+
+ return src_len - s.odd;
+}
+
+/**
+ * cpacf_kmc() - executes the KMC instruction
+ * @func: the function code passed to KM; see CPACF_KMC_xxx defines
+ * @param: address of parameter block; see POP for details on each func
+ * @dest: address of destination memory area
+ * @src: address of source memory area
+ * @src_len: length of src operand in bytes
+ *
+ * Returns 0 for the query func, number of processed bytes for
+ * encryption/decryption funcs
+ */
+static inline int cpacf_kmc(unsigned long func, void *param,
+ uint8_t *dest, const uint8_t *src, long src_len,
+ unsigned long *cc)
+{
+ union register_pair d, s;
+
+ *cc = 0;
+ d.even = (unsigned long)dest;
+ s.even = (unsigned long)src;
+ s.odd = (unsigned long)src_len;
+ asm volatile(
+ " lgr 0,%[fc]\n"
+ " lgr 1,%[pba]\n"
+ "0: .insn rre,%[opc] << 16,%[dst],%[src]\n"
+ " brc 1,0b\n" /* handle partial completion */
+ " brc 8,2f\n"
+ " brc 4,1f\n"
+ " agsi %[__cc],1\n"
+ "1: agsi %[__cc],1\n"
+ "2:\n"
+ : [src] "+&d" (s.pair), [dst] "+&d" (d.pair), [__cc] "+Q" (*cc)
+ : [fc] "d" (func), [pba] "d" ((unsigned long)param),
+ [opc] "i" (CPACF_KMC)
+ : "cc", "memory", "0", "1");
+
+ return src_len - s.odd;
+}
+
+/**
+ * cpacf_kimd() - executes the KIMD instruction
+ * @func: the function code passed to KM; see CPACF_KIMD_xxx defines
+ * @param: address of parameter block; see POP for details on each func
+ * @src: address of source memory area
+ * @src_len: length of src operand in bytes
+ */
+static inline void cpacf_kimd(unsigned long func, void *param,
+ const uint8_t *src, long src_len,
+ unsigned long *cc)
+{
+ union register_pair s;
+
+ *cc = 0;
+ s.even = (unsigned long)src;
+ s.odd = (unsigned long)src_len;
+ asm volatile(
+ " lgr 0,%[fc]\n"
+ " lgr 1,%[pba]\n"
+ "0: .insn rre,%[opc] << 16,0,%[src]\n"
+ " brc 1,0b\n" /* handle partial completion */
+ " brc 8,2f\n"
+ " brc 4,1f\n"
+ " agsi %[__cc],1\n"
+ "1: agsi %[__cc],1\n"
+ "2:\n"
+ : [src] "+&d" (s.pair), [__cc] "+Q" (*cc)
+ : [fc] "d" (func), [pba] "d" ((unsigned long)(param)),
+ [opc] "i" (CPACF_KIMD)
+ : "cc", "memory", "0", "1");
+}
+
+/**
+ * cpacf_klmd() - executes the KLMD instruction
+ * @func: the function code passed to KM; see CPACF_KLMD_xxx defines
+ * @param: address of parameter block; see POP for details on each func
+ * @src: address of source memory area
+ * @src_len: length of src operand in bytes
+ */
+static inline void cpacf_klmd(unsigned long func, void *param,
+ const uint8_t *src, long src_len,
+ uint8_t *dest, long dest_len,
+ unsigned long *cc)
+{
+ union register_pair s, d;
+
+ *cc = 0;
+ s.even = (unsigned long)src;
+ s.odd = (unsigned long)src_len;
+ d.even = (unsigned long)dest;
+ d.odd = (unsigned long)dest_len;
+ asm volatile(
+ " lgr 0,%[fc]\n"
+ " lgr 1,%[pba]\n"
+ "0: .insn rre,%[opc] << 16,%[dst],%[src]\n"
+ " brc 1,0b\n" /* handle partial completion */
+ " brc 8,2f\n"
+ " brc 4,1f\n"
+ " agsi %[__cc],1\n"
+ "1: agsi %[__cc],1\n"
+ "2:\n"
+ : [src] "+&d" (s.pair), [dst] "+&d" (d.pair), [__cc] "+Q" (*cc)
+ : [fc] "d" (func), [pba] "d" ((unsigned long)param),
+ [opc] "i" (CPACF_KLMD)
+ : "cc", "memory", "0", "1");
+}
+
+/**
+ * cpacf_kmac() - executes the KMAC instruction
+ * @func: the function code passed to KM; see CPACF_KMAC_xxx defines
+ * @param: address of parameter block; see POP for details on each func
+ * @src: address of source memory area
+ * @src_len: length of src operand in bytes
+ *
+ * Returns 0 for the query func, number of processed bytes for digest funcs
+ */
+static inline int cpacf_kmac(unsigned long func, void *param,
+ const uint8_t *src, long src_len,
+ unsigned long *cc)
+{
+ union register_pair s;
+
+ *cc = 0;
+ s.even = (unsigned long)src;
+ s.odd = (unsigned long)src_len;
+ asm volatile(
+ " lgr 0,%[fc]\n"
+ " lgr 1,%[pba]\n"
+ "0: .insn rre,%[opc] << 16,0,%[src]\n"
+ " brc 1,0b\n" /* handle partial completion */
+ " brc 8,2f\n"
+ " brc 4,1f\n"
+ " agsi %[__cc],1\n"
+ "1: agsi %[__cc],1\n"
+ "2:\n"
+ : [src] "+&d" (s.pair), [__cc] "+Q" (*cc)
+ : [fc] "d" (func), [pba] "d" ((unsigned long)param),
+ [opc] "i" (CPACF_KMAC)
+ : "cc", "memory", "0", "1");
+
+ return src_len - s.odd;
+}
+
+static inline int cpacf_kmac_x(unsigned long *func, void *param,
+ const uint8_t *src, long src_len,
+ unsigned long *cc)
+{
+ union register_pair s;
+ unsigned long fc = *func;
+
+ *cc = 0;
+ s.even = (unsigned long)src;
+ s.odd = (unsigned long)src_len;
+ asm volatile(
+ " lgr 0,%[fc]\n"
+ " lgr 1,%[pba]\n"
+ "0: .insn rre,%[opc] << 16,0,%[src]\n"
+ " brc 1,0b\n" /* handle partial completion */
+ " brc 8,2f\n"
+ " brc 4,1f\n"
+ " agsi %[__cc],1\n"
+ "1: agsi %[__cc],1\n"
+ "2: lgr %[fc],0\n"
+ : [fc] "+d" (fc), [src] "+&d" (s.pair), [__cc] "+Q" (*cc)
+ : [pba] "d" ((unsigned long)param),
+ [opc] "i" (CPACF_KMAC)
+ : "cc", "memory", "0", "1");
+
+ *func = fc;
+
+ return src_len - s.odd;
+}
+
+/**
+ * cpacf_kmctr() - executes the KMCTR instruction
+ * @func: the function code passed to KMCTR; see CPACF_KMCTR_xxx defines
+ * @param: address of parameter block; see POP for details on each func
+ * @dest: address of destination memory area
+ * @src: address of source memory area
+ * @src_len: length of src operand in bytes
+ * @counter: address of counter value
+ *
+ * Returns 0 for the query func, number of processed bytes for
+ * encryption/decryption funcs
+ */
+static inline int cpacf_kmctr(unsigned long func, void *param, uint8_t *dest,
+ const uint8_t *src, long src_len,
+ uint8_t *counter, unsigned long *cc)
+{
+ union register_pair d, s, c;
+
+ *cc = 0;
+ d.even = (unsigned long)dest;
+ s.even = (unsigned long)src;
+ s.odd = (unsigned long)src_len;
+ c.even = (unsigned long)counter;
+ asm volatile(
+ " lgr 0,%[fc]\n"
+ " lgr 1,%[pba]\n"
+ "0: .insn rrf,%[opc] << 16,%[dst],%[src],%[ctr],0\n"
+ " brc 1,0b\n" /* handle partial completion */
+ " brc 8,2f\n"
+ " brc 4,1f\n"
+ " agsi %[__cc],1\n"
+ "1: agsi %[__cc],1\n"
+ "2:\n"
+ : [src] "+&d" (s.pair), [dst] "+&d" (d.pair),
+ [ctr] "+&d" (c.pair), [__cc] "+Q" (*cc)
+ : [fc] "d" (func), [pba] "d" ((unsigned long)param),
+ [opc] "i" (CPACF_KMCTR)
+ : "cc", "memory", "0", "1");
+
+ return src_len - s.odd;
+}
+
+/**
+ * cpacf_prno() - executes the PRNO instruction
+ * @func: the function code passed to PRNO; see CPACF_PRNO_xxx defines
+ * @param: address of parameter block; see POP for details on each func
+ * @dest: address of destination memory area
+ * @dest_len: size of destination memory area in bytes
+ * @seed: address of seed data
+ * @seed_len: size of seed data in bytes
+ */
+static inline void cpacf_prno(unsigned long func, void *param,
+ uint8_t *dest, unsigned long dest_len,
+ const uint8_t *seed, unsigned long seed_len,
+ unsigned long *cc)
+{
+ union register_pair d, s;
+
+ *cc = 0;
+ d.even = (unsigned long)dest;
+ d.odd = (unsigned long)dest_len;
+ s.even = (unsigned long)seed;
+ s.odd = (unsigned long)seed_len;
+ asm volatile (
+ " lgr 0,%[fc]\n"
+ " lgr 1,%[pba]\n"
+ "0: .insn rre,%[opc] << 16,%[dst],%[seed]\n"
+ " brc 1,0b\n" /* handle partial completion */
+ " brc 8,2f\n"
+ " brc 4,1f\n"
+ " agsi %[__cc],1\n"
+ "1: agsi %[__cc],1\n"
+ "2:\n"
+ : [dst] "+&d" (d.pair), [__cc] "+Q" (*cc)
+ : [fc] "d" (func), [pba] "d" ((unsigned long)param),
+ [seed] "d" (s.pair), [opc] "i" (CPACF_PRNO)
+ : "cc", "memory", "0", "1");
+}
+
+/**
+ * cpacf_trng() - executes the TRNG subfunction of the PRNO instruction
+ * @ucbuf: buffer for unconditioned data
+ * @ucbuf_len: amount of unconditioned data to fetch in bytes
+ * @cbuf: buffer for conditioned data
+ * @cbuf_len: amount of conditioned data to fetch in bytes
+ */
+static inline void cpacf_trng(uint8_t *ucbuf, unsigned long ucbuf_len,
+ uint8_t *cbuf, unsigned long cbuf_len,
+ unsigned long *cc)
+{
+ union register_pair u, c;
+
+ *cc = 0;
+ u.even = (unsigned long)ucbuf;
+ u.odd = (unsigned long)ucbuf_len;
+ c.even = (unsigned long)cbuf;
+ c.odd = (unsigned long)cbuf_len;
+ asm volatile (
+ " lghi 0,%[fc]\n"
+ "0: .insn rre,%[opc] << 16,%[ucbuf],%[cbuf]\n"
+ " brc 1,0b\n" /* handle partial completion */
+ " brc 8,2f\n"
+ " brc 4,1f\n"
+ " agsi %[__cc],1\n"
+ "1: agsi %[__cc],1\n"
+ "2:\n"
+ : [ucbuf] "+&d" (u.pair), [cbuf] "+&d" (c.pair),
+ [__cc] "+Q" (*cc)
+ : [fc] "K" (CPACF_PRNO_TRNG), [opc] "i" (CPACF_PRNO)
+ : "cc", "memory", "0");
+}
+
+/**
+ * cpacf_pcc() - executes the PCC instruction
+ * @func: the function code passed to PCC; see CPACF_KM_xxx defines
+ * @param: address of parameter block; see POP for details on each func
+ */
+static inline void cpacf_pcc(unsigned long func, void *param, unsigned long *cc)
+{
+ *cc = 0;
+ asm volatile(
+ " lgr 0,%[fc]\n"
+ " lgr 1,%[pba]\n"
+ "0: .insn rre,%[opc] << 16,0,0\n" /* PCC opcode */
+ " brc 1,0b\n" /* handle partial completion */
+ " brc 8,2f\n"
+ " brc 4,1f\n"
+ " agsi %[__cc],1\n"
+ "1: agsi %[__cc],1\n"
+ "2:\n"
+ : [__cc] "+Q" (*cc)
+ : [fc] "d" (func), [pba] "d" ((unsigned long)param),
+ [opc] "i" (CPACF_PCC)
+ : "cc", "memory", "0", "1");
+}
+
+/**
+ * cpacf_pckmo() - executes the PCKMO instruction
+ * @func: the function code passed to PCKMO; see CPACF_PCKMO_xxx defines
+ * @param: address of parameter block; see POP for details on each func
+ */
+static inline void cpacf_pckmo(long func, void *param)
+{
+ asm volatile(
+ " lgr 0,%[fc]\n"
+ " lgr 1,%[pba]\n"
+ " .insn rre,%[opc] << 16,0,0\n" /* PCKMO opcode */
+ :
+ : [fc] "d" (func), [pba] "d" ((unsigned long)param),
+ [opc] "i" (CPACF_PCKMO)
+ : "cc", "memory", "0", "1");
+}
+
+/**
+ * cpacf_kma() - executes the KMA instruction
+ * @func: the function code passed to KMA; see CPACF_KMA_xxx defines
+ * @param: address of parameter block; see POP for details on each func
+ * @dest: address of destination memory area
+ * @src: address of source memory area
+ * @src_len: length of src operand in bytes
+ * @aad: address of additional authenticated data memory area
+ * @aad_len: length of aad operand in bytes
+ */
+static inline void cpacf_kma(unsigned long func, void *param, uint8_t *dest,
+ const uint8_t *src, unsigned long src_len,
+ const uint8_t *aad, unsigned long aad_len,
+ unsigned long *cc)
+{
+ union register_pair d, s, a;
+
+ *cc = 0;
+ d.even = (unsigned long)dest;
+ s.even = (unsigned long)src;
+ s.odd = (unsigned long)src_len;
+ a.even = (unsigned long)aad;
+ a.odd = (unsigned long)aad_len;
+ asm volatile(
+ " lgr 0,%[fc]\n"
+ " lgr 1,%[pba]\n"
+ "0: .insn rrf,%[opc] << 16,%[dst],%[src],%[aad],0\n"
+ " brc 1,0b\n" /* handle partial completion */
+ " brc 8,2f\n"
+ " brc 4,1f\n"
+ " agsi %[__cc],1\n"
+ "1: agsi %[__cc],1\n"
+ "2:\n"
+ : [dst] "+&d" (d.pair), [src] "+&d" (s.pair),
+ [aad] "+&d" (a.pair), [__cc] "+Q" (*cc)
+ : [fc] "d" (func), [pba] "d" ((unsigned long)param),
+ [opc] "i" (CPACF_KMA)
+ : "cc", "memory", "0", "1");
+}
+
+/**
+ * cpacf_kmf() - executes the KMF instruction
+ * @func: the function code passed to KMF; see CPACF_KMF_xxx defines
+ * @param: address of parameter block; see POP for details on each func
+ * @dest: address of destination memory area
+ * @src: address of source memory area
+ * @src_len: length of src operand in bytes
+ *
+ * Returns 0 for the query func, number of processed bytes for
+ * encryption/decryption funcs
+ */
+static inline int cpacf_kmf(unsigned long func, void *param,
+ uint8_t *dest, const uint8_t *src, long src_len,
+ unsigned long *cc)
+{
+ union register_pair d, s;
+
+ *cc = 0;
+ d.even = (unsigned long)dest;
+ s.even = (unsigned long)src;
+ s.odd = (unsigned long)src_len;
+ asm volatile(
+ " lgr 0,%[fc]\n"
+ " lgr 1,%[pba]\n"
+ "0: .insn rre,%[opc] << 16,%[dst],%[src]\n"
+ " brc 1,0b\n" /* handle partial completion */
+ " brc 8,2f\n"
+ " brc 4,1f\n"
+ " agsi %[__cc],1\n"
+ "1: agsi %[__cc],1\n"
+ "2:\n"
+ : [src] "+&d" (s.pair), [dst] "+&d" (d.pair), [__cc] "+Q" (*cc)
+ : [fc] "d" (func), [pba] "d" ((unsigned long)param),
+ [opc] "i" (CPACF_KMF)
+ : "cc", "memory", "0", "1");
+
+ return src_len - s.odd;
+}
+
+/**
+ * cpacf_kmo() - executes the KMO instruction
+ * @func: the function code passed to KMO; see CPACF_KMO_xxx defines
+ * @param: address of parameter block; see POP for details on each func
+ * @dest: address of destination memory area
+ * @src: address of source memory area
+ * @src_len: length of src operand in bytes
+ *
+ * Returns 0 for the query func, number of processed bytes for
+ * encryption/decryption funcs
+ */
+static inline int cpacf_kmo(unsigned long func, void *param,
+ uint8_t *dest, const uint8_t *src, long src_len,
+ unsigned long *cc)
+{
+ union register_pair d, s;
+
+ *cc = 0;
+ d.even = (unsigned long)dest;
+ s.even = (unsigned long)src;
+ s.odd = (unsigned long)src_len;
+ asm volatile(
+ " lgr 0,%[fc]\n"
+ " lgr 1,%[pba]\n"
+ "0: .insn rre,%[opc] << 16,%[dst],%[src]\n"
+ " brc 1,0b\n" /* handle partial completion */
+ " brc 8,2f\n"
+ " brc 4,1f\n"
+ " agsi %[__cc],1\n"
+ "1: agsi %[__cc],1\n"
+ "2:\n"
+ : [src] "+&d" (s.pair), [dst] "+&d" (d.pair), [__cc] "+Q" (*cc)
+ : [fc] "d" (func), [pba] "d" ((unsigned long)param),
+ [opc] "i" (CPACF_KMO)
+ : "cc", "memory", "0", "1");
+
+ return src_len - s.odd;
+}
+
+/**
+ * cpacf_kdsa() - executes the KDSA instruction
+ * @func: the function code passed to KDSA; see CPACF_KDSA_xxx defines
+ * @param: address of parameter block; see POP for details on each func
+ * @src: address of source memory area
+ * @src_len: length of src operand in bytes
+ *
+ * Returns 0 for the query func, otherwise the condition code is checked
+ * and 0 returned on cc 0, otherwise a value != 0 to indicate failure.
+ */
+static inline int cpacf_kdsa(unsigned long func, void *param,
+ const uint8_t *src, long src_len,
+ unsigned long *cc)
+{
+ union register_pair s;
+
+ *cc = 0;
+ s.even = (unsigned long)src;
+ s.odd = (unsigned long)src_len;
+ asm volatile(
+ " lgr 0,%[fc]\n"
+ " lgr 1,%[pba]\n"
+ "0: .insn rre,%[opc] << 16,0,%[src]\n"
+ " brc 1,0b\n" /* handle partial completion */
+ " brc 8,2f\n"
+ " brc 4,1f\n"
+ " agsi %[__cc],1\n"
+ "1: agsi %[__cc],1\n"
+ "2:\n"
+ : [src] "+&d" (s.pair), [__cc] "+Q" (*cc)
+ : [fc] "d" (func), [pba] "d" ((unsigned long)param),
+ [opc] "i" (CPACF_KDSA)
+ : "cc", "memory", "0", "1");
+
+ return (int)(*cc != 0);
+}
+
+#endif /* _S390_CPACF_H_ */
diff --git a/tests/tcg/s390x/meson.build b/tests/tcg/s390x/meson.build
index c9af66aa1b..57ea6c5ca5 100644
--- a/tests/tcg/s390x/meson.build
+++ b/tests/tcg/s390x/meson.build
@@ -74,6 +74,16 @@ tests += {
'ts.c': {},
'ex-smc.c': {'cflags': ['-Wl,--no-warn-rwx-segments']},
'load-store-reversed.c': {},
+ 'cpacf-kdsa.c': {},
+ 'cpacf-kimd.c': {},
+ 'cpacf-klmd.c': {},
+ 'cpacf-km.c': {},
+ 'cpacf-kmac.c': {},
+ 'cpacf-kmc.c': {},
+ 'cpacf-kmctr.c': {},
+ 'cpacf-pcc.c': {},
+ 'cpacf-pckmo.c': {},
+ 'cpacf-prno.c': {},
}
foreach src: tests_s390x_pgm
--
2.55.0
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PULL 21/33] hw/s390x/ipl: Add secure boot support to PCI dev IPLB builder
2026-09-21 20:07 [PULL 00/33] s390x queue for 11.2 Eric Farman
` (19 preceding siblings ...)
2026-09-21 20:08 ` [PULL 20/33] tests/tcg/s390x: Add tests for CPACF instructions Eric Farman
@ 2026-09-21 20:08 ` Eric Farman
2026-09-21 20:08 ` [PULL 22/33] tests/functional/s390x/test_secure_ipl: Skip test if SIPL not supported by hypervisor Eric Farman
` (12 subsequent siblings)
33 siblings, 0 replies; 35+ messages in thread
From: Eric Farman @ 2026-09-21 20:08 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-s390x, Matthew Rosato, Cornelia Huck, Joshua Daley,
Eric Farman
From: Joshua Daley <jdaley@linux.ibm.com>
In the PCI boot device case of s390_build_iplb(), call
s390_apply_secure_boot() to update the IPLB when secure boot or audit
mode are enabled.
Secure IPL is now supported for virtio-blk-pci boot devices.
Signed-off-by: Joshua Daley <jdaley@linux.ibm.com>
Reviewed-by: Jared Rossi <jrossi@linux.ibm.com>
Reviewed-by: Zhuoying Cai <zycai@linux.ibm.com>
Reviewed-by: Matthew Rosato <mjrosato@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260903155805.1881366-2-jdaley@linux.ibm.com
Signed-off-by: Eric Farman <farman@linux.ibm.com>
---
hw/s390x/ipl.c | 8 +++-----
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/hw/s390x/ipl.c b/hw/s390x/ipl.c
index d59ed36c78..b0da3cbb27 100644
--- a/hw/s390x/ipl.c
+++ b/hw/s390x/ipl.c
@@ -599,11 +599,6 @@ static bool s390_build_iplb(DeviceState *dev_st, IplParameterBlock *iplb)
pbdev = s390_get_pci_device(dev_st, &devtype);
if (pbdev) {
- if (s390_secure_boot_enabled() || s390_has_certificate()) {
- error_report("Virtio pci boot device does not support secure boot!");
- exit(1);
- }
-
pci_lp = object_property_get_str(OBJECT(pbdev->pdev), "loadparm", NULL);
if (pci_lp && strlen(pci_lp) > 0) {
lp = pci_lp;
@@ -625,6 +620,9 @@ static bool s390_build_iplb(DeviceState *dev_st, IplParameterBlock *iplb)
s390_ipl_convert_loadparm((char *)lp, iplb->loadparm);
iplb->flags |= DIAG308_FLAGS_LP_VALID;
+ s390_apply_secure_boot(iplb, devtype, s390_secure_boot_enabled(),
+ s390_has_certificate());
+
return true;
}
--
2.55.0
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PULL 22/33] tests/functional/s390x/test_secure_ipl: Skip test if SIPL not supported by hypervisor
2026-09-21 20:07 [PULL 00/33] s390x queue for 11.2 Eric Farman
` (20 preceding siblings ...)
2026-09-21 20:08 ` [PULL 21/33] hw/s390x/ipl: Add secure boot support to PCI dev IPLB builder Eric Farman
@ 2026-09-21 20:08 ` Eric Farman
2026-09-21 20:08 ` [PULL 23/33] tests/functional/s390x/test_secure_ipl: Add virtio-blk-pci boot dev case Eric Farman
` (11 subsequent siblings)
33 siblings, 0 replies; 35+ messages in thread
From: Eric Farman @ 2026-09-21 20:08 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-s390x, Matthew Rosato, Cornelia Huck, Joshua Daley,
Eric Farman
From: Joshua Daley <jdaley@linux.ibm.com>
Currently, if secure IPL is not supported by the hypervisor, the test
will fail because "Verified component" never appears. One must inspect
the console log to observe the cause of the failure.
Add a check that skips the test if the host CPU model is missing the
secure IPL facilities.
Signed-off-by: Joshua Daley <jdaley@linux.ibm.com>
Reviewed-by: Jared Rossi <jrossi@linux.ibm.com>
Reviewed-by: Matthew Rosato <mjrosato@linux.ibm.com>
Reviewed-by: Zhuoying Cai <zycai@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260903155805.1881366-3-jdaley@linux.ibm.com
Signed-off-by: Eric Farman <farman@linux.ibm.com>
---
tests/functional/s390x/test_secure_ipl.py | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/tests/functional/s390x/test_secure_ipl.py b/tests/functional/s390x/test_secure_ipl.py
index 06fc93e404..5af36b91d8 100755
--- a/tests/functional/s390x/test_secure_ipl.py
+++ b/tests/functional/s390x/test_secure_ipl.py
@@ -29,6 +29,22 @@ def __init__(self, *args, **kwargs):
self.cert_path = None
self.prompt = None
+ def _require_host_secure_ipl_support(self, vm):
+ """
+ Skip the test if the host CPU model does not expose the Secure IPL
+ facilities (sipl, sclaf, cstore).
+ """
+ props = vm.cmd('query-cpu-model-expansion',
+ model={'name': 'host'},
+ type='full')['model']['props']
+ missing = [f for f in ('sipl', 'sclaf', 'cstore')
+ if not props.get(f)]
+ if missing:
+ self.skipTest(
+ f"Host CPU does not support Secure IPL: "
+ f"missing feature(s): {', '.join(missing)}. "
+ f"Secure IPL requires a z16+ host.")
+
def _create_certificate(self, vm):
"""Generate x509 certificate"""
exec_command_and_wait_for_pattern(self,
@@ -107,6 +123,8 @@ def setup_s390x_secure_ipl(self):
'-device', 'virtio-blk-ccw,drive=drive0,bootindex=1')
temp_vm.launch()
+ self._require_host_secure_ipl_support(temp_vm)
+
# Initial root account setup (Fedora first boot screen)
self.root_password = 'fedora40password'
wait_for_console_pattern(self, 'Please make a selection from the above',
--
2.55.0
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PULL 23/33] tests/functional/s390x/test_secure_ipl: Add virtio-blk-pci boot dev case
2026-09-21 20:07 [PULL 00/33] s390x queue for 11.2 Eric Farman
` (21 preceding siblings ...)
2026-09-21 20:08 ` [PULL 22/33] tests/functional/s390x/test_secure_ipl: Skip test if SIPL not supported by hypervisor Eric Farman
@ 2026-09-21 20:08 ` Eric Farman
2026-09-21 20:08 ` [PULL 24/33] pc-bios/s390-ccw: Check if a PCI function is already enabled before trying to enable it Eric Farman
` (10 subsequent siblings)
33 siblings, 0 replies; 35+ messages in thread
From: Eric Farman @ 2026-09-21 20:08 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-s390x, Matthew Rosato, Cornelia Huck, Joshua Daley,
Eric Farman
From: Joshua Daley <jdaley@linux.ibm.com>
Split test_s390x_secure_ipl() into two subtests. Each tests with a
different boot device: virtio-blk-ccw or virtio-blk-pci. Use class-level
variables and a temporary shared workdir such that the time-consuming
setup is not run multiple times.
Signed-off-by: Joshua Daley <jdaley@linux.ibm.com>
Reviewed-by: Matthew Rosato <mjrosato@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260903155805.1881366-4-jdaley@linux.ibm.com
Signed-off-by: Eric Farman <farman@linux.ibm.com>
---
tests/functional/s390x/test_secure_ipl.py | 139 +++++++++++++++-------
1 file changed, 95 insertions(+), 44 deletions(-)
diff --git a/tests/functional/s390x/test_secure_ipl.py b/tests/functional/s390x/test_secure_ipl.py
index 5af36b91d8..461d73c0d7 100755
--- a/tests/functional/s390x/test_secure_ipl.py
+++ b/tests/functional/s390x/test_secure_ipl.py
@@ -8,6 +8,9 @@
secure-boot enabled, and verifying cryptographic validation results.
"""
+import os
+import shutil
+import tempfile
from subprocess import check_call, DEVNULL
from qemu_test import QemuSystemTest, Asset, get_qemu_img
@@ -22,12 +25,25 @@ class S390xSecureIpl(QemuSystemTest):
'Fedora-Server-KVM-40-1.14.s390x.qcow2'),
'091c232a7301be14e19c76ce9a0c1cbd2be2c4157884a731e1fc4f89e7455a5f')
- def __init__(self, *args, **kwargs):
- super().__init__(*args, **kwargs)
- self.root_password = None
- self.qcow2_path = None
- self.cert_path = None
- self.prompt = None
+ _shared_workdir = None
+ _root_password = None
+ _qcow2_path = None
+ _cert_path = None
+ _prompt = None
+ _setup_done = None
+ _host_lacks_sipl_support = False
+
+ @classmethod
+ def setUpClass(cls):
+ super().setUpClass()
+ cls._shared_workdir = tempfile.mkdtemp(prefix='qemu_sipl_')
+
+ @classmethod
+ def tearDownClass(cls):
+ if cls._shared_workdir is not None:
+ shutil.rmtree(cls._shared_workdir, ignore_errors=True)
+ cls._shared_workdir = None
+ super().tearDownClass()
def _require_host_secure_ipl_support(self, vm):
"""
@@ -40,6 +56,7 @@ def _require_host_secure_ipl_support(self, vm):
missing = [f for f in ('sipl', 'sclaf', 'cstore')
if not props.get(f)]
if missing:
+ S390xSecureIpl._host_lacks_sipl_support = True
self.skipTest(
f"Host CPU does not support Secure IPL: "
f"missing feature(s): {', '.join(missing)}. "
@@ -62,7 +79,7 @@ def _sign_binaries(self, vm):
exec_command_and_wait_for_pattern(self,
'sudo dnf install kernel-devel-$(uname -r) -y',
'Complete!', vm=vm)
- wait_for_console_pattern(self, self.prompt, vm=vm)
+ wait_for_console_pattern(self, S390xSecureIpl._prompt, vm=vm)
exec_command_and_wait_for_pattern(self,
'ls /usr/src/kernels/$(uname -r)/scripts/',
'sign-file', vm=vm)
@@ -71,11 +88,11 @@ def _sign_binaries(self, vm):
exec_command(self, '/usr/src/kernels/$(uname -r)/scripts/sign-file '
'sha256 mykey.pem mycert.pem /lib/s390-tools/stage3.bin',
vm=vm)
- wait_for_console_pattern(self, self.prompt, vm=vm)
+ wait_for_console_pattern(self, S390xSecureIpl._prompt, vm=vm)
exec_command(self, '/usr/src/kernels/$(uname -r)/scripts/sign-file '
'sha256 mykey.pem mycert.pem /boot/vmlinuz-$(uname -r)',
vm=vm)
- wait_for_console_pattern(self, self.prompt, vm=vm)
+ wait_for_console_pattern(self, S390xSecureIpl._prompt, vm=vm)
def _run_zipl_secure(self, vm):
"""Run zipl to prepare for secure boot"""
@@ -91,10 +108,11 @@ def _extract_certificate(self, vm):
cert = "\n".join(out.decode("utf-8").splitlines()[1:])
self.log.info("%s", cert)
- self.cert_path = self.scratch_file("mycert.pem")
+ cert_path = os.path.join(S390xSecureIpl._shared_workdir, "mycert.pem")
- with open(self.cert_path, 'w', encoding="utf-8") as file_object:
+ with open(cert_path, 'w', encoding="utf-8") as file_object:
file_object.write(cert)
+ S390xSecureIpl._cert_path = cert_path
def setup_s390x_secure_ipl(self):
"""
@@ -109,39 +127,42 @@ def setup_s390x_secure_ipl(self):
temp_vm.set_machine('s390-ccw-virtio')
asset_path = self.ASSET_F40_QCOW2.fetch()
- self.qcow2_path = self.scratch_file('f40.qcow2')
+ qcow2_path = os.path.join(S390xSecureIpl._shared_workdir, 'f40.qcow2')
qemu_img = get_qemu_img(self)
check_call([qemu_img, 'create', '-f', 'qcow2', '-b', asset_path,
- '-F', 'qcow2', self.qcow2_path], stdout=DEVNULL, stderr=DEVNULL)
+ '-F', 'qcow2', qcow2_path], stdout=DEVNULL, stderr=DEVNULL)
+ S390xSecureIpl._qcow2_path = qcow2_path
temp_vm.set_console()
temp_vm.add_args('-nographic',
'-accel', 'kvm',
'-m', '1024',
'-drive',
- f'id=drive0,if=none,format=qcow2,file={self.qcow2_path}',
+ f'id=drive0,if=none,format=qcow2,file={qcow2_path}',
'-device', 'virtio-blk-ccw,drive=drive0,bootindex=1')
temp_vm.launch()
self._require_host_secure_ipl_support(temp_vm)
# Initial root account setup (Fedora first boot screen)
- self.root_password = 'fedora40password'
+ S390xSecureIpl._root_password = 'fedora40password'
wait_for_console_pattern(self, 'Please make a selection from the above',
vm=temp_vm)
exec_command_and_wait_for_pattern(self, '4', 'Password:', vm=temp_vm)
- exec_command_and_wait_for_pattern(self, self.root_password,
+ exec_command_and_wait_for_pattern(self, S390xSecureIpl._root_password,
'Password (confirm):', vm=temp_vm)
- exec_command_and_wait_for_pattern(self, self.root_password,
+ exec_command_and_wait_for_pattern(self, S390xSecureIpl._root_password,
'Please make a selection from the above',
vm=temp_vm)
# Login as root
- self.prompt = '[root@localhost ~]#'
- exec_command_and_wait_for_pattern(self, 'c', 'localhost login:', vm=temp_vm)
- exec_command_and_wait_for_pattern(self, 'root', 'Password:', vm=temp_vm)
- exec_command_and_wait_for_pattern(self, self.root_password, self.prompt,
+ S390xSecureIpl._prompt = '[root@localhost ~]#'
+ exec_command_and_wait_for_pattern(self, 'c', 'localhost login:',
vm=temp_vm)
+ exec_command_and_wait_for_pattern(self, 'root', 'Password:',
+ vm=temp_vm)
+ exec_command_and_wait_for_pattern(self, S390xSecureIpl._root_password,
+ S390xSecureIpl._prompt, vm=temp_vm)
self._create_certificate(temp_vm)
self._sign_binaries(temp_vm)
@@ -150,41 +171,71 @@ def setup_s390x_secure_ipl(self):
# Shutdown temp vm
temp_vm.shutdown()
+ S390xSecureIpl._setup_done = True
- @skipBigDataTest()
- def test_s390x_secure_ipl(self):
+ def verify_s390x_secure_ipl(self, boot_dev_bus: str):
"""
Verify secure boot validation during s390x guest boot.
Expects two "Verified component" messages and confirms
/sys/firmware/ipl/secure reports secure boot is active.
"""
- self.require_accelerator('kvm')
- self.setup_s390x_secure_ipl()
-
- self.set_machine('s390-ccw-virtio')
-
- self.vm.set_console()
- self.vm.add_args('-nographic',
- '-machine', 's390-ccw-virtio,secure-boot=on,'
- f'boot-certs.0.path={self.cert_path}',
- '-accel', 'kvm',
- '-m', '1024',
- '-drive',
- f'id=drive1,if=none,format=qcow2,file={self.qcow2_path}',
- '-device', 'virtio-blk-ccw,drive=drive1,bootindex=1')
- self.vm.launch()
+ if boot_dev_bus not in ['ccw', 'pci']:
+ raise ValueError(
+ f"boot_dev_bus must be 'ccw' or 'pci', got {boot_dev_bus}")
+
+ vm = self.get_vm(name=f'sipl_test_vblk_{boot_dev_bus}')
+ vm.set_machine('s390-ccw-virtio')
+
+ vm.set_console()
+ vm.add_args('-nographic',
+ '-machine', 's390-ccw-virtio,secure-boot=on,'
+ f'boot-certs.0.path={S390xSecureIpl._cert_path}',
+ '-accel', 'kvm',
+ '-m', '1024',
+ '-drive',
+ f'id=drive1,if=none,format=qcow2,'
+ f'file={S390xSecureIpl._qcow2_path}',
+ '-device',
+ f'virtio-blk-{boot_dev_bus},drive=drive1,bootindex=1')
+ vm.launch()
# Expect two verified components
verified_output = "Verified component"
- wait_for_console_pattern(self, verified_output)
- wait_for_console_pattern(self, verified_output)
+ wait_for_console_pattern(self, verified_output, vm=vm)
+ wait_for_console_pattern(self, verified_output, vm=vm)
# Login and verify the vm is booted using secure boot
- wait_for_console_pattern(self, 'localhost login:')
- exec_command_and_wait_for_pattern(self, 'root', 'Password:')
- exec_command_and_wait_for_pattern(self, self.root_password, self.prompt)
- exec_command_and_wait_for_pattern(self, 'cat /sys/firmware/ipl/secure', '1')
+ wait_for_console_pattern(self, 'localhost login:', vm=vm)
+ exec_command_and_wait_for_pattern(self, 'root', 'Password:', vm=vm)
+ exec_command_and_wait_for_pattern(
+ self, S390xSecureIpl._root_password, S390xSecureIpl._prompt, vm=vm)
+ exec_command_and_wait_for_pattern(
+ self, 'cat /sys/firmware/ipl/secure', '1', vm=vm)
+
+ vm.shutdown()
+
+ @skipBigDataTest()
+ def test_s390x_secure_ipl_ccw(self):
+ """Test secure IPL with a virtio-blk-ccw boot device."""
+ self.require_accelerator('kvm')
+ if S390xSecureIpl._host_lacks_sipl_support:
+ self.skipTest("Host CPU does not support Secure IPL. "
+ "Secure IPL requires a z16+ host.")
+ if not S390xSecureIpl._setup_done:
+ self.setup_s390x_secure_ipl()
+ self.verify_s390x_secure_ipl('ccw')
+
+ @skipBigDataTest()
+ def test_s390x_secure_ipl_pci(self):
+ """Test secure IPL with a virtio-blk-pci boot device."""
+ self.require_accelerator('kvm')
+ if S390xSecureIpl._host_lacks_sipl_support:
+ self.skipTest("Host CPU does not support Secure IPL. "
+ "Secure IPL requires a z16+ host.")
+ if not S390xSecureIpl._setup_done:
+ self.setup_s390x_secure_ipl()
+ self.verify_s390x_secure_ipl('pci')
if __name__ == '__main__':
QemuSystemTest.main()
--
2.55.0
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PULL 24/33] pc-bios/s390-ccw: Check if a PCI function is already enabled before trying to enable it
2026-09-21 20:07 [PULL 00/33] s390x queue for 11.2 Eric Farman
` (22 preceding siblings ...)
2026-09-21 20:08 ` [PULL 23/33] tests/functional/s390x/test_secure_ipl: Add virtio-blk-pci boot dev case Eric Farman
@ 2026-09-21 20:08 ` Eric Farman
2026-09-21 20:08 ` [PULL 25/33] hw/s390x/ipl: Fix incorrect PCI IPL block lengths Eric Farman
` (9 subsequent siblings)
33 siblings, 0 replies; 35+ messages in thread
From: Eric Farman @ 2026-09-21 20:08 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-s390x, Matthew Rosato, Cornelia Huck, Jared Rossi,
Eric Farman
From: Jared Rossi <jrossi@linux.ibm.com>
Enabling a PCI function that is already configured will result in an error.
Simply check if the device has already been enabled, and if so, return
without doing anything further; otherwise, enable it as usual.
Also, because enable_pci_function() prints its own message, let's remove
the duplicate message emitted during the virtio PCI setup steps.
Reviewed-by: Zhuoying Cai <zycai@linux.ibm.com>
Reviewed-by: Eric Farman <farman@linux.ibm.com>
Signed-off-by: Jared Rossi <jrossi@linux.ibm.com>
Reviewed-by: Jason J. Herne <jjherne@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260831194919.3830270-2-jrossi@linux.ibm.com
Signed-off-by: Eric Farman <farman@linux.ibm.com>
---
pc-bios/s390-ccw/clp.c | 4 ++++
pc-bios/s390-ccw/virtio-pci.c | 1 -
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/pc-bios/s390-ccw/clp.c b/pc-bios/s390-ccw/clp.c
index ca9565d8de..7917f13345 100644
--- a/pc-bios/s390-ccw/clp.c
+++ b/pc-bios/s390-ccw/clp.c
@@ -82,6 +82,10 @@ int enable_pci_function(uint32_t *fhandle)
{
ClpReqRspSetPci rrb;
+ if (*fhandle & CLP_FHLIST_MASK_CONFIG) {
+ return 0; /* already enabled */
+ }
+
rrb.request.hdr.len = sizeof(ClpReqSetPci);
rrb.request.hdr.cmd = 0x05;
rrb.request.fh = *fhandle;
diff --git a/pc-bios/s390-ccw/virtio-pci.c b/pc-bios/s390-ccw/virtio-pci.c
index f501252c81..231ab6e04d 100644
--- a/pc-bios/s390-ccw/virtio-pci.c
+++ b/pc-bios/s390-ccw/virtio-pci.c
@@ -452,7 +452,6 @@ int virtio_pci_setup_device(void)
VDev *vdev = virtio_get_device();
if (enable_pci_function(&vdev->pci_fh)) {
- puts("Failed to enable PCI function");
return -ENODEV;
}
--
2.55.0
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PULL 25/33] hw/s390x/ipl: Fix incorrect PCI IPL block lengths
2026-09-21 20:07 [PULL 00/33] s390x queue for 11.2 Eric Farman
` (23 preceding siblings ...)
2026-09-21 20:08 ` [PULL 24/33] pc-bios/s390-ccw: Check if a PCI function is already enabled before trying to enable it Eric Farman
@ 2026-09-21 20:08 ` Eric Farman
2026-09-21 20:08 ` [PULL 26/33] pc-bios/s390-ccw: Use bus specific IPL_TYPE directly for scsi IPL Eric Farman
` (8 subsequent siblings)
33 siblings, 0 replies; 35+ messages in thread
From: Eric Farman @ 2026-09-21 20:08 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-s390x, Matthew Rosato, Cornelia Huck, Jared Rossi,
qemu-stable, Eric Farman
From: Jared Rossi <jrossi@linux.ibm.com>
The length of the PCI IPLB is calculated by size of the IplBlockPci struct
plus the number of bytes used for common IPLB fields.
Fix the S390_IPLB_MIN_PCI_LEN to reflect this, and assign a valid blk0_len
while we are at it.
Cc: qemu-stable@nongnu.org
Fixes: 395116781df5 ("s390x: Build IPLB for virtio-pci devices")
Signed-off-by: Jared Rossi <jrossi@linux.ibm.com>
Reviewed-by: Matthew Rosato <mjrosato@linux.ibm.com>
Reviewed-by: Jason J. Herne <jjherne@linux.ibm.com>
Reviewed-by: Eric Farman <farman@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260831194919.3830270-3-jrossi@linux.ibm.com
Signed-off-by: Eric Farman <farman@linux.ibm.com>
---
hw/s390x/ipl.c | 2 ++
include/hw/s390x/ipl/qipl.h | 2 +-
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/hw/s390x/ipl.c b/hw/s390x/ipl.c
index b0da3cbb27..b2b87beefd 100644
--- a/hw/s390x/ipl.c
+++ b/hw/s390x/ipl.c
@@ -610,6 +610,8 @@ static bool s390_build_iplb(DeviceState *dev_st, IplParameterBlock *iplb)
switch (devtype) {
case PCI_DEVTYPE_VIRTIO:
iplb->len = cpu_to_be32(S390_IPLB_MIN_PCI_LEN);
+ iplb->blk0_len =
+ cpu_to_be32(S390_IPLB_MIN_PCI_LEN - S390_IPLB_HEADER_LEN);
iplb->pbt = S390_IPL_TYPE_PCI;
iplb->pci.fid = cpu_to_be32(pbdev->fid);
break;
diff --git a/include/hw/s390x/ipl/qipl.h b/include/hw/s390x/ipl/qipl.h
index 3fa9649112..69b0023ea3 100644
--- a/include/hw/s390x/ipl/qipl.h
+++ b/include/hw/s390x/ipl/qipl.h
@@ -39,7 +39,7 @@ typedef enum S390IplType S390IplType;
#define S390_IPLB_MIN_PV_LEN 148
#define S390_IPLB_MIN_CCW_LEN 200
#define S390_IPLB_MIN_FCP_LEN 384
-#define S390_IPLB_MIN_PCI_LEN 376
+#define S390_IPLB_MIN_PCI_LEN (offsetof(IplParameterBlock, pci) + sizeof(IplBlockPci))
#define S390_IPLB_MIN_QEMU_SCSI_LEN 200
#define S390_IPLB_MAX_LEN 4096
--
2.55.0
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PULL 26/33] pc-bios/s390-ccw: Use bus specific IPL_TYPE directly for scsi IPL
2026-09-21 20:07 [PULL 00/33] s390x queue for 11.2 Eric Farman
` (24 preceding siblings ...)
2026-09-21 20:08 ` [PULL 25/33] hw/s390x/ipl: Fix incorrect PCI IPL block lengths Eric Farman
@ 2026-09-21 20:08 ` Eric Farman
2026-09-21 20:08 ` [PULL 27/33] s390x/ipl: Add PCI and bus fields to IplBlockQemuScsi Eric Farman
` (7 subsequent siblings)
33 siblings, 0 replies; 35+ messages in thread
From: Eric Farman @ 2026-09-21 20:08 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-s390x, Matthew Rosato, Cornelia Huck, Jared Rossi,
Eric Farman
From: Jared Rossi <jrossi@linux.ibm.com>
All existing switch cases that handle S390_IPL_TYPE_QEMU_SCSI directly fall
through to S390_IPL_TYPE_CCW. Rather than always fall through, reassign
vdev->ipl_type to the appropriate bus for the scsi controller and proceed
as usual, where the bus is designated by the "bus" field and set during
the IPLB build.
Because S390_IPL_TYPE_QEMU_SCSI should not appear as an ipl_type once the
device is found, remove that specific case from other existing switches
and allow it to land in the default case, which will generally result
in an immediate error.
Reviewed-by: Eric Farman <farman@linux.ibm.com>
Signed-off-by: Jared Rossi <jrossi@linux.ibm.com>
Reviewed-by: Jason J. Herne <jjherne@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260831194919.3830270-4-jrossi@linux.ibm.com
Signed-off-by: Eric Farman <farman@linux.ibm.com>
---
pc-bios/s390-ccw/main.c | 13 ++++++++++---
pc-bios/s390-ccw/virtio-blkdev.c | 1 -
pc-bios/s390-ccw/virtio.c | 5 -----
3 files changed, 10 insertions(+), 9 deletions(-)
diff --git a/pc-bios/s390-ccw/main.c b/pc-bios/s390-ccw/main.c
index 8fc1cbf653..6ab2b8f75b 100644
--- a/pc-bios/s390-ccw/main.c
+++ b/pc-bios/s390-ccw/main.c
@@ -261,8 +261,16 @@ static bool find_boot_device(void)
vdev->selected_scsi_device.channel = iplb->scsi.channel;
vdev->selected_scsi_device.target = iplb->scsi.target;
vdev->selected_scsi_device.lun = iplb->scsi.lun;
- blk_schid.ssid = iplb->scsi.ssid & 0x3;
- found = find_subch(iplb->scsi.devno);
+ vdev->ipl_type = iplb->scsi.bus;
+ switch (vdev->ipl_type) {
+ case S390_IPL_TYPE_CCW:
+ blk_schid.ssid = iplb->scsi.ssid & 0x3;
+ found = find_subch(iplb->scsi.devno);
+ break;
+ default:
+ puts("Unrecognized SCSI controller");
+ break;
+ }
break;
case S390_IPL_TYPE_PCI:
found = find_fid(iplb->pci.fid);
@@ -346,7 +354,6 @@ static void ipl_pci_device(void)
static void ipl_boot_device(void)
{
switch (virtio_get_device()->ipl_type) {
- case S390_IPL_TYPE_QEMU_SCSI:
case S390_IPL_TYPE_CCW:
ipl_ccw_device();
break;
diff --git a/pc-bios/s390-ccw/virtio-blkdev.c b/pc-bios/s390-ccw/virtio-blkdev.c
index 98b6cec3a0..83a1185dd5 100644
--- a/pc-bios/s390-ccw/virtio-blkdev.c
+++ b/pc-bios/s390-ccw/virtio-blkdev.c
@@ -253,7 +253,6 @@ int virtio_blk_setup_device(VDev *vdev)
puts("Using virtio-blk.");
switch (vdev->ipl_type) {
- case S390_IPL_TYPE_QEMU_SCSI:
case S390_IPL_TYPE_CCW:
return virtio_ccw_setup(vdev);
case S390_IPL_TYPE_PCI:
diff --git a/pc-bios/s390-ccw/virtio.c b/pc-bios/s390-ccw/virtio.c
index a0d249db24..0b33544144 100644
--- a/pc-bios/s390-ccw/virtio.c
+++ b/pc-bios/s390-ccw/virtio.c
@@ -61,7 +61,6 @@ char *virtio_get_ring_area(int ring_num)
int drain_irqs(void)
{
switch (vdev.ipl_type) {
- case S390_IPL_TYPE_QEMU_SCSI:
case S390_IPL_TYPE_CCW:
return drain_irqs_ccw(vdev.schid);
default:
@@ -109,7 +108,6 @@ void vring_init(VRing *vr, VqInfo *info)
bool vring_notify(VRing *vr)
{
switch (vdev.ipl_type) {
- case S390_IPL_TYPE_QEMU_SCSI:
case S390_IPL_TYPE_CCW:
vr->cookie = virtio_ccw_notify(vdev.schid, vr->id, vr->cookie);
break;
@@ -130,7 +128,6 @@ bool vring_notify(VRing *vr)
bool be_ipl(void)
{
switch (virtio_get_device()->ipl_type) {
- case S390_IPL_TYPE_QEMU_SCSI:
case S390_IPL_TYPE_CCW:
return true;
case S390_IPL_TYPE_PCI:
@@ -231,7 +228,6 @@ int vring_wait_reply(void)
int virtio_reset(VDev *vdev)
{
switch (vdev->ipl_type) {
- case S390_IPL_TYPE_QEMU_SCSI:
case S390_IPL_TYPE_CCW:
return virtio_ccw_reset(vdev);
case S390_IPL_TYPE_PCI:
@@ -244,7 +240,6 @@ int virtio_reset(VDev *vdev)
bool virtio_is_supported(VDev *vdev)
{
switch (vdev->ipl_type) {
- case S390_IPL_TYPE_QEMU_SCSI:
case S390_IPL_TYPE_CCW:
return virtio_ccw_is_supported(vdev);
case S390_IPL_TYPE_PCI:
--
2.55.0
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PULL 27/33] s390x/ipl: Add PCI and bus fields to IplBlockQemuScsi
2026-09-21 20:07 [PULL 00/33] s390x queue for 11.2 Eric Farman
` (25 preceding siblings ...)
2026-09-21 20:08 ` [PULL 26/33] pc-bios/s390-ccw: Use bus specific IPL_TYPE directly for scsi IPL Eric Farman
@ 2026-09-21 20:08 ` Eric Farman
2026-09-21 20:08 ` [PULL 28/33] pc-bios/s390-ccw: Abstract virtio_run() for generic use Eric Farman
` (6 subsequent siblings)
33 siblings, 0 replies; 35+ messages in thread
From: Eric Farman @ 2026-09-21 20:08 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-s390x, Matthew Rosato, Cornelia Huck, Jared Rossi,
Eric Farman
From: Jared Rossi <jrossi@linux.ibm.com>
Rather than add a second non-architected IPLB type for scsi-pci devices,
let's add the relevant fields to the existing struct so that it can handle
both PCI and CCW scsi controllers.
The PCI and CCW fields of the IplBlockQemuScsi are aligned with same
offsets as the corresponding fields in IplBlockPci and IplBlockCcw for
potential union access.
Add comments for PCI/CCW specifics and also denote that the S390IplType
enum values must fit in uint8_t.
Reviewed-by: Eric Farman <farman@linux.ibm.com>
Signed-off-by: Jared Rossi <jrossi@linux.ibm.com>
Reviewed-by: Jason J. Herne <jjherne@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260831194919.3830270-5-jrossi@linux.ibm.com
Signed-off-by: Eric Farman <farman@linux.ibm.com>
---
hw/s390x/ipl.c | 1 +
hw/s390x/ipl.h | 2 ++
include/hw/s390x/ipl/qipl.h | 13 +++++++++----
3 files changed, 12 insertions(+), 4 deletions(-)
diff --git a/hw/s390x/ipl.c b/hw/s390x/ipl.c
index b2b87beefd..4fa8124f92 100644
--- a/hw/s390x/ipl.c
+++ b/hw/s390x/ipl.c
@@ -563,6 +563,7 @@ static bool s390_build_iplb(DeviceState *dev_st, IplParameterBlock *iplb)
iplb->scsi.lun = cpu_to_be32(sd->lun);
iplb->scsi.target = cpu_to_be16(sd->id);
iplb->scsi.channel = cpu_to_be16(sd->channel);
+ iplb->scsi.bus = S390_IPL_TYPE_CCW;
iplb->scsi.devno = cpu_to_be16(ccw_dev->sch->devno);
iplb->scsi.ssid = ccw_dev->sch->ssid & 3;
break;
diff --git a/hw/s390x/ipl.h b/hw/s390x/ipl.h
index 772566bb11..580f42aa4a 100644
--- a/hw/s390x/ipl.h
+++ b/hw/s390x/ipl.h
@@ -86,6 +86,8 @@ struct S390IPLState {
uint16_t devno;
};
QEMU_BUILD_BUG_MSG(offsetof(S390IPLState, iplb) & 3, "alignment of iplb wrong");
+QEMU_BUILD_BUG_MSG(offsetof(IplBlockQemuScsi, fid) != offsetof(IplBlockPci, fid),
+ "iplb fields misaligned across bus types");
static inline bool iplb_valid_len(IplParameterBlock *iplb)
{
diff --git a/include/hw/s390x/ipl/qipl.h b/include/hw/s390x/ipl/qipl.h
index 69b0023ea3..e733c6ce31 100644
--- a/include/hw/s390x/ipl/qipl.h
+++ b/include/hw/s390x/ipl/qipl.h
@@ -29,7 +29,7 @@ enum S390IplType {
S390_IPL_TYPE_CCW = 0x02,
S390_IPL_TYPE_PCI = 0x04,
S390_IPL_TYPE_PV = 0x05,
- S390_IPL_TYPE_QEMU_SCSI = 0xff
+ S390_IPL_TYPE_QEMU_SCSI = 0xff /* Max value, must fit in uint8_t */
};
typedef enum S390IplType S390IplType;
@@ -123,9 +123,14 @@ struct IplBlockQemuScsi {
uint32_t lun;
uint16_t target;
uint16_t channel;
- uint8_t reserved0[77];
- uint8_t ssid;
- uint16_t devno;
+ uint8_t bus;
+ uint8_t reserved0[76];
+ uint8_t ssid; /* CCW only */
+ uint16_t devno; /* CCW only */
+ uint8_t reserved1[216];
+ uint8_t opt; /* PCI only */
+ uint8_t reserved2[3];
+ uint32_t fid; /* PCI only */
} QEMU_PACKED;
typedef struct IplBlockQemuScsi IplBlockQemuScsi;
--
2.55.0
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PULL 28/33] pc-bios/s390-ccw: Abstract virtio_run() for generic use
2026-09-21 20:07 [PULL 00/33] s390x queue for 11.2 Eric Farman
` (26 preceding siblings ...)
2026-09-21 20:08 ` [PULL 27/33] s390x/ipl: Add PCI and bus fields to IplBlockQemuScsi Eric Farman
@ 2026-09-21 20:08 ` Eric Farman
2026-09-21 20:08 ` [PULL 29/33] pc-bios/s390-ccw: Add support for virtio-scsi-pci IPL Eric Farman
` (5 subsequent siblings)
33 siblings, 0 replies; 35+ messages in thread
From: Eric Farman @ 2026-09-21 20:08 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-s390x, Matthew Rosato, Cornelia Huck, Jared Rossi,
Eric Farman
From: Jared Rossi <jrossi@linux.ibm.com>
The existing virtio_ccw_run() actually has no dependency on CCW. Rather
than add a case for non-ccw devices, we can just put the main logic right in
the virtio_run() call so that it can be used for other bus types directly.
Reviewed-by: Eric Farman <farman@linux.ibm.com>
Signed-off-by: Jared Rossi <jrossi@linux.ibm.com>
Reviewed-by: Jason J. Herne <jjherne@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260831194919.3830270-6-jrossi@linux.ibm.com
Signed-off-by: Eric Farman <farman@linux.ibm.com>
---
pc-bios/s390-ccw/virtio-ccw.c | 17 -----------------
pc-bios/s390-ccw/virtio-ccw.h | 1 -
pc-bios/s390-ccw/virtio.c | 16 +++++++++++-----
3 files changed, 11 insertions(+), 23 deletions(-)
diff --git a/pc-bios/s390-ccw/virtio-ccw.c b/pc-bios/s390-ccw/virtio-ccw.c
index 5cb2158ed2..ea5dbc2857 100644
--- a/pc-bios/s390-ccw/virtio-ccw.c
+++ b/pc-bios/s390-ccw/virtio-ccw.c
@@ -107,23 +107,6 @@ long virtio_ccw_notify(SubChannelId schid, int vq_idx, long cookie)
vq_idx, cookie);
}
-int virtio_ccw_run(VDev *vdev, int vqid, VirtioCmd *cmd)
-{
- VRing *vr = &vdev->vrings[vqid];
- int i = 0;
-
- do {
- vring_send_buf(vr, cmd[i].data, cmd[i].size,
- cmd[i].flags | (i ? VRING_HIDDEN_IS_CHAIN : 0));
- } while (cmd[i++].flags & VRING_DESC_F_NEXT);
-
- vring_wait_reply();
- if (drain_irqs()) {
- return -1;
- }
- return 0;
-}
-
int virtio_ccw_reset(VDev *vdev)
{
return run_ccw(vdev, CCW_CMD_VDEV_RESET, NULL, 0, false);
diff --git a/pc-bios/s390-ccw/virtio-ccw.h b/pc-bios/s390-ccw/virtio-ccw.h
index a506767eaa..43d21906e5 100644
--- a/pc-bios/s390-ccw/virtio-ccw.h
+++ b/pc-bios/s390-ccw/virtio-ccw.h
@@ -16,7 +16,6 @@ extern SubChannelId blk_schid;
/* virtio-ccw.c */
int drain_irqs_ccw(SubChannelId schid);
bool virtio_ccw_is_supported(VDev *vdev);
-int virtio_ccw_run(VDev *vdev, int vqid, VirtioCmd *cmd);
long virtio_ccw_notify(SubChannelId schid, int vq_idx, long cookie);
int virtio_ccw_setup(VDev *vdev);
int virtio_ccw_reset(VDev *vdev);
diff --git a/pc-bios/s390-ccw/virtio.c b/pc-bios/s390-ccw/virtio.c
index 0b33544144..34c5e6ee22 100644
--- a/pc-bios/s390-ccw/virtio.c
+++ b/pc-bios/s390-ccw/virtio.c
@@ -70,13 +70,19 @@ int drain_irqs(void)
int virtio_run(VDev *vdev, int vqid, VirtioCmd *cmd)
{
- switch (vdev->ipl_type) {
- case S390_IPL_TYPE_QEMU_SCSI:
- case S390_IPL_TYPE_CCW:
- return virtio_ccw_run(vdev, vqid, cmd);
- default:
+ VRing *vr = &vdev->vrings[vqid];
+ int i = 0;
+
+ do {
+ vring_send_buf(vr, cmd[i].data, cmd[i].size,
+ cmd[i].flags | (i ? VRING_HIDDEN_IS_CHAIN : 0));
+ } while (cmd[i++].flags & VRING_DESC_F_NEXT);
+
+ vring_wait_reply();
+ if (drain_irqs()) {
return -1;
}
+ return 0;
}
void vring_init(VRing *vr, VqInfo *info)
--
2.55.0
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PULL 29/33] pc-bios/s390-ccw: Add support for virtio-scsi-pci IPL
2026-09-21 20:07 [PULL 00/33] s390x queue for 11.2 Eric Farman
` (27 preceding siblings ...)
2026-09-21 20:08 ` [PULL 28/33] pc-bios/s390-ccw: Abstract virtio_run() for generic use Eric Farman
@ 2026-09-21 20:08 ` Eric Farman
2026-09-21 20:08 ` [PULL 30/33] s390x: Find scsi-pci boot device and build IPLB Eric Farman
` (4 subsequent siblings)
33 siblings, 0 replies; 35+ messages in thread
From: Eric Farman @ 2026-09-21 20:08 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-s390x, Matthew Rosato, Cornelia Huck, Jared Rossi,
Eric Farman
From: Jared Rossi <jrossi@linux.ibm.com>
Read virtio-pci configuration and configure virt-queue for scsi devices.
Also add check for virtio setup failures when doing scsi setup and return
early if it fails instead of waiting for subsequent failure.
Signed-off-by: Jared Rossi <jrossi@linux.ibm.com>
Reviewed-by: Jason J. Herne <jjherne@linux.ibm.com>
Reviewed-by: Eric Farman <farman@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260831194919.3830270-7-jrossi@linux.ibm.com
Signed-off-by: Eric Farman <farman@linux.ibm.com>
---
pc-bios/s390-ccw/main.c | 3 ++-
pc-bios/s390-ccw/virtio-pci.c | 30 ++++++++++++++++++++++++++++++
pc-bios/s390-ccw/virtio-scsi.c | 18 +++++++++++++++++-
3 files changed, 49 insertions(+), 2 deletions(-)
diff --git a/pc-bios/s390-ccw/main.c b/pc-bios/s390-ccw/main.c
index 6ab2b8f75b..a2a24b024f 100644
--- a/pc-bios/s390-ccw/main.c
+++ b/pc-bios/s390-ccw/main.c
@@ -273,6 +273,7 @@ static bool find_boot_device(void)
}
break;
case S390_IPL_TYPE_PCI:
+ vdev->scsi_device_selected = false;
found = find_fid(iplb->pci.fid);
break;
default:
@@ -333,13 +334,13 @@ static void ipl_pci_device(void)
{
VDev *vdev = virtio_get_device();
vdev->is_cdrom = false;
- vdev->scsi_device_selected = false;
if (virtio_pci_setup_device()) {
return;
}
switch (vdev->dev_type) {
+ case VIRTIO_ID_SCSI:
case VIRTIO_ID_BLOCK:
if (virtio_setup() == 0) {
zipl_load(); /* only return on error */
diff --git a/pc-bios/s390-ccw/virtio-pci.c b/pc-bios/s390-ccw/virtio-pci.c
index 231ab6e04d..277c3ea68d 100644
--- a/pc-bios/s390-ccw/virtio-pci.c
+++ b/pc-bios/s390-ccw/virtio-pci.c
@@ -52,6 +52,10 @@ void virtio_pci_id2type(VDev *vdev, uint16_t device_id)
case 0x1001:
vdev->dev_type = VIRTIO_ID_BLOCK;
break;
+ case 0x1048:
+ case 0x1004:
+ vdev->dev_type = VIRTIO_ID_SCSI;
+ break;
default:
vdev->dev_type = 0;
}
@@ -199,6 +203,26 @@ static int virtio_pci_get_blk_config(void)
return rc;
}
+static int virtio_pci_get_scsi_config(void)
+{
+ VirtioScsiConfig *cfg = &virtio_get_device()->config.scsi;
+ int rc = vpci_read_flex(d_cap.off, d_cap.bar, cfg, sizeof(VirtioScsiConfig));
+
+ /* all fields of scsi config must be byte swapped */
+ cfg->num_queues = bswap32(cfg->num_queues);
+ cfg->seg_max = bswap32(cfg->seg_max);
+ cfg->max_sectors = bswap32(cfg->max_sectors);
+ cfg->cmd_per_lun = bswap32(cfg->cmd_per_lun);
+ cfg->event_info_size = bswap32(cfg->event_info_size);
+ cfg->sense_size = bswap32(cfg->sense_size);
+ cfg->cdb_size = bswap32(cfg->cdb_size);
+ cfg->max_channel = bswap16(cfg->max_channel);
+ cfg->max_target = bswap16(cfg->max_target);
+ cfg->max_lun = bswap32(cfg->max_lun);
+
+ return rc;
+}
+
static int virtio_pci_negotiate(void)
{
int i, rc;
@@ -330,6 +354,7 @@ bool virtio_pci_is_supported(VDev *vdev)
if (vdev->vendor_id == PCI_VENDOR_VIRTIO) {
switch (vdev->dev_type) {
case VIRTIO_ID_BLOCK:
+ case VIRTIO_ID_SCSI:
return true;
default:
return false;
@@ -384,6 +409,11 @@ int virtio_pci_setup(VDev *vdev)
vdev->cmd_vr_idx = 0;
virtio_pci_get_blk_config();
break;
+ case VIRTIO_ID_SCSI:
+ vdev->nr_vqs = 3;
+ vdev->cmd_vr_idx = 2;
+ virtio_pci_get_scsi_config();
+ break;
default:
puts("Unsupported virtio device");
return -ENODEV;
diff --git a/pc-bios/s390-ccw/virtio-scsi.c b/pc-bios/s390-ccw/virtio-scsi.c
index 9ea00c6fe6..ca02ff5989 100644
--- a/pc-bios/s390-ccw/virtio-scsi.c
+++ b/pc-bios/s390-ccw/virtio-scsi.c
@@ -16,6 +16,7 @@
#include "scsi.h"
#include "virtio-scsi.h"
#include "virtio-ccw.h"
+#include "virtio-pci.h"
#include "s390-time.h"
#include "helper.h"
@@ -479,7 +480,22 @@ static int virtio_scsi_setup(VDev *vdev)
int virtio_scsi_setup_device(VDev *vdev)
{
- virtio_ccw_setup(vdev);
+ switch (vdev->ipl_type) {
+ case S390_IPL_TYPE_CCW:
+ if (virtio_ccw_setup(vdev)) {
+ puts("Setup failed for virtio-scsi-ccw");
+ return 1;
+ }
+ break;
+ case S390_IPL_TYPE_PCI:
+ if (virtio_pci_setup(vdev)) {
+ puts("Setup failed for virtio-scsi-pci");
+ return 1;
+ }
+ break;
+ default:
+ return 1;
+ }
if (vdev->config.scsi.sense_size != VIRTIO_SCSI_SENSE_SIZE) {
puts("Config: sense size mismatch");
--
2.55.0
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PULL 30/33] s390x: Find scsi-pci boot device and build IPLB
2026-09-21 20:07 [PULL 00/33] s390x queue for 11.2 Eric Farman
` (28 preceding siblings ...)
2026-09-21 20:08 ` [PULL 29/33] pc-bios/s390-ccw: Add support for virtio-scsi-pci IPL Eric Farman
@ 2026-09-21 20:08 ` Eric Farman
2026-09-21 20:08 ` [PULL 31/33] tests/qtest: Add s390x PCI SCSI fallback test to cdrom-test.c Eric Farman
` (3 subsequent siblings)
33 siblings, 0 replies; 35+ messages in thread
From: Eric Farman @ 2026-09-21 20:08 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-s390x, Matthew Rosato, Cornelia Huck, Jared Rossi,
Eric Farman
From: Jared Rossi <jrossi@linux.ibm.com>
Add logic to identify a virtio-pci scsi controller and target lun with
assigned bootindex, then build IPLB for it.
Unfence PCI case for scsi devices in BIOS.
Signed-off-by: Jared Rossi <jrossi@linux.ibm.com>
Reviewed-by: Jason J. Herne <jjherne@linux.ibm.com>
Tested-by: Eric Farman <farman@linux.ibm.com>
Reviewed-by: Eric Farman <farman@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260831194919.3830270-8-jrossi@linux.ibm.com
Signed-off-by: Eric Farman <farman@linux.ibm.com>
---
hw/s390x/ipl.c | 37 +++++++++++++++++++++++++++++++++++++
pc-bios/s390-ccw/main.c | 3 +++
2 files changed, 40 insertions(+)
diff --git a/hw/s390x/ipl.c b/hw/s390x/ipl.c
index 4fa8124f92..1add11ad7b 100644
--- a/hw/s390x/ipl.c
+++ b/hw/s390x/ipl.c
@@ -402,6 +402,7 @@ static CcwDevice *s390_get_ccw_device(DeviceState *dev_st, int *devtype)
}
#define PCI_DEVTYPE_VIRTIO 0x05
+#define PCI_DEVTYPE_SCSI 0x06
static S390PCIBusDevice *s390_get_pci_device(DeviceState *dev_st, int *devtype)
{
@@ -417,6 +418,26 @@ static S390PCIBusDevice *s390_get_pci_device(DeviceState *dev_st, int *devtype)
if (pbdev) {
tmp_dt = PCI_DEVTYPE_VIRTIO;
}
+ } else {
+ SCSIDevice *sd = (SCSIDevice *)
+ object_dynamic_cast(OBJECT(dev_st), TYPE_SCSI_DEVICE);
+ if (sd) {
+ SCSIBus *sbus = scsi_bus_from_device(sd);
+ VirtIODevice *vdev = (VirtIODevice *)
+ object_dynamic_cast(OBJECT(sbus->qbus.parent),
+ TYPE_VIRTIO_DEVICE);
+ if (vdev) {
+ pci_dev = (PCIDevice *)
+ object_dynamic_cast(OBJECT(qdev_get_parent_bus(DEVICE(vdev))->parent),
+ TYPE_PCI_DEVICE);
+ if (pci_dev) {
+ pbdev = s390_pci_find_dev_by_pci(s390_get_phb(), pci_dev);
+ if (pbdev) {
+ tmp_dt = PCI_DEVTYPE_SCSI;
+ }
+ }
+ }
+ }
}
}
if (devtype) {
@@ -616,6 +637,22 @@ static bool s390_build_iplb(DeviceState *dev_st, IplParameterBlock *iplb)
iplb->pbt = S390_IPL_TYPE_PCI;
iplb->pci.fid = cpu_to_be32(pbdev->fid);
break;
+ case PCI_DEVTYPE_SCSI:
+ sd = SCSI_DEVICE(dev_st);
+ scsi_lp = object_property_get_str(OBJECT(sd), "loadparm", NULL);
+ if (scsi_lp && strlen(scsi_lp) > 0) {
+ lp = scsi_lp;
+ }
+ iplb->len = cpu_to_be32(S390_IPLB_MIN_PCI_LEN);
+ iplb->blk0_len =
+ cpu_to_be32(S390_IPLB_MIN_PCI_LEN - S390_IPLB_HEADER_LEN);
+ iplb->pbt = S390_IPL_TYPE_QEMU_SCSI;
+ iplb->scsi.lun = cpu_to_be32(sd->lun);
+ iplb->scsi.target = cpu_to_be16(sd->id);
+ iplb->scsi.channel = cpu_to_be16(sd->channel);
+ iplb->scsi.bus = S390_IPL_TYPE_PCI;
+ iplb->scsi.fid = cpu_to_be32(pbdev->fid);
+ break;
default:
return false;
}
diff --git a/pc-bios/s390-ccw/main.c b/pc-bios/s390-ccw/main.c
index a2a24b024f..d2a2ac3138 100644
--- a/pc-bios/s390-ccw/main.c
+++ b/pc-bios/s390-ccw/main.c
@@ -267,6 +267,9 @@ static bool find_boot_device(void)
blk_schid.ssid = iplb->scsi.ssid & 0x3;
found = find_subch(iplb->scsi.devno);
break;
+ case S390_IPL_TYPE_PCI:
+ found = find_fid(iplb->scsi.fid);
+ break;
default:
puts("Unrecognized SCSI controller");
break;
--
2.55.0
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PULL 31/33] tests/qtest: Add s390x PCI SCSI fallback test to cdrom-test.c
2026-09-21 20:07 [PULL 00/33] s390x queue for 11.2 Eric Farman
` (29 preceding siblings ...)
2026-09-21 20:08 ` [PULL 30/33] s390x: Find scsi-pci boot device and build IPLB Eric Farman
@ 2026-09-21 20:08 ` Eric Farman
2026-09-21 20:08 ` [PULL 32/33] s390x/pci: fix DMA slot leak on I/O TLB entry replacement Eric Farman
` (2 subsequent siblings)
33 siblings, 0 replies; 35+ messages in thread
From: Eric Farman @ 2026-09-21 20:08 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-s390x, Matthew Rosato, Cornelia Huck, Jared Rossi,
Eric Farman
From: Jared Rossi <jrossi@linux.ibm.com>
Add a test to verify that a guest can use a PCI controlled CD as a fallback boot
device after a failed CCW IPL.
Signed-off-by: Jared Rossi <jrossi@linux.ibm.com>
Tested-by: Eric Farman <farman@linux.ibm.com>
Reviewed-by: Eric Farman <farman@linux.ibm.com>
Tested-by: Joshua Daley <jdaley@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260831194919.3830270-9-jrossi@linux.ibm.com
Signed-off-by: Eric Farman <farman@linux.ibm.com>
---
tests/qtest/cdrom-test.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/tests/qtest/cdrom-test.c b/tests/qtest/cdrom-test.c
index bf997be6d6..9e725126cf 100644
--- a/tests/qtest/cdrom-test.c
+++ b/tests/qtest/cdrom-test.c
@@ -272,6 +272,14 @@ static void add_s390x_tests(void)
"-drive if=none,id=d1,media=cdrom,file=",
test_cdboot);
}
+ if (qtest_has_device("virtio-scsi-pci")) {
+ qtest_add_data_func("cdrom/boot/pci-scsi-fallback-from-blk-ccw",
+ "-device virtio-scsi-pci -device virtio-serial "
+ "-device virtio-blk-ccw,drive=d1,bootindex=1 "
+ "-drive driver=null-co,read-zeroes=on,if=none,id=d1 "
+ "-device scsi-cd,drive=d2,bootindex=2 "
+ "-drive if=none,id=d2,media=cdrom,file=", test_cdboot);
+ }
}
int main(int argc, char **argv)
--
2.55.0
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PULL 32/33] s390x/pci: fix DMA slot leak on I/O TLB entry replacement
2026-09-21 20:07 [PULL 00/33] s390x queue for 11.2 Eric Farman
` (30 preceding siblings ...)
2026-09-21 20:08 ` [PULL 31/33] tests/qtest: Add s390x PCI SCSI fallback test to cdrom-test.c Eric Farman
@ 2026-09-21 20:08 ` Eric Farman
2026-09-21 20:08 ` [PULL 33/33] pc-bios/s390-ccw.img: update s390x bios Eric Farman
2026-09-22 5:32 ` [PULL 00/33] s390x queue for 11.2 Richard Henderson
33 siblings, 0 replies; 35+ messages in thread
From: Eric Farman @ 2026-09-21 20:08 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-s390x, Matthew Rosato, Cornelia Huck, Omar Elghoul,
qemu-stable, Eric Farman
From: Omar Elghoul <oelghoul@linux.ibm.com>
When s390_pci_update_iotlb() does a mapping update for an IOVA that has
an already-existing TLB entry with different permissions or translated
address, it unmaps then remaps it. However, at the end of the map path,
it unconditionally decrements the available DMA slot counter without a
corresponding increment in the intermediate unmap branch.
This causes the DMA slot count to be decremented on every remapping of
an active IOVA, leading to a permanent DMA slot leak. This remapping
without a prior invalidation and sync is not seen today in well-behaved
guests but is allowed by the architecture. Fix it by only decrementing
available DMA slots when inserting a brand new mapping.
Cc: qemu-stable@nongnu.org
Fixes: 37fa32de70 ("s390x/pci: Honor DMA limits set by vfio")
Signed-off-by: Omar Elghoul <oelghoul@linux.ibm.com>
Reviewed-by: Farhan Ali <alifm@linux.ibm.com>
Reviewed-by: Matthew Rosato <mjrosato@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260917140431.45343-1-oelghoul@linux.ibm.com
Signed-off-by: Eric Farman <farman@linux.ibm.com>
---
hw/s390x/s390-pci-inst.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/hw/s390x/s390-pci-inst.c b/hw/s390x/s390-pci-inst.c
index b7de23c7d2..652e1712ec 100644
--- a/hw/s390x/s390-pci-inst.c
+++ b/hw/s390x/s390-pci-inst.c
@@ -655,6 +655,7 @@ static uint32_t s390_pci_update_iotlb(S390PCIIOMMU *iommu,
goto out;
} else {
if (cache) {
+ /* valid->valid transitions reuse the DMA slot */
if (cache->perm == entry->perm &&
cache->translated_addr == entry->translated_addr) {
goto out;
@@ -665,6 +666,9 @@ static uint32_t s390_pci_update_iotlb(S390PCIIOMMU *iommu,
memory_region_notify_iommu(&iommu->iommu_mr, 0, event);
event.type = IOMMU_NOTIFIER_MAP;
event.entry.perm = entry->perm;
+ } else {
+ /* invalid->valid transitions consume a new DMA slot */
+ dec_dma_avail(iommu);
}
cache = g_new(S390IOTLBEntry, 1);
@@ -673,7 +677,6 @@ static uint32_t s390_pci_update_iotlb(S390PCIIOMMU *iommu,
cache->len = TARGET_PAGE_SIZE;
cache->perm = entry->perm;
g_hash_table_replace(iommu->iotlb, &cache->iova, cache);
- dec_dma_avail(iommu);
}
/*
--
2.55.0
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PULL 33/33] pc-bios/s390-ccw.img: update s390x bios
2026-09-21 20:07 [PULL 00/33] s390x queue for 11.2 Eric Farman
` (31 preceding siblings ...)
2026-09-21 20:08 ` [PULL 32/33] s390x/pci: fix DMA slot leak on I/O TLB entry replacement Eric Farman
@ 2026-09-21 20:08 ` Eric Farman
2026-09-22 5:32 ` [PULL 00/33] s390x queue for 11.2 Richard Henderson
33 siblings, 0 replies; 35+ messages in thread
From: Eric Farman @ 2026-09-21 20:08 UTC (permalink / raw)
To: qemu-devel; +Cc: qemu-s390x, Matthew Rosato, Cornelia Huck, Eric Farman
Rebuild bios to include:
- 20260903155805.1881366-1-jdaley@linux.ibm.com
- 20260831194919.3830270-1-jrossi@linux.ibm.com
Signed-off-by: Eric Farman <farman@linux.ibm.com>
---
pc-bios/s390-ccw.img | Bin 112408 -> 112408 bytes
1 file changed, 0 insertions(+), 0 deletions(-)
diff --git a/pc-bios/s390-ccw.img b/pc-bios/s390-ccw.img
index de4f45180a46d19e2452743a1fbc2cd8a11462ab..7dd262b8992bb68718c1f1a5fe96727e230b3868 100644
GIT binary patch
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--
2.55.0
^ permalink raw reply [flat|nested] 35+ messages in thread* Re: [PULL 00/33] s390x queue for 11.2
2026-09-21 20:07 [PULL 00/33] s390x queue for 11.2 Eric Farman
` (32 preceding siblings ...)
2026-09-21 20:08 ` [PULL 33/33] pc-bios/s390-ccw.img: update s390x bios Eric Farman
@ 2026-09-22 5:32 ` Richard Henderson
33 siblings, 0 replies; 35+ messages in thread
From: Richard Henderson @ 2026-09-22 5:32 UTC (permalink / raw)
To: Eric Farman, qemu-devel; +Cc: qemu-s390x, Matthew Rosato, Cornelia Huck
On 9/21/26 13:07, Eric Farman wrote:
> The following changes since commit c1c18d1e640b64292859ce9f30f3c344edfb0294:
>
> Merge tag 'virtio-snd-migrate-pr-v2' ofhttps://gitlab.com/epilys/qemu into staging (2026-09-19 10:41:53 -1000)
>
> are available in the Git repository at:
>
> https://gitlab.com/efarman/qemu.git tags/s390x-20260921
>
> for you to fetch changes up to 96bd689997443a15f259fa99a6a672eb1f65062c:
>
> pc-bios/s390-ccw.img: update s390x bios (2026-09-21 11:46:02 -0400)
>
> ----------------------------------------------------------------
> New s390x features for 11.2
> - extend CPACF support
> - enable secure IPL for virtio-blk-pci
> - enable boot from virtio-scsi-pci
> - regenerate s390-ccw.img
Applied, thanks.
r~
^ permalink raw reply [flat|nested] 35+ messages in thread