From: David Matlack <dmatlack@google.com>
To: linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
linuxppc-dev@lists.ozlabs.org
Cc: Alex Williamson <alex@shazbot.org>,
Bjorn Helgaas <bhelgaas@google.com>,
Jason Gunthorpe <jgg@nvidia.com>,
Josh Hilke <jrhilke@google.com>, Lukas Wunner <lukas@wunner.de>,
Mahesh J Salgaonkar <mahesh@linux.ibm.com>,
"Oliver O'Halloran" <oohall@gmail.com>,
Pasha Tatashin <pasha.tatashin@soleen.com>,
Pratyush Yadav <pratyush@kernel.org>,
Samiullah Khawaja <skhawaja@google.com>,
Vipin Sharma <vipinsh@google.com>,
David Matlack <dmatlack@google.com>
Subject: [PATCH 05/15] PCI: Save PCI-X state in the saved capability store
Date: Thu, 24 Sep 2026 17:34:51 +0000 [thread overview]
Message-ID: <20260924173501.856380-6-dmatlack@google.com> (raw)
In-Reply-To: <20260924173501.856380-1-dmatlack@google.com>
Save and restore the PCI-X Command register through the per-device saved
capability store instead of a private pci_cap_saved_state buffer.
Reserve the register by its configuration space offset during device setup
so that the save and restore paths no longer have to locate a buffer, and
so that the saved value can be found without knowing how the PCI core
happens to lay its buffers out.
While here, make pci_save_pcix_state() void now that it cannot fail.
No functional change intended.
Assisted-by: LLM
Signed-off-by: David Matlack <dmatlack@google.com>
---
drivers/pci/pci.c | 43 ++++++++++++++-----------------------------
1 file changed, 14 insertions(+), 29 deletions(-)
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 1c2c572aa49c..9e49806c6891 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -1733,40 +1733,26 @@ static void pci_restore_pcie_state(struct pci_dev *dev)
}
}
-static int pci_save_pcix_state(struct pci_dev *dev)
+static void pci_save_pcix_state(struct pci_dev *dev)
{
int pos;
- struct pci_cap_saved_state *save_state;
pos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
if (!pos)
- return 0;
-
- save_state = pci_find_saved_cap(dev, PCI_CAP_ID_PCIX);
- if (!save_state) {
- pci_err(dev, "buffer not found in %s\n", __func__);
- return -ENOMEM;
- }
-
- pci_read_config_word(dev, pos + PCI_X_CMD,
- (u16 *)save_state->cap.data);
+ return;
- return 0;
+ pci_save_cap_word(dev, pos + PCI_X_CMD);
}
static void pci_restore_pcix_state(struct pci_dev *dev)
{
- int i = 0, pos;
- struct pci_cap_saved_state *save_state;
- u16 *cap;
+ int pos;
- save_state = pci_find_saved_cap(dev, PCI_CAP_ID_PCIX);
pos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
- if (!save_state || !pos)
+ if (!pos)
return;
- cap = (u16 *)&save_state->cap.data[0];
- pci_write_config_word(dev, pos + PCI_X_CMD, cap[i++]);
+ pci_restore_cap_word(dev, pos + PCI_X_CMD);
}
/**
@@ -1786,11 +1772,7 @@ int pci_save_state(struct pci_dev *dev)
dev->state_saved = true;
pci_save_pcie_state(dev);
-
- i = pci_save_pcix_state(dev);
- if (i != 0)
- return i;
-
+ pci_save_pcix_state(dev);
pci_save_dpc_state(dev);
pci_save_aer_state(dev);
pci_save_ptm_state(dev);
@@ -3579,7 +3561,7 @@ int pci_add_ext_cap_save_buffer(struct pci_dev *dev, u16 cap, unsigned int size)
void pci_allocate_cap_save_buffers(struct pci_dev *dev)
{
unsigned int i;
- int error;
+ int error, pos;
for (i = 0; pci_is_pcie(dev) && i < ARRAY_SIZE(pcie_saved_regs); i++) {
unsigned int off = dev->pcie_cap + pcie_saved_regs[i];
@@ -3591,9 +3573,12 @@ void pci_allocate_cap_save_buffers(struct pci_dev *dev)
}
}
- error = pci_add_cap_save_buffer(dev, PCI_CAP_ID_PCIX, sizeof(u16));
- if (error)
- pci_err(dev, "unable to preallocate PCI-X save buffer\n");
+ pos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
+ if (pos) {
+ error = pci_reserve_saved_cap(dev, pos + PCI_X_CMD, sizeof(u16));
+ if (error)
+ pci_err(dev, "unable to reserve PCI-X save state\n");
+ }
error = pci_add_ext_cap_save_buffer(dev, PCI_EXT_CAP_ID_LTR,
2 * sizeof(u16));
--
2.56.0.rc1.315.gc6ed9934b7-goog
next prev parent reply other threads:[~2026-09-24 17:35 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-24 17:34 [PATCH 00/15] PCI: Index saved capability state by configuration space offset David Matlack
2026-09-24 17:34 ` [PATCH 01/15] PCI/DPC: Allocate the DPC save buffer during device setup David Matlack
2026-09-24 17:44 ` sashiko-bot
2026-09-24 17:34 ` [PATCH 02/15] PCI: Add an offset-indexed store for saved capability registers David Matlack
2026-09-24 17:52 ` sashiko-bot
2026-10-06 18:41 ` Josh Hilke
2026-09-24 17:34 ` [PATCH 03/15] PCI: Lay out struct pci_saved_state by configuration space offset David Matlack
2026-09-24 18:01 ` sashiko-bot
2026-09-24 17:34 ` [PATCH 04/15] PCI: Save PCIe state in the saved capability store David Matlack
2026-09-24 18:08 ` sashiko-bot
2026-09-24 17:34 ` David Matlack [this message]
2026-09-24 18:11 ` [PATCH 05/15] PCI: Save PCI-X " sashiko-bot
2026-09-24 17:34 ` [PATCH 06/15] PCI/ASPM: Save LTR " David Matlack
2026-09-24 18:16 ` sashiko-bot
2026-09-24 17:34 ` [PATCH 07/15] PCI/ASPM: Save L1SS " David Matlack
2026-09-24 18:22 ` sashiko-bot
2026-10-06 18:41 ` Josh Hilke
2026-09-24 17:34 ` [PATCH 08/15] PCI/AER: Save AER " David Matlack
2026-09-24 18:26 ` sashiko-bot
2026-09-24 17:34 ` [PATCH 09/15] PCI/PTM: Save PTM " David Matlack
2026-09-24 18:30 ` sashiko-bot
2026-09-24 17:34 ` [PATCH 10/15] PCI/TPH: Save TPH " David Matlack
2026-09-24 18:36 ` sashiko-bot
2026-09-24 17:34 ` [PATCH 11/15] PCI/DPC: Save DPC " David Matlack
2026-09-24 18:40 ` sashiko-bot
2026-09-24 17:34 ` [PATCH 12/15] PCI/VC: Split the VC Resource Control restore into a helper David Matlack
2026-09-24 18:42 ` sashiko-bot
2026-09-24 17:34 ` [PATCH 13/15] PCI/VC: Save VC state in the saved capability store David Matlack
2026-09-24 18:46 ` sashiko-bot
2026-10-06 18:42 ` Josh Hilke
2026-09-24 17:35 ` [PATCH 14/15] PCI: Save reserved capability registers in a single pass David Matlack
2026-09-24 18:56 ` sashiko-bot
2026-10-06 18:42 ` Josh Hilke
2026-09-24 17:35 ` [PATCH 15/15] PCI: Remove the per-capability save buffers David Matlack
2026-09-24 19:01 ` sashiko-bot
2026-10-06 18:42 ` Josh Hilke
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