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From: Shannon Zhao <zhaoshenglong@huawei.com>
To: Marc Zyngier <marc.zyngier@arm.com>,
	kvmarm@lists.cs.columbia.edu, christoffer.dall@linaro.org
Cc: kvm@vger.kernel.org, will.deacon@arm.com,
	linux-arm-kernel@lists.infradead.org, shannon.zhao@linaro.org
Subject: Re: [PATCH v6 14/21] KVM: ARM64: Add reset and access handlers for PMOVSSET and PMOVSCLR register
Date: Wed, 9 Dec 2015 16:47:52 +0800	[thread overview]
Message-ID: <5667EAB8.9030502@huawei.com> (raw)
In-Reply-To: <56670C5D.3020407@arm.com>



On 2015/12/9 0:59, Marc Zyngier wrote:
>> > +	}
>> > +
>> > +	/* If all overflow bits are cleared, kick the vcpu to clear interrupt
>> > +	 * pending status.
>> > +	 */
>> > +	if (val == 0)
>> > +		kvm_vcpu_kick(vcpu);
> Do we really need to do so? This will be dropped on the next entry
> anyway, so i don't see the need to kick the vcpu again. Or am I missing
> something?
> 
I thought maybe it could not set the interrupt low immediately when all
the overflow bits are cleared for some reason, so add a kick to force it
to sync the interrupt. But as you said, I'll remove this.

Thanks,
-- 
Shannon

WARNING: multiple messages have this Message-ID (diff)
From: zhaoshenglong@huawei.com (Shannon Zhao)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v6 14/21] KVM: ARM64: Add reset and access handlers for PMOVSSET and PMOVSCLR register
Date: Wed, 9 Dec 2015 16:47:52 +0800	[thread overview]
Message-ID: <5667EAB8.9030502@huawei.com> (raw)
In-Reply-To: <56670C5D.3020407@arm.com>



On 2015/12/9 0:59, Marc Zyngier wrote:
>> > +	}
>> > +
>> > +	/* If all overflow bits are cleared, kick the vcpu to clear interrupt
>> > +	 * pending status.
>> > +	 */
>> > +	if (val == 0)
>> > +		kvm_vcpu_kick(vcpu);
> Do we really need to do so? This will be dropped on the next entry
> anyway, so i don't see the need to kick the vcpu again. Or am I missing
> something?
> 
I thought maybe it could not set the interrupt low immediately when all
the overflow bits are cleared for some reason, so add a kick to force it
to sync the interrupt. But as you said, I'll remove this.

Thanks,
-- 
Shannon

WARNING: multiple messages have this Message-ID (diff)
From: Shannon Zhao <zhaoshenglong@huawei.com>
To: Marc Zyngier <marc.zyngier@arm.com>,
	<kvmarm@lists.cs.columbia.edu>, <christoffer.dall@linaro.org>
Cc: kvm@vger.kernel.org, will.deacon@arm.com,
	linux-arm-kernel@lists.infradead.org, shannon.zhao@linaro.org
Subject: Re: [PATCH v6 14/21] KVM: ARM64: Add reset and access handlers for PMOVSSET and PMOVSCLR register
Date: Wed, 9 Dec 2015 16:47:52 +0800	[thread overview]
Message-ID: <5667EAB8.9030502@huawei.com> (raw)
In-Reply-To: <56670C5D.3020407@arm.com>



On 2015/12/9 0:59, Marc Zyngier wrote:
>> > +	}
>> > +
>> > +	/* If all overflow bits are cleared, kick the vcpu to clear interrupt
>> > +	 * pending status.
>> > +	 */
>> > +	if (val == 0)
>> > +		kvm_vcpu_kick(vcpu);
> Do we really need to do so? This will be dropped on the next entry
> anyway, so i don't see the need to kick the vcpu again. Or am I missing
> something?
> 
I thought maybe it could not set the interrupt low immediately when all
the overflow bits are cleared for some reason, so add a kick to force it
to sync the interrupt. But as you said, I'll remove this.

Thanks,
-- 
Shannon

  reply	other threads:[~2015-12-09  8:46 UTC|newest]

Thread overview: 126+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-12-08 12:47 [PATCH v6 00/21] KVM: ARM64: Add guest PMU support Shannon Zhao
2015-12-08 12:47 ` Shannon Zhao
2015-12-08 12:47 ` Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 01/21] ARM64: Move PMU register related defines to asm/pmu.h Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 02/21] KVM: ARM64: Define PMU data structure for each vcpu Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 13:37   ` Marc Zyngier
2015-12-08 13:37     ` Marc Zyngier
2015-12-08 13:53     ` Will Deacon
2015-12-08 13:53       ` Will Deacon
2015-12-08 14:10       ` Marc Zyngier
2015-12-08 14:10         ` Marc Zyngier
2015-12-08 14:14         ` Shannon Zhao
2015-12-08 14:14           ` Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 03/21] KVM: ARM64: Add offset defines for PMU registers Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 04/21] KVM: ARM64: Add reset and access handlers for PMCR_EL0 register Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 05/21] KVM: ARM64: Add reset and access handlers for PMSELR register Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 06/21] KVM: ARM64: Add reset and access handlers for PMCEID0 and PMCEID1 register Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 14:23   ` Marc Zyngier
2015-12-08 14:23     ` Marc Zyngier
2015-12-08 12:47 ` [PATCH v6 07/21] KVM: ARM64: PMU: Add perf event map and introduce perf event creating function Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 15:43   ` Marc Zyngier
2015-12-08 15:43     ` Marc Zyngier
2015-12-09  7:38     ` Shannon Zhao
2015-12-09  7:38       ` Shannon Zhao
2015-12-09  7:38       ` Shannon Zhao
2015-12-09  8:23       ` Marc Zyngier
2015-12-09  8:23         ` Marc Zyngier
2015-12-09  8:23         ` Marc Zyngier
2015-12-08 12:47 ` [PATCH v6 08/21] KVM: ARM64: Add access handler for PMEVTYPERn and PMCCFILTR register Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 16:17   ` Marc Zyngier
2015-12-08 16:17     ` Marc Zyngier
2015-12-08 12:47 ` [PATCH v6 09/21] KVM: ARM64: Add access handler for PMXEVTYPER register Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 10/21] KVM: ARM64: Add access handler for PMEVCNTRn and PMCCNTR register Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 16:30   ` Marc Zyngier
2015-12-08 16:30     ` Marc Zyngier
2015-12-10 11:36     ` Shannon Zhao
2015-12-10 11:36       ` Shannon Zhao
2015-12-10 11:36       ` Shannon Zhao
2015-12-10 12:07       ` Marc Zyngier
2015-12-10 12:07         ` Marc Zyngier
2015-12-10 13:23         ` Shannon Zhao
2015-12-10 13:23           ` Shannon Zhao
2015-12-10 13:23           ` Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 11/21] KVM: ARM64: Add access handler for PMXEVCNTR register Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 16:33   ` Marc Zyngier
2015-12-08 16:33     ` Marc Zyngier
2015-12-08 12:47 ` [PATCH v6 12/21] KVM: ARM64: Add reset and access handlers for PMCNTENSET and PMCNTENCLR register Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 16:42   ` Marc Zyngier
2015-12-08 16:42     ` Marc Zyngier
2015-12-09  8:35     ` Shannon Zhao
2015-12-09  8:35       ` Shannon Zhao
2015-12-09  8:35       ` Shannon Zhao
2015-12-09  8:56       ` Marc Zyngier
2015-12-09  8:56         ` Marc Zyngier
2015-12-08 12:47 ` [PATCH v6 13/21] KVM: ARM64: Add reset and access handlers for PMINTENSET and PMINTENCLR register Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 14/21] KVM: ARM64: Add reset and access handlers for PMOVSSET and PMOVSCLR register Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 16:59   ` Marc Zyngier
2015-12-08 16:59     ` Marc Zyngier
2015-12-09  8:47     ` Shannon Zhao [this message]
2015-12-09  8:47       ` Shannon Zhao
2015-12-09  8:47       ` Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 15/21] KVM: ARM64: Add reset and access handlers for PMUSERENR register Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 17:03   ` Marc Zyngier
2015-12-08 17:03     ` Marc Zyngier
2015-12-09  9:18     ` Shannon Zhao
2015-12-09  9:18       ` Shannon Zhao
2015-12-09  9:18       ` Shannon Zhao
2015-12-09  9:49       ` Marc Zyngier
2015-12-09  9:49         ` Marc Zyngier
2015-12-09  9:49         ` Marc Zyngier
2015-12-08 12:47 ` [PATCH v6 16/21] KVM: ARM64: Add reset and access handlers for PMSWINC register Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 17/21] KVM: ARM64: Add helper to handle PMCR register bits Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 17:36   ` Marc Zyngier
2015-12-08 17:36     ` Marc Zyngier
2015-12-08 12:47 ` [PATCH v6 18/21] KVM: ARM64: Add PMU overflow interrupt routing Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 17:37   ` Marc Zyngier
2015-12-08 17:37     ` Marc Zyngier
2015-12-08 12:47 ` [PATCH v6 19/21] KVM: ARM64: Reset PMU state when resetting vcpu Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 20/21] KVM: ARM64: Free perf event of PMU when destroying vcpu Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 21/21] KVM: ARM64: Add a new kvm ARM PMU device Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 12:47   ` Shannon Zhao
2015-12-08 17:43   ` Marc Zyngier
2015-12-08 17:43     ` Marc Zyngier
2015-12-08 17:56 ` [PATCH v6 00/21] KVM: ARM64: Add guest PMU support Marc Zyngier
2015-12-08 17:56   ` Marc Zyngier

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