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From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Tudor Ambarus <tudor.ambarus@linaro.org>
Cc: Richard Weinberger <richard@nod.at>,
	 Vignesh Raghavendra <vigneshr@ti.com>,
	 Pratyush Yadav <pratyush@kernel.org>,
	 Michael Walle <michael@walle.cc>,
	 linux-mtd@lists.infradead.org,  Mark Brown <broonie@kernel.org>,
	 linux-spi@vger.kernel.org,  Steam Lin <stlin2@winbond.com>,
	 Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Sanjay R Mehta <sanju.mehta@amd.com>,  Han Xu <han.xu@nxp.com>,
	 Conor Dooley <conor.dooley@microchip.com>,
	 Daire McNamara <daire.mcnamara@microchip.com>,
	 Matthias Brugger <matthias.bgg@gmail.com>,
	 AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>,
	 Haibo Chen <haibo.chen@nxp.com>,
	 Yogesh Gaur <yogeshgaur.83@gmail.com>,
	 Heiko Stuebner <heiko@sntech.de>,
	 Michal Simek <michal.simek@amd.com>
Subject: Re: [PATCH 01/24] spi: spi-mem: Extend spi-mem operations with a per-operation maximum frequency
Date: Fri, 13 Dec 2024 11:46:47 +0100	[thread overview]
Message-ID: <87jzc3oo6g.fsf@bootlin.com> (raw)
In-Reply-To: <e76ff30b-342e-4e4c-aa84-40312c3ffc72@linaro.org> (Tudor Ambarus's message of "Mon, 11 Nov 2024 13:07:09 +0000")

Hello Tudor,

On 11/11/2024 at 13:07:09 GMT, Tudor Ambarus <tudor.ambarus@linaro.org> wrote:

> On 10/25/24 5:14 PM, Miquel Raynal wrote:
>
> cut
>
>> 
>> diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
>> index 17b8baf749e6..ab650ae953bb 100644
>> --- a/drivers/spi/spi-mem.c
>> +++ b/drivers/spi/spi-mem.c
>> @@ -356,6 +356,7 @@ int spi_mem_exec_op(struct spi_mem *mem, const struct spi_mem_op *op)
>>  {
>>  	unsigned int tmpbufsize, xferpos = 0, totalxferlen = 0;
>>  	struct spi_controller *ctlr = mem->spi->controller;
>> +	unsigned int xfer_speed = op->max_freq;
>
> be aware that for controllers that don't support SPIMEM ops, you pass
> the frequency from the upper layers, without adjusting it with
> spi->max_speed_hz. Was this intentional?

That is exactly the opposite of what I wanted to achieve
initially. That's a very good catch.

>>  	struct spi_transfer xfers[4] = { };
>>  	struct spi_message msg;
>>  	u8 *tmpbuf;
>> @@ -368,6 +369,9 @@ int spi_mem_exec_op(struct spi_mem *mem, const struct spi_mem_op *op)
>>  	if (!spi_mem_internal_supports_op(mem, op))
>>  		return -EOPNOTSUPP;
>>  
>> +	if (!op->max_freq || op->max_freq > mem->spi->max_speed_hz)
>> +		((struct spi_mem_op *)op)->max_freq = mem->spi->max_speed_hz;
>
> not a big fan of casting the const out. How about introducing a
> spi_mem_adjust_op_freq()? The upper layers will use that were needed,
> and you'll still be able to pass a const op to spi_mem_exec_op()

I know it is not ideal so to follow your idea I drafted the use of
spi_mem_adjust_op_freq(). In order to avoid the cast, we actually need
to call this function everywhere in the core and the drivers to make
sure we never get out of bounds, but here is the problem:

    $ git grep -w spi_mem_exec_op -- drivers/ | wc -l
    42

This approach requires to add a call to spi_mem_adjust_op_freq() before
*every* spi_mem_exec_op(). Yes I can do that but that means to be very
attentive to the fact that these two functions are always called
together. I am not sure it is a good idea.

What about doing the following once in spi_mem_exec_op() instead?

    spi_mem_adjust_op_freq(desc->mem, (struct spi_mem_op *)op);

I know we still have a cast, but it feels more acceptable than the one I
initially proposed and covers all cases. I would not accept that in a
driver, but here we are in the core, so that sounds acceptable.

Another possibility otherwise would be to drop the const from the
spi_mem_op structure entirely. But I prefer the above function call.

>> diff --git a/include/linux/spi/spi-mem.h b/include/linux/spi/spi-mem.h
>> index f866d5c8ed32..8963f236911b 100644
>> --- a/include/linux/spi/spi-mem.h
>> +++ b/include/linux/spi/spi-mem.h
>> @@ -68,6 +68,9 @@ enum spi_mem_data_dir {
>>  	SPI_MEM_DATA_OUT,
>>  };
>>  
>> +#define SPI_MEM_OP_MAX_FREQ(__freq)				\
>> +	.max_freq = __freq
>> +
>>  /**
>>   * struct spi_mem_op - describes a SPI memory operation
>>   * @cmd.nbytes: number of opcode bytes (only 1 or 2 are valid). The opcode is
>> @@ -95,6 +98,9 @@ enum spi_mem_data_dir {
>>   *		 operation does not involve transferring data
>>   * @data.buf.in: input buffer (must be DMA-able)
>>   * @data.buf.out: output buffer (must be DMA-able)
>> + * @max_freq: frequency limitation wrt this operation. 0 means there is no
>> + *	      specific constraint and the highest achievable frequency can be
>> + *	      attempted).
>
> nit: you close a parenthesis without opening one

Corrected!

Thanks for this very useful feedback!
Miquèl

______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Tudor Ambarus <tudor.ambarus@linaro.org>
Cc: Richard Weinberger <richard@nod.at>,
	 Vignesh Raghavendra <vigneshr@ti.com>,
	 Pratyush Yadav <pratyush@kernel.org>,
	 Michael Walle <michael@walle.cc>,
	 linux-mtd@lists.infradead.org,  Mark Brown <broonie@kernel.org>,
	 linux-spi@vger.kernel.org,  Steam Lin <stlin2@winbond.com>,
	 Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Sanjay R Mehta <sanju.mehta@amd.com>,  Han Xu <han.xu@nxp.com>,
	 Conor Dooley <conor.dooley@microchip.com>,
	 Daire McNamara <daire.mcnamara@microchip.com>,
	 Matthias Brugger <matthias.bgg@gmail.com>,
	 AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>,
	 Haibo Chen <haibo.chen@nxp.com>,
	 Yogesh Gaur <yogeshgaur.83@gmail.com>,
	 Heiko Stuebner <heiko@sntech.de>,
	 Michal Simek <michal.simek@amd.com>
Subject: Re: [PATCH 01/24] spi: spi-mem: Extend spi-mem operations with a per-operation maximum frequency
Date: Fri, 13 Dec 2024 11:46:47 +0100	[thread overview]
Message-ID: <87jzc3oo6g.fsf@bootlin.com> (raw)
In-Reply-To: <e76ff30b-342e-4e4c-aa84-40312c3ffc72@linaro.org> (Tudor Ambarus's message of "Mon, 11 Nov 2024 13:07:09 +0000")

Hello Tudor,

On 11/11/2024 at 13:07:09 GMT, Tudor Ambarus <tudor.ambarus@linaro.org> wrote:

> On 10/25/24 5:14 PM, Miquel Raynal wrote:
>
> cut
>
>> 
>> diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
>> index 17b8baf749e6..ab650ae953bb 100644
>> --- a/drivers/spi/spi-mem.c
>> +++ b/drivers/spi/spi-mem.c
>> @@ -356,6 +356,7 @@ int spi_mem_exec_op(struct spi_mem *mem, const struct spi_mem_op *op)
>>  {
>>  	unsigned int tmpbufsize, xferpos = 0, totalxferlen = 0;
>>  	struct spi_controller *ctlr = mem->spi->controller;
>> +	unsigned int xfer_speed = op->max_freq;
>
> be aware that for controllers that don't support SPIMEM ops, you pass
> the frequency from the upper layers, without adjusting it with
> spi->max_speed_hz. Was this intentional?

That is exactly the opposite of what I wanted to achieve
initially. That's a very good catch.

>>  	struct spi_transfer xfers[4] = { };
>>  	struct spi_message msg;
>>  	u8 *tmpbuf;
>> @@ -368,6 +369,9 @@ int spi_mem_exec_op(struct spi_mem *mem, const struct spi_mem_op *op)
>>  	if (!spi_mem_internal_supports_op(mem, op))
>>  		return -EOPNOTSUPP;
>>  
>> +	if (!op->max_freq || op->max_freq > mem->spi->max_speed_hz)
>> +		((struct spi_mem_op *)op)->max_freq = mem->spi->max_speed_hz;
>
> not a big fan of casting the const out. How about introducing a
> spi_mem_adjust_op_freq()? The upper layers will use that were needed,
> and you'll still be able to pass a const op to spi_mem_exec_op()

I know it is not ideal so to follow your idea I drafted the use of
spi_mem_adjust_op_freq(). In order to avoid the cast, we actually need
to call this function everywhere in the core and the drivers to make
sure we never get out of bounds, but here is the problem:

    $ git grep -w spi_mem_exec_op -- drivers/ | wc -l
    42

This approach requires to add a call to spi_mem_adjust_op_freq() before
*every* spi_mem_exec_op(). Yes I can do that but that means to be very
attentive to the fact that these two functions are always called
together. I am not sure it is a good idea.

What about doing the following once in spi_mem_exec_op() instead?

    spi_mem_adjust_op_freq(desc->mem, (struct spi_mem_op *)op);

I know we still have a cast, but it feels more acceptable than the one I
initially proposed and covers all cases. I would not accept that in a
driver, but here we are in the core, so that sounds acceptable.

Another possibility otherwise would be to drop the const from the
spi_mem_op structure entirely. But I prefer the above function call.

>> diff --git a/include/linux/spi/spi-mem.h b/include/linux/spi/spi-mem.h
>> index f866d5c8ed32..8963f236911b 100644
>> --- a/include/linux/spi/spi-mem.h
>> +++ b/include/linux/spi/spi-mem.h
>> @@ -68,6 +68,9 @@ enum spi_mem_data_dir {
>>  	SPI_MEM_DATA_OUT,
>>  };
>>  
>> +#define SPI_MEM_OP_MAX_FREQ(__freq)				\
>> +	.max_freq = __freq
>> +
>>  /**
>>   * struct spi_mem_op - describes a SPI memory operation
>>   * @cmd.nbytes: number of opcode bytes (only 1 or 2 are valid). The opcode is
>> @@ -95,6 +98,9 @@ enum spi_mem_data_dir {
>>   *		 operation does not involve transferring data
>>   * @data.buf.in: input buffer (must be DMA-able)
>>   * @data.buf.out: output buffer (must be DMA-able)
>> + * @max_freq: frequency limitation wrt this operation. 0 means there is no
>> + *	      specific constraint and the highest achievable frequency can be
>> + *	      attempted).
>
> nit: you close a parenthesis without opening one

Corrected!

Thanks for this very useful feedback!
Miquèl

  reply	other threads:[~2024-12-13 10:47 UTC|newest]

Thread overview: 142+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-25 16:14 [PATCH 00/24] spi-nand/spi-mem DTR support Miquel Raynal
2024-10-25 16:14 ` Miquel Raynal
2024-10-25 16:14 ` [PATCH 01/24] spi: spi-mem: Extend spi-mem operations with a per-operation maximum frequency Miquel Raynal
2024-10-25 16:14   ` Miquel Raynal
2024-10-30 20:52   ` Han Xu
2024-10-30 20:52     ` Han Xu
2024-10-31  6:45     ` Tudor Ambarus
2024-10-31  6:45       ` Tudor Ambarus
2024-11-11 13:07   ` Tudor Ambarus
2024-11-11 13:07     ` Tudor Ambarus
2024-12-13 10:46     ` Miquel Raynal [this message]
2024-12-13 10:46       ` Miquel Raynal
2024-12-18  8:07       ` Tudor Ambarus
2024-12-18  8:07         ` Tudor Ambarus
2024-12-18  9:37         ` Miquel Raynal
2024-12-18  9:37           ` Miquel Raynal
2024-12-18 10:03           ` Tudor Ambarus
2024-12-18 10:03             ` Tudor Ambarus
2024-12-18 10:13             ` Tudor Ambarus
2024-12-18 10:13               ` Tudor Ambarus
2024-12-23 19:08               ` Miquel Raynal
2024-12-23 19:08                 ` Miquel Raynal
2024-11-25 16:05   ` Pratyush Yadav
2024-11-25 16:05     ` Pratyush Yadav
2024-10-25 16:14 ` [PATCH 02/24] spi: spi-mem: Add a new controller capability Miquel Raynal
2024-10-25 16:14   ` Miquel Raynal
2024-10-28 21:10   ` Mark Brown
2024-10-28 21:10     ` Mark Brown
2024-11-01 20:17   ` Mark Brown
2024-11-01 20:17     ` Mark Brown
2024-11-07 10:40     ` Miquel Raynal
2024-11-07 10:40       ` Miquel Raynal
2024-11-07 17:15       ` Mark Brown
2024-11-07 17:15         ` Mark Brown
2024-11-08  8:55         ` Miquel Raynal
2024-11-08  8:55           ` Miquel Raynal
2024-11-08 12:59           ` Mark Brown
2024-11-08 12:59             ` Mark Brown
2024-11-11 13:18   ` Tudor Ambarus
2024-11-11 13:18     ` Tudor Ambarus
2024-12-13 11:00     ` Miquel Raynal
2024-12-13 11:00       ` Miquel Raynal
2024-10-25 16:14 ` [PATCH 03/24] spi: amd: Support per spi-mem operation frequency switches Miquel Raynal
2024-10-25 16:14   ` Miquel Raynal
2024-11-11 13:36   ` Tudor Ambarus
2024-11-11 13:36     ` Tudor Ambarus
2024-12-13 11:20     ` Miquel Raynal
2024-12-13 11:20       ` Miquel Raynal
2024-10-25 16:14 ` [PATCH 04/24] spi: amlogic-spifc-a1: " Miquel Raynal
2024-10-25 16:14   ` Miquel Raynal
2024-11-11 13:42   ` Tudor Ambarus
2024-11-11 13:42     ` Tudor Ambarus
2024-12-13 11:44     ` Miquel Raynal
2024-12-13 11:44       ` Miquel Raynal
2024-12-18  8:09       ` Tudor Ambarus
2024-12-18  8:09         ` Tudor Ambarus
2024-10-25 16:14 ` [PATCH 05/24] spi: cadence-qspi: " Miquel Raynal
2024-10-25 16:14   ` Miquel Raynal
2024-11-11 13:50   ` Tudor Ambarus
2024-11-11 13:50     ` Tudor Ambarus
2024-10-25 16:14 ` [PATCH 06/24] spi: dw: " Miquel Raynal
2024-10-25 16:14   ` Miquel Raynal
2024-11-11 14:05   ` Tudor Ambarus
2024-11-11 14:05     ` Tudor Ambarus
2024-10-25 16:14 ` [PATCH 07/24] spi: fsl-qspi: " Miquel Raynal
2024-10-25 16:14   ` Miquel Raynal
2024-10-25 16:14 ` [PATCH 08/24] spi: microchip-core-qspi: " Miquel Raynal
2024-10-25 16:14   ` Miquel Raynal
2024-10-25 16:14 ` [PATCH 09/24] spi: mt65xx: " Miquel Raynal
2024-10-25 16:14   ` Miquel Raynal
2024-10-25 16:14 ` [PATCH 10/24] spi: mxic: " Miquel Raynal
2024-10-25 16:14   ` Miquel Raynal
2024-10-25 16:14 ` [PATCH 11/24] spi: nxp-fspi: " Miquel Raynal
2024-10-25 16:14   ` Miquel Raynal
2024-10-25 16:14 ` [PATCH 12/24] spi: rockchip-sfc: " Miquel Raynal
2024-10-25 16:14   ` Miquel Raynal
2024-10-25 16:14 ` [PATCH 13/24] spi: spi-sn-f-ospi: " Miquel Raynal
2024-10-25 16:14   ` Miquel Raynal
2024-10-25 16:14 ` [PATCH 14/24] spi: spi-ti-qspi: " Miquel Raynal
2024-10-25 16:14   ` Miquel Raynal
2024-10-25 16:14 ` [PATCH 15/24] spi: zynq-qspi: " Miquel Raynal
2024-10-25 16:14   ` Miquel Raynal
2024-10-25 16:14 ` [PATCH 16/24] spi: zynqmp-gqspi: " Miquel Raynal
2024-10-25 16:14   ` Miquel Raynal
2024-10-25 16:14 ` [PATCH 17/24] mtd: spinand: Create distinct fast and slow read from cache variants Miquel Raynal
2024-10-25 16:14   ` Miquel Raynal
2024-11-11 14:14   ` Tudor Ambarus
2024-11-11 14:14     ` Tudor Ambarus
2024-10-25 16:14 ` [PATCH 18/24] mtd: spinand: Add an optional frequency to read from cache macros Miquel Raynal
2024-10-25 16:14   ` Miquel Raynal
2024-11-11 14:17   ` Tudor Ambarus
2024-11-11 14:17     ` Tudor Ambarus
2024-12-13 11:56     ` Miquel Raynal
2024-12-13 11:56       ` Miquel Raynal
2024-10-25 16:14 ` [PATCH 19/24] mtd: spinand: winbond: Fix the *JW chip definitions Miquel Raynal
2024-10-25 16:14   ` Miquel Raynal
2024-11-11 14:27   ` Tudor Ambarus
2024-11-11 14:27     ` Tudor Ambarus
2024-12-18  8:16     ` Tudor Ambarus
2024-12-18  8:16       ` Tudor Ambarus
2024-12-18  9:34       ` Miquel Raynal
2024-12-18  9:34         ` Miquel Raynal
2024-10-25 16:14 ` [PATCH 20/24] spi: spi-mem: Reorder SPI_MEM_OP_CMD internals Miquel Raynal
2024-10-25 16:14   ` Miquel Raynal
2024-11-11 14:32   ` Tudor Ambarus
2024-11-11 14:32     ` Tudor Ambarus
2024-12-13 12:05     ` Miquel Raynal
2024-12-13 12:05       ` Miquel Raynal
2024-10-25 16:14 ` [PATCH 21/24] spi: spi-mem: Create macros for DTR operation Miquel Raynal
2024-10-25 16:14   ` Miquel Raynal
2024-10-25 16:14 ` [PATCH 22/24] mtd: spinand: Add support for read DTR operations Miquel Raynal
2024-10-25 16:14   ` Miquel Raynal
2024-11-11 14:35   ` Tudor Ambarus
2024-11-11 14:35     ` Tudor Ambarus
2024-12-13 12:08     ` Miquel Raynal
2024-12-13 12:08       ` Miquel Raynal
2024-12-18  8:10       ` Tudor Ambarus
2024-12-18  8:10         ` Tudor Ambarus
2024-10-25 16:15 ` [PATCH 23/24] mtd: spinand: winbond: Add comment about naming Miquel Raynal
2024-10-25 16:15   ` Miquel Raynal
2024-11-11 14:38   ` Tudor Ambarus
2024-11-11 14:38     ` Tudor Ambarus
2024-11-13  9:46     ` Tudor Ambarus
2024-11-13  9:46       ` Tudor Ambarus
2024-12-13 12:25     ` Miquel Raynal
2024-12-13 12:25       ` Miquel Raynal
2024-12-18  8:14       ` Tudor Ambarus
2024-12-18  8:14         ` Tudor Ambarus
2024-12-18  9:33         ` Miquel Raynal
2024-12-18  9:33           ` Miquel Raynal
2024-12-18 10:21           ` Tudor Ambarus
2024-12-18 10:21             ` Tudor Ambarus
2024-10-25 16:15 ` [PATCH 24/24] mtd: spinand: winbond: Add support for DTR operations Miquel Raynal
2024-10-25 16:15   ` Miquel Raynal
2024-11-11 14:40   ` Tudor Ambarus
2024-11-11 14:40     ` Tudor Ambarus
2024-12-23 18:22     ` Miquel Raynal
2024-12-23 18:22       ` Miquel Raynal
2024-12-24  9:38       ` Miquel Raynal
2024-12-24  9:38         ` Miquel Raynal
2025-01-10 15:47 ` (subset) [PATCH 00/24] spi-nand/spi-mem DTR support Mark Brown
2025-01-10 15:47   ` Mark Brown

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