[PULL] u-boot-riscv/master

[Leo Liang <ycliang@andestech.com>]

Hi Tom, 

The following changes since commit c8d9ff634fc429db5acf2f5386ea937f0fef1ae7:

  Merge branch '2022-10-31-FWU-add-FWU-multi-bank-update-feature-support' (2022-11-01 09:32:21 -0400)

are available in the Git repository at:

  https://source.denx.de/u-boot/custodians/u-boot-riscv.git

for you to fetch changes up to 7321bad25f18684b53cff4346543fb2da2a2c0d0:

  riscv: Update Microchip MPFS Icicle Kit support (2022-11-03 13:27:56 +0800)

CI result shows no issue: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/13999

----------------------------------------------------------------
Padmarao Begari (4):
      riscv: dts: Update memory configuration
      riscv: dts: Add QSPI NAND device node
      spi: Add Microchip PolarFire SoC QSPI driver
      riscv: Update Microchip MPFS Icicle Kit support

Yu Chien Peter Lin (1):
      riscv: Rename Andes PLIC to PLICSW

 arch/riscv/Kconfig                              |   6 +--
 arch/riscv/cpu/ax25/Kconfig                     |   2 +-
 arch/riscv/dts/ae350-u-boot.dtsi                |   2 +-
 arch/riscv/dts/ae350_32.dts                     |   6 +--
 arch/riscv/dts/ae350_64.dts                     |   6 +--
 arch/riscv/dts/microchip-mpfs-icicle-kit.dts    |  91 ++++++++++++--------------------
 arch/riscv/include/asm/global_data.h            |   4 +-
 arch/riscv/include/asm/syscon.h                 |   2 +-
 arch/riscv/lib/Makefile                         |   2 +-
 arch/riscv/lib/{andes_plic.c => andes_plicsw.c} |  26 +++++-----
 board/microchip/mpfs_icicle/Kconfig             |   7 +++
 configs/microchip_mpfs_icicle_defconfig         |   1 +
 drivers/spi/Kconfig                             |   6 +++
 drivers/spi/Makefile                            |   1 +
 drivers/spi/microchip_coreqspi.c                | 505 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 drivers/timer/andes_plmt_timer.c                |   2 +-
 16 files changed, 582 insertions(+), 87 deletions(-)
 rename arch/riscv/lib/{andes_plic.c => andes_plicsw.c} (76%)
 create mode 100644 drivers/spi/microchip_coreqspi.c

Best regards,
Leo