[PULL] u-boot-riscv/master

[Leo Liang <ycliang@andestech.com>]

Hi Tom,

The following changes since commit a0da2dda4ed9d0aee5265e9cd8876734f9f80e09:

  Prepare v2021.10-rc2 (2021-08-16 14:18:45 -0400)

are available in the Git repository at:

  git@source.denx.de:u-boot/custodians/u-boot-riscv.git 

for you to fetch changes up to 47d73ba4f4a40f17622d93f96b48e285b73c3061:

  board: sifive: overwrite board_fdt_blob_setup in u-boot proper (2021-08-17 19:28:37 +0800)

CI result shows no issue:
https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/8749

----------------------------------------------------------------
Dimitri John Ledkov (1):
      qemu-riscv64_smode: fix extlinux (define preboot)

Zong Li (3):
      riscv: cpu: fu740: Fix typo of date
      board: sifive: compile stuff only related to SPL in SPL build
      board: sifive: overwrite board_fdt_blob_setup in u-boot proper

 arch/riscv/cpu/fu740/spl.c           |  2 +-
 board/sifive/unleashed/Makefile      |  4 ++--
 board/sifive/unleashed/unleashed.c   | 11 +++++++++++
 board/sifive/unmatched/Makefile      |  3 ++-
 board/sifive/unmatched/unmatched.c   | 11 +++++++++++
 configs/qemu-riscv64_smode_defconfig |  2 ++
 6 files changed, 29 insertions(+), 4 deletions(-)