* [Intel-gfx] [PATCH i-g-t 2/4] i915/gem_exec_fence: Cleanup 32bit printfs
2020-08-20 18:26 [Intel-gfx] [PATCH i-g-t 1/4] i915/perf: 32bit printf cleanup Chris Wilson
@ 2020-08-20 18:26 ` Chris Wilson
2020-08-20 18:26 ` [Intel-gfx] [PATCH i-g-t 3/4] i915/bb: " Chris Wilson
` (2 subsequent siblings)
3 siblings, 0 replies; 7+ messages in thread
From: Chris Wilson @ 2020-08-20 18:26 UTC (permalink / raw)
To: igt-dev; +Cc: intel-gfx, Chris Wilson
Use PRI[ux]64 for printing 64bit values in a 32bit build.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
tests/i915/gem_exec_fence.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/tests/i915/gem_exec_fence.c b/tests/i915/gem_exec_fence.c
index b240c30bf..0b8ab1400 100644
--- a/tests/i915/gem_exec_fence.c
+++ b/tests/i915/gem_exec_fence.c
@@ -2408,7 +2408,7 @@ static void build_wait_bb(struct inter_engine_context *context,
uint64_t wait_value =
0xffffffffffffffff - (delay * timestamp_frequency) / NSEC_PER_SEC;
- igt_debug("wait_value=0x%lx\n", wait_value);
+ igt_debug("wait_value=0x%"PRIx64"\n", wait_value);
*bb++ = MI_LOAD_REGISTER_IMM;
*bb++ = 0x2000 + HSW_CS_GPR(0);
@@ -2680,7 +2680,7 @@ static void setup_timeline_chain_engines(struct inter_engine_context *context, i
}
for (uint32_t i = 0; i < 10; i++)
- igt_debug("%u = %lu\n", i, fib(i));
+ igt_debug("%u = %"PRIu64"\n", i, fib(i));
/* Bootstrap the fibonacci sequence */
{
@@ -2759,7 +2759,7 @@ static void test_syncobj_timeline_chain_engines(int fd, struct intel_engine_data
counter_output = gem_mmap__wc(fd, ctx.engine_counter_object.handle, 0, 4096, PROT_READ);
for (uint32_t i = 0; i < ctx.engines->nengines; i++)
- igt_debug("engine %i (%s)\t= %016lx\n", i,
+ igt_debug("engine %i (%s)\t= %016"PRIx64"\n", i,
ctx.engines->engines[i].name, counter_output[i]);
/*
@@ -2825,7 +2825,7 @@ static void test_syncobj_stationary_timeline_chain_engines(int fd, struct intel_
counter_output = gem_mmap__wc(fd, ctx.engine_counter_object.handle, 0, 4096, PROT_READ);
for (uint32_t i = 0; i < ctx.engines->nengines; i++)
- igt_debug("engine %i (%s)\t= %016lx\n", i,
+ igt_debug("engine %i (%s)\t= %016"PRIx64"\n", i,
ctx.engines->engines[i].name, counter_output[i]);
igt_assert_eq(counter_output[engines->nengines - 1],
fib(ARRAY_SIZE(ctx.iterations) * engines->nengines + 1));
@@ -2886,7 +2886,7 @@ static void test_syncobj_backward_timeline_chain_engines(int fd, struct intel_en
counter_output = gem_mmap__wc(fd, ctx.engine_counter_object.handle, 0, 4096, PROT_READ);
for (uint32_t i = 0; i < ctx.engines->nengines; i++)
- igt_debug("engine %i (%s)\t= %016lx\n", i,
+ igt_debug("engine %i (%s)\t= %016"PRIx64"\n", i,
ctx.engines->engines[i].name, counter_output[i]);
igt_assert_eq(counter_output[engines->nengines - 1],
fib(ARRAY_SIZE(ctx.iterations) * engines->nengines + 1));
--
2.28.0
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^ permalink raw reply related [flat|nested] 7+ messages in thread* [Intel-gfx] [PATCH i-g-t 3/4] i915/bb: Cleanup 32bit printfs
2020-08-20 18:26 [Intel-gfx] [PATCH i-g-t 1/4] i915/perf: 32bit printf cleanup Chris Wilson
2020-08-20 18:26 ` [Intel-gfx] [PATCH i-g-t 2/4] i915/gem_exec_fence: Cleanup 32bit printfs Chris Wilson
@ 2020-08-20 18:26 ` Chris Wilson
2020-08-20 18:26 ` [Intel-gfx] [PATCH i-g-t 4/4] i915/gem_exec_alignment: 32b printf cleanups Chris Wilson
2020-08-20 21:45 ` [Intel-gfx] [PATCH i-g-t 1/4] i915/perf: 32bit printf cleanup Lionel Landwerlin
3 siblings, 0 replies; 7+ messages in thread
From: Chris Wilson @ 2020-08-20 18:26 UTC (permalink / raw)
To: igt-dev; +Cc: intel-gfx, Chris Wilson
Use PRIx64 for 64b addresses on a 32b build.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
tests/i915/api_intel_bb.c | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/tests/i915/api_intel_bb.c b/tests/i915/api_intel_bb.c
index 6967fc5d0..cf7f6e91b 100644
--- a/tests/i915/api_intel_bb.c
+++ b/tests/i915/api_intel_bb.c
@@ -260,9 +260,9 @@ static void blit(struct buf_ops *bops,
poff_bb = intel_bb_get_object_offset(ibb, ibb->handle);
poff_src = intel_bb_get_object_offset(ibb, src->handle);
poff_dst = intel_bb_get_object_offset(ibb, dst->handle);
- igt_debug("bb presumed offset: 0x%lx\n", poff_bb);
- igt_debug("src presumed offset: 0x%lx\n", poff_src);
- igt_debug("dst presumed offset: 0x%lx\n", poff_dst);
+ igt_debug("bb presumed offset: 0x%"PRIx64"\n", poff_bb);
+ igt_debug("src presumed offset: 0x%"PRIx64"\n", poff_src);
+ igt_debug("dst presumed offset: 0x%"PRIx64"\n", poff_dst);
if (reloc_obj == RELOC) {
igt_assert(poff_bb == 0);
igt_assert(poff_src == 0);
@@ -289,12 +289,12 @@ static void blit(struct buf_ops *bops,
poff2_dst = intel_bb_get_object_offset(ibb, dst->handle);
igt_debug("purge: %d, relocs: %d\n", purge_cache, do_relocs);
- igt_debug("bb presumed offset: 0x%lx\n", poff_bb);
- igt_debug("src presumed offset: 0x%lx\n", poff_src);
- igt_debug("dst presumed offset: 0x%lx\n", poff_dst);
- igt_debug("bb2 presumed offset: 0x%lx\n", poff2_bb);
- igt_debug("src2 presumed offset: 0x%lx\n", poff2_src);
- igt_debug("dst2 presumed offset: 0x%lx\n", poff2_dst);
+ igt_debug("bb presumed offset: 0x%"PRIx64"\n", poff_bb);
+ igt_debug("src presumed offset: 0x%"PRIx64"\n", poff_src);
+ igt_debug("dst presumed offset: 0x%"PRIx64"\n", poff_dst);
+ igt_debug("bb2 presumed offset: 0x%"PRIx64"\n", poff2_bb);
+ igt_debug("src2 presumed offset: 0x%"PRIx64"\n", poff2_src);
+ igt_debug("dst2 presumed offset: 0x%"PRIx64"\n", poff2_dst);
if (purge_cache) {
if (do_relocs) {
igt_assert(poff2_bb == 0);
--
2.28.0
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread* [Intel-gfx] [PATCH i-g-t 4/4] i915/gem_exec_alignment: 32b printf cleanups
2020-08-20 18:26 [Intel-gfx] [PATCH i-g-t 1/4] i915/perf: 32bit printf cleanup Chris Wilson
2020-08-20 18:26 ` [Intel-gfx] [PATCH i-g-t 2/4] i915/gem_exec_fence: Cleanup 32bit printfs Chris Wilson
2020-08-20 18:26 ` [Intel-gfx] [PATCH i-g-t 3/4] i915/bb: " Chris Wilson
@ 2020-08-20 18:26 ` Chris Wilson
2020-08-20 21:45 ` [Intel-gfx] [PATCH i-g-t 1/4] i915/perf: 32bit printf cleanup Lionel Landwerlin
3 siblings, 0 replies; 7+ messages in thread
From: Chris Wilson @ 2020-08-20 18:26 UTC (permalink / raw)
To: igt-dev; +Cc: intel-gfx, Chris Wilson
PRIu64 to the rescue!
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
tests/i915/gem_exec_alignment.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/i915/gem_exec_alignment.c b/tests/i915/gem_exec_alignment.c
index 17a14bef4..7bbd2a8fc 100644
--- a/tests/i915/gem_exec_alignment.c
+++ b/tests/i915/gem_exec_alignment.c
@@ -204,7 +204,7 @@ naughty_child(int i915, int link, uint32_t shared, unsigned int flags)
execbuf.buffer_count =
create_batch(i915, obj, execbuf.buffer_count, count, flags);
gem_execbuf(i915, &execbuf);
- igt_debug("Created %lu buffers ready for delay\n", count);
+ igt_debug("Created %"PRIu64" buffers ready for delay\n", count);
/* Calibrate a long execbuf() */
memset(&tv, 0, sizeof(tv));
--
2.28.0
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [Intel-gfx] [PATCH i-g-t 1/4] i915/perf: 32bit printf cleanup
2020-08-20 18:26 [Intel-gfx] [PATCH i-g-t 1/4] i915/perf: 32bit printf cleanup Chris Wilson
` (2 preceding siblings ...)
2020-08-20 18:26 ` [Intel-gfx] [PATCH i-g-t 4/4] i915/gem_exec_alignment: 32b printf cleanups Chris Wilson
@ 2020-08-20 21:45 ` Lionel Landwerlin
2020-08-21 7:54 ` [Intel-gfx] [igt-dev] " Petri Latvala
3 siblings, 1 reply; 7+ messages in thread
From: Lionel Landwerlin @ 2020-08-20 21:45 UTC (permalink / raw)
To: Chris Wilson, igt-dev; +Cc: intel-gfx
On 20/08/2020 20:26, Chris Wilson wrote:
> Use PRI[du]64 as necessary for 32bit builds.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Thanks!
-Lionel
> ---
> tests/i915/perf.c | 8 ++++----
> tools/i915-perf/i915_perf_recorder.c | 2 +-
> 2 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/tests/i915/perf.c b/tests/i915/perf.c
> index 92edc9f1f..a894fd382 100644
> --- a/tests/i915/perf.c
> +++ b/tests/i915/perf.c
> @@ -2077,7 +2077,7 @@ test_blocking(uint64_t requested_oa_period, bool set_kernel_hrtimer, uint64_t ke
> user_ns = (end_times.tms_utime - start_times.tms_utime) * tick_ns;
> kernel_ns = (end_times.tms_stime - start_times.tms_stime) * tick_ns;
>
> - igt_debug("%d blocking reads during test with %lu Hz OA sampling (expect no more than %d)\n",
> + igt_debug("%d blocking reads during test with %"PRIu64" Hz OA sampling (expect no more than %d)\n",
> n, NSEC_PER_SEC / oa_period, max_iterations);
> igt_debug("%d extra iterations seen, not related to periodic sampling (e.g. context switches)\n",
> n_extra_iterations);
> @@ -2265,7 +2265,7 @@ test_polling(uint64_t requested_oa_period, bool set_kernel_hrtimer, uint64_t ker
> user_ns = (end_times.tms_utime - start_times.tms_utime) * tick_ns;
> kernel_ns = (end_times.tms_stime - start_times.tms_stime) * tick_ns;
>
> - igt_debug("%d non-blocking reads during test with %lu Hz OA sampling (expect no more than %d)\n",
> + igt_debug("%d non-blocking reads during test with %"PRIu64" Hz OA sampling (expect no more than %d)\n",
> n, NSEC_PER_SEC / oa_period, max_iterations);
> igt_debug("%d extra iterations seen, not related to periodic sampling (e.g. context switches)\n",
> n_extra_iterations);
> @@ -2357,7 +2357,7 @@ num_valid_reports_captured(struct drm_i915_perf_open_param *param,
> int64_t start, end;
> int num_reports = 0;
>
> - igt_debug("Expected duration = %lu\n", *duration_ns);
> + igt_debug("Expected duration = %"PRId64"\n", *duration_ns);
>
> stream_fd = __perf_open(drm_fd, param, true);
>
> @@ -2389,7 +2389,7 @@ num_valid_reports_captured(struct drm_i915_perf_open_param *param,
>
> *duration_ns = end - start;
>
> - igt_debug("Actual duration = %lu\n", *duration_ns);
> + igt_debug("Actual duration = %"PRIu64"\n", *duration_ns);
>
> return num_reports;
> }
> diff --git a/tools/i915-perf/i915_perf_recorder.c b/tools/i915-perf/i915_perf_recorder.c
> index 7671f39b4..adc41c29f 100644
> --- a/tools/i915-perf/i915_perf_recorder.c
> +++ b/tools/i915-perf/i915_perf_recorder.c
> @@ -1001,7 +1001,7 @@ main(int argc, char *argv[])
> }
>
> ctx.oa_exponent = oa_exponent_for_period(ctx.timestamp_frequency, perf_period);
> - fprintf(stdout, "Opening perf stream with metric_id=%lu oa_exponent=%u\n",
> + fprintf(stdout, "Opening perf stream with metric_id=%"PRIu64" oa_exponent=%u\n",
> ctx.metric_set->perf_oa_metrics_set, ctx.oa_exponent);
>
> ctx.perf_fd = perf_open(&ctx);
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 1/4] i915/perf: 32bit printf cleanup
2020-08-20 21:45 ` [Intel-gfx] [PATCH i-g-t 1/4] i915/perf: 32bit printf cleanup Lionel Landwerlin
@ 2020-08-21 7:54 ` Petri Latvala
2020-08-21 8:14 ` Lionel Landwerlin
0 siblings, 1 reply; 7+ messages in thread
From: Petri Latvala @ 2020-08-21 7:54 UTC (permalink / raw)
To: Lionel Landwerlin; +Cc: igt-dev, intel-gfx, Chris Wilson
On Fri, Aug 21, 2020 at 12:45:23AM +0300, Lionel Landwerlin wrote:
> On 20/08/2020 20:26, Chris Wilson wrote:
> > Use PRI[du]64 as necessary for 32bit builds.
> >
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>
> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
>
Was this for just 1/4 or the whole series?
This one is for the whole series:
Reviewed-by: Petri Latvala <petri.latvala@intel.com>
>
> Thanks!
>
> -Lionel
>
> > ---
> > tests/i915/perf.c | 8 ++++----
> > tools/i915-perf/i915_perf_recorder.c | 2 +-
> > 2 files changed, 5 insertions(+), 5 deletions(-)
> >
> > diff --git a/tests/i915/perf.c b/tests/i915/perf.c
> > index 92edc9f1f..a894fd382 100644
> > --- a/tests/i915/perf.c
> > +++ b/tests/i915/perf.c
> > @@ -2077,7 +2077,7 @@ test_blocking(uint64_t requested_oa_period, bool set_kernel_hrtimer, uint64_t ke
> > user_ns = (end_times.tms_utime - start_times.tms_utime) * tick_ns;
> > kernel_ns = (end_times.tms_stime - start_times.tms_stime) * tick_ns;
> > - igt_debug("%d blocking reads during test with %lu Hz OA sampling (expect no more than %d)\n",
> > + igt_debug("%d blocking reads during test with %"PRIu64" Hz OA sampling (expect no more than %d)\n",
> > n, NSEC_PER_SEC / oa_period, max_iterations);
> > igt_debug("%d extra iterations seen, not related to periodic sampling (e.g. context switches)\n",
> > n_extra_iterations);
> > @@ -2265,7 +2265,7 @@ test_polling(uint64_t requested_oa_period, bool set_kernel_hrtimer, uint64_t ker
> > user_ns = (end_times.tms_utime - start_times.tms_utime) * tick_ns;
> > kernel_ns = (end_times.tms_stime - start_times.tms_stime) * tick_ns;
> > - igt_debug("%d non-blocking reads during test with %lu Hz OA sampling (expect no more than %d)\n",
> > + igt_debug("%d non-blocking reads during test with %"PRIu64" Hz OA sampling (expect no more than %d)\n",
> > n, NSEC_PER_SEC / oa_period, max_iterations);
> > igt_debug("%d extra iterations seen, not related to periodic sampling (e.g. context switches)\n",
> > n_extra_iterations);
> > @@ -2357,7 +2357,7 @@ num_valid_reports_captured(struct drm_i915_perf_open_param *param,
> > int64_t start, end;
> > int num_reports = 0;
> > - igt_debug("Expected duration = %lu\n", *duration_ns);
> > + igt_debug("Expected duration = %"PRId64"\n", *duration_ns);
> > stream_fd = __perf_open(drm_fd, param, true);
> > @@ -2389,7 +2389,7 @@ num_valid_reports_captured(struct drm_i915_perf_open_param *param,
> > *duration_ns = end - start;
> > - igt_debug("Actual duration = %lu\n", *duration_ns);
> > + igt_debug("Actual duration = %"PRIu64"\n", *duration_ns);
> > return num_reports;
> > }
> > diff --git a/tools/i915-perf/i915_perf_recorder.c b/tools/i915-perf/i915_perf_recorder.c
> > index 7671f39b4..adc41c29f 100644
> > --- a/tools/i915-perf/i915_perf_recorder.c
> > +++ b/tools/i915-perf/i915_perf_recorder.c
> > @@ -1001,7 +1001,7 @@ main(int argc, char *argv[])
> > }
> > ctx.oa_exponent = oa_exponent_for_period(ctx.timestamp_frequency, perf_period);
> > - fprintf(stdout, "Opening perf stream with metric_id=%lu oa_exponent=%u\n",
> > + fprintf(stdout, "Opening perf stream with metric_id=%"PRIu64" oa_exponent=%u\n",
> > ctx.metric_set->perf_oa_metrics_set, ctx.oa_exponent);
> > ctx.perf_fd = perf_open(&ctx);
>
>
> _______________________________________________
> igt-dev mailing list
> igt-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/igt-dev
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^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 1/4] i915/perf: 32bit printf cleanup
2020-08-21 7:54 ` [Intel-gfx] [igt-dev] " Petri Latvala
@ 2020-08-21 8:14 ` Lionel Landwerlin
0 siblings, 0 replies; 7+ messages in thread
From: Lionel Landwerlin @ 2020-08-21 8:14 UTC (permalink / raw)
To: Petri Latvala; +Cc: igt-dev, intel-gfx, Chris Wilson
On 21/08/2020 10:54, Petri Latvala wrote:
> On Fri, Aug 21, 2020 at 12:45:23AM +0300, Lionel Landwerlin wrote:
>> On 20/08/2020 20:26, Chris Wilson wrote:
>>> Use PRI[du]64 as necessary for 32bit builds.
>>>
>>> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
>>
> Was this for just 1/4 or the whole series?
Just for this patch.
-Lionel
>
> This one is for the whole series:
> Reviewed-by: Petri Latvala <petri.latvala@intel.com>
>
>
>
>> Thanks!
>>
>> -Lionel
>>
>>> ---
>>> tests/i915/perf.c | 8 ++++----
>>> tools/i915-perf/i915_perf_recorder.c | 2 +-
>>> 2 files changed, 5 insertions(+), 5 deletions(-)
>>>
>>> diff --git a/tests/i915/perf.c b/tests/i915/perf.c
>>> index 92edc9f1f..a894fd382 100644
>>> --- a/tests/i915/perf.c
>>> +++ b/tests/i915/perf.c
>>> @@ -2077,7 +2077,7 @@ test_blocking(uint64_t requested_oa_period, bool set_kernel_hrtimer, uint64_t ke
>>> user_ns = (end_times.tms_utime - start_times.tms_utime) * tick_ns;
>>> kernel_ns = (end_times.tms_stime - start_times.tms_stime) * tick_ns;
>>> - igt_debug("%d blocking reads during test with %lu Hz OA sampling (expect no more than %d)\n",
>>> + igt_debug("%d blocking reads during test with %"PRIu64" Hz OA sampling (expect no more than %d)\n",
>>> n, NSEC_PER_SEC / oa_period, max_iterations);
>>> igt_debug("%d extra iterations seen, not related to periodic sampling (e.g. context switches)\n",
>>> n_extra_iterations);
>>> @@ -2265,7 +2265,7 @@ test_polling(uint64_t requested_oa_period, bool set_kernel_hrtimer, uint64_t ker
>>> user_ns = (end_times.tms_utime - start_times.tms_utime) * tick_ns;
>>> kernel_ns = (end_times.tms_stime - start_times.tms_stime) * tick_ns;
>>> - igt_debug("%d non-blocking reads during test with %lu Hz OA sampling (expect no more than %d)\n",
>>> + igt_debug("%d non-blocking reads during test with %"PRIu64" Hz OA sampling (expect no more than %d)\n",
>>> n, NSEC_PER_SEC / oa_period, max_iterations);
>>> igt_debug("%d extra iterations seen, not related to periodic sampling (e.g. context switches)\n",
>>> n_extra_iterations);
>>> @@ -2357,7 +2357,7 @@ num_valid_reports_captured(struct drm_i915_perf_open_param *param,
>>> int64_t start, end;
>>> int num_reports = 0;
>>> - igt_debug("Expected duration = %lu\n", *duration_ns);
>>> + igt_debug("Expected duration = %"PRId64"\n", *duration_ns);
>>> stream_fd = __perf_open(drm_fd, param, true);
>>> @@ -2389,7 +2389,7 @@ num_valid_reports_captured(struct drm_i915_perf_open_param *param,
>>> *duration_ns = end - start;
>>> - igt_debug("Actual duration = %lu\n", *duration_ns);
>>> + igt_debug("Actual duration = %"PRIu64"\n", *duration_ns);
>>> return num_reports;
>>> }
>>> diff --git a/tools/i915-perf/i915_perf_recorder.c b/tools/i915-perf/i915_perf_recorder.c
>>> index 7671f39b4..adc41c29f 100644
>>> --- a/tools/i915-perf/i915_perf_recorder.c
>>> +++ b/tools/i915-perf/i915_perf_recorder.c
>>> @@ -1001,7 +1001,7 @@ main(int argc, char *argv[])
>>> }
>>> ctx.oa_exponent = oa_exponent_for_period(ctx.timestamp_frequency, perf_period);
>>> - fprintf(stdout, "Opening perf stream with metric_id=%lu oa_exponent=%u\n",
>>> + fprintf(stdout, "Opening perf stream with metric_id=%"PRIu64" oa_exponent=%u\n",
>>> ctx.metric_set->perf_oa_metrics_set, ctx.oa_exponent);
>>> ctx.perf_fd = perf_open(&ctx);
>>
>> _______________________________________________
>> igt-dev mailing list
>> igt-dev@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/igt-dev
_______________________________________________
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^ permalink raw reply [flat|nested] 7+ messages in thread