From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Cc: Matthew Auld <matthew.auld@intel.com>
Subject: Re: [PATCH 03/19] drm/i915/gt: Close race between engine_park and intel_gt_retire_requests
Date: Wed, 20 Nov 2019 11:39:00 +0000 [thread overview]
Message-ID: <0ff23ea0-aab9-66be-78bd-a09481044572@linux.intel.com> (raw)
In-Reply-To: <157417451261.10169.17308970866103066621@skylake-alporthouse-com>
On 19/11/2019 14:41, Chris Wilson wrote:
> Quoting Tvrtko Ursulin (2019-11-19 14:15:49)
>>
>> On 18/11/2019 23:02, Chris Wilson wrote:
>>> The general concept was that intel_timeline.active_count was locked by
>>> the intel_timeline.mutex. The exception was for power management, where
>>> the engine->kernel_context->timeline could be manipulated under the
>>> global wakeref.mutex.
>>>
>>> This was quite solid, as we always manipulated the timeline only while
>>> we held an engine wakeref.
>>>
>>> And then we started retiring requests outside of struct_mutex, only
>>> using the timelines.active_list and the timeline->mutex. There we
>>> started manipulating intel_timeline.active_count outside of an engine
>>> wakeref, and so introduced a race between __engine_park() and
>>> intel_gt_retire_requests(), a race that could result in the
>>> engine->kernel_context not being added to the active timelines and so
>>> losing requests, which caused us to keep the system permanently powered
>>> up [and unloadable].
>>>
>>> The race would be easy to close if we could take the engine wakeref for
>>> the timeline before we retire -- except timelines are not bound to any
>>> engine and so we would need to keep all active engines awake. The
>>> alternative is to guard intel_timeline_enter/intel_timeline_exit for use
>>> outside of the timeline->mutex.
>>>
>>> Fixes: e5dadff4b093 ("drm/i915: Protect request retirement with timeline->mutex")
>>> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>>> Cc: Matthew Auld <matthew.auld@intel.com>
>>> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>> ---
>>> drivers/gpu/drm/i915/gt/intel_gt_requests.c | 8 ++---
>>> drivers/gpu/drm/i915/gt/intel_timeline.c | 34 +++++++++++++++----
>>> .../gpu/drm/i915/gt/intel_timeline_types.h | 2 +-
>>> 3 files changed, 32 insertions(+), 12 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_requests.c b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
>>> index a79e6efb31a2..7559d6373f49 100644
>>> --- a/drivers/gpu/drm/i915/gt/intel_gt_requests.c
>>> +++ b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
>>> @@ -49,8 +49,8 @@ long intel_gt_retire_requests_timeout(struct intel_gt *gt, long timeout)
>>> continue;
>>>
>>> intel_timeline_get(tl);
>>> - GEM_BUG_ON(!tl->active_count);
>>> - tl->active_count++; /* pin the list element */
>>> + GEM_BUG_ON(!atomic_read(&tl->active_count));
>>> + atomic_inc(&tl->active_count); /* pin the list element */
>>> spin_unlock_irqrestore(&timelines->lock, flags);
>>>
>>> if (timeout > 0) {
>>> @@ -71,14 +71,14 @@ long intel_gt_retire_requests_timeout(struct intel_gt *gt, long timeout)
>>>
>>> /* Resume iteration after dropping lock */
>>> list_safe_reset_next(tl, tn, link);
>>> - if (!--tl->active_count)
>>> + if (atomic_dec_and_test(&tl->active_count))
>>> list_del(&tl->link);
>>>
>>> mutex_unlock(&tl->mutex);
>>>
>>> /* Defer the final release to after the spinlock */
>>> if (refcount_dec_and_test(&tl->kref.refcount)) {
>>> - GEM_BUG_ON(tl->active_count);
>>> + GEM_BUG_ON(atomic_read(&tl->active_count));
>>> list_add(&tl->link, &free);
>>> }
>>> }
>>> diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.c b/drivers/gpu/drm/i915/gt/intel_timeline.c
>>> index 16a9e88d93de..4f914f0d5eab 100644
>>> --- a/drivers/gpu/drm/i915/gt/intel_timeline.c
>>> +++ b/drivers/gpu/drm/i915/gt/intel_timeline.c
>>> @@ -334,15 +334,33 @@ void intel_timeline_enter(struct intel_timeline *tl)
>>> struct intel_gt_timelines *timelines = &tl->gt->timelines;
>>> unsigned long flags;
>>>
>>> + /*
>>> + * Pretend we are serialised by the timeline->mutex.
>>> + *
>>> + * While generally true, there are a few exceptions to the rule
>>> + * for the engine->kernel_context being used to manage power
>>> + * transitions. As the engine_park may be called from under any
>>> + * timeline, it uses the power mutex as a global serialisation
>>> + * lock to prevent any other request entering its timeline.
>>> + *
>>> + * The rule is generally tl->mutex, otherwise engine->wakeref.mutex.
>>> + *
>>> + * However, intel_gt_retire_request() does not know which engine
>>> + * it is retiring along and so cannot partake in the engine-pm
>>> + * barrier, and there we use the tl->active_count as a means to
>>> + * pin the timeline in the active_list while the locks are dropped.
>>> + * Ergo, as that is outside of the engine-pm barrier, we need to
>>> + * use atomic to manipulate tl->active_count.
>>> + */
>>> lockdep_assert_held(&tl->mutex);
>>> -
>>> GEM_BUG_ON(!atomic_read(&tl->pin_count));
>>> - if (tl->active_count++)
>>> +
>>> + if (atomic_add_unless(&tl->active_count, 1, 0))
>>> return;
>>> - GEM_BUG_ON(!tl->active_count); /* overflow? */
>>>
>>> spin_lock_irqsave(&timelines->lock, flags);
>>> - list_add(&tl->link, &timelines->active_list);
>>> + if (!atomic_fetch_inc(&tl->active_count))
>>> + list_add(&tl->link, &timelines->active_list);
>>
>> So retirement raced with this and has elevated the active_count? But
>> retirement does not add the timeline to the list, so we exit here
>> without it on the active_list.
>
> Retirement only sees an element on the active_list. What we observed in
> practice was the inc/dec on tl->active_count racing, causing
> indeterminate results, with the result that we removed the element from
> the active_list while it had a raised tl->active_count (due to the
> inflight posting from the other CPU).
>
> Thus we kept requests inflight and the engine awake with no way to clear
> them. This most obvious triggered GEM_BUG_ON(gt->awake) during suspend,
> and is also responsible for the timeouts on gem_quiescent_gpu() or
> igt_drop_caches_set(DROP_IDLE).
I understand (I think) the race where retirement races with parking. But
this side of things (intel_timeline_enter) does not seem to be involved
in that. intel_timeline_enter is the only place which puts the timeline
onto the active_list. How can two of them race?
And also, what remains to be purpose of timelines->lock?
Regards,
Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
WARNING: multiple messages have this Message-ID (diff)
From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Cc: Matthew Auld <matthew.auld@intel.com>
Subject: Re: [Intel-gfx] [PATCH 03/19] drm/i915/gt: Close race between engine_park and intel_gt_retire_requests
Date: Wed, 20 Nov 2019 11:39:00 +0000 [thread overview]
Message-ID: <0ff23ea0-aab9-66be-78bd-a09481044572@linux.intel.com> (raw)
Message-ID: <20191120113900.t2FyQM-YQEeDSZ9chzMhadlOAEhGgbyUsvWtNDjxxwk@z> (raw)
In-Reply-To: <157417451261.10169.17308970866103066621@skylake-alporthouse-com>
On 19/11/2019 14:41, Chris Wilson wrote:
> Quoting Tvrtko Ursulin (2019-11-19 14:15:49)
>>
>> On 18/11/2019 23:02, Chris Wilson wrote:
>>> The general concept was that intel_timeline.active_count was locked by
>>> the intel_timeline.mutex. The exception was for power management, where
>>> the engine->kernel_context->timeline could be manipulated under the
>>> global wakeref.mutex.
>>>
>>> This was quite solid, as we always manipulated the timeline only while
>>> we held an engine wakeref.
>>>
>>> And then we started retiring requests outside of struct_mutex, only
>>> using the timelines.active_list and the timeline->mutex. There we
>>> started manipulating intel_timeline.active_count outside of an engine
>>> wakeref, and so introduced a race between __engine_park() and
>>> intel_gt_retire_requests(), a race that could result in the
>>> engine->kernel_context not being added to the active timelines and so
>>> losing requests, which caused us to keep the system permanently powered
>>> up [and unloadable].
>>>
>>> The race would be easy to close if we could take the engine wakeref for
>>> the timeline before we retire -- except timelines are not bound to any
>>> engine and so we would need to keep all active engines awake. The
>>> alternative is to guard intel_timeline_enter/intel_timeline_exit for use
>>> outside of the timeline->mutex.
>>>
>>> Fixes: e5dadff4b093 ("drm/i915: Protect request retirement with timeline->mutex")
>>> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>>> Cc: Matthew Auld <matthew.auld@intel.com>
>>> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>> ---
>>> drivers/gpu/drm/i915/gt/intel_gt_requests.c | 8 ++---
>>> drivers/gpu/drm/i915/gt/intel_timeline.c | 34 +++++++++++++++----
>>> .../gpu/drm/i915/gt/intel_timeline_types.h | 2 +-
>>> 3 files changed, 32 insertions(+), 12 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_requests.c b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
>>> index a79e6efb31a2..7559d6373f49 100644
>>> --- a/drivers/gpu/drm/i915/gt/intel_gt_requests.c
>>> +++ b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
>>> @@ -49,8 +49,8 @@ long intel_gt_retire_requests_timeout(struct intel_gt *gt, long timeout)
>>> continue;
>>>
>>> intel_timeline_get(tl);
>>> - GEM_BUG_ON(!tl->active_count);
>>> - tl->active_count++; /* pin the list element */
>>> + GEM_BUG_ON(!atomic_read(&tl->active_count));
>>> + atomic_inc(&tl->active_count); /* pin the list element */
>>> spin_unlock_irqrestore(&timelines->lock, flags);
>>>
>>> if (timeout > 0) {
>>> @@ -71,14 +71,14 @@ long intel_gt_retire_requests_timeout(struct intel_gt *gt, long timeout)
>>>
>>> /* Resume iteration after dropping lock */
>>> list_safe_reset_next(tl, tn, link);
>>> - if (!--tl->active_count)
>>> + if (atomic_dec_and_test(&tl->active_count))
>>> list_del(&tl->link);
>>>
>>> mutex_unlock(&tl->mutex);
>>>
>>> /* Defer the final release to after the spinlock */
>>> if (refcount_dec_and_test(&tl->kref.refcount)) {
>>> - GEM_BUG_ON(tl->active_count);
>>> + GEM_BUG_ON(atomic_read(&tl->active_count));
>>> list_add(&tl->link, &free);
>>> }
>>> }
>>> diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.c b/drivers/gpu/drm/i915/gt/intel_timeline.c
>>> index 16a9e88d93de..4f914f0d5eab 100644
>>> --- a/drivers/gpu/drm/i915/gt/intel_timeline.c
>>> +++ b/drivers/gpu/drm/i915/gt/intel_timeline.c
>>> @@ -334,15 +334,33 @@ void intel_timeline_enter(struct intel_timeline *tl)
>>> struct intel_gt_timelines *timelines = &tl->gt->timelines;
>>> unsigned long flags;
>>>
>>> + /*
>>> + * Pretend we are serialised by the timeline->mutex.
>>> + *
>>> + * While generally true, there are a few exceptions to the rule
>>> + * for the engine->kernel_context being used to manage power
>>> + * transitions. As the engine_park may be called from under any
>>> + * timeline, it uses the power mutex as a global serialisation
>>> + * lock to prevent any other request entering its timeline.
>>> + *
>>> + * The rule is generally tl->mutex, otherwise engine->wakeref.mutex.
>>> + *
>>> + * However, intel_gt_retire_request() does not know which engine
>>> + * it is retiring along and so cannot partake in the engine-pm
>>> + * barrier, and there we use the tl->active_count as a means to
>>> + * pin the timeline in the active_list while the locks are dropped.
>>> + * Ergo, as that is outside of the engine-pm barrier, we need to
>>> + * use atomic to manipulate tl->active_count.
>>> + */
>>> lockdep_assert_held(&tl->mutex);
>>> -
>>> GEM_BUG_ON(!atomic_read(&tl->pin_count));
>>> - if (tl->active_count++)
>>> +
>>> + if (atomic_add_unless(&tl->active_count, 1, 0))
>>> return;
>>> - GEM_BUG_ON(!tl->active_count); /* overflow? */
>>>
>>> spin_lock_irqsave(&timelines->lock, flags);
>>> - list_add(&tl->link, &timelines->active_list);
>>> + if (!atomic_fetch_inc(&tl->active_count))
>>> + list_add(&tl->link, &timelines->active_list);
>>
>> So retirement raced with this and has elevated the active_count? But
>> retirement does not add the timeline to the list, so we exit here
>> without it on the active_list.
>
> Retirement only sees an element on the active_list. What we observed in
> practice was the inc/dec on tl->active_count racing, causing
> indeterminate results, with the result that we removed the element from
> the active_list while it had a raised tl->active_count (due to the
> inflight posting from the other CPU).
>
> Thus we kept requests inflight and the engine awake with no way to clear
> them. This most obvious triggered GEM_BUG_ON(gt->awake) during suspend,
> and is also responsible for the timeouts on gem_quiescent_gpu() or
> igt_drop_caches_set(DROP_IDLE).
I understand (I think) the race where retirement races with parking. But
this side of things (intel_timeline_enter) does not seem to be involved
in that. intel_timeline_enter is the only place which puts the timeline
onto the active_list. How can two of them race?
And also, what remains to be purpose of timelines->lock?
Regards,
Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2019-11-20 11:39 UTC|newest]
Thread overview: 90+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-18 23:02 Fast soft-rc6 Chris Wilson
2019-11-18 23:02 ` [Intel-gfx] " Chris Wilson
2019-11-18 23:02 ` [PATCH 01/19] drm/i915/selftests: Force bonded submission to overlap Chris Wilson
2019-11-18 23:02 ` [Intel-gfx] " Chris Wilson
2019-11-18 23:02 ` [PATCH 02/19] drm/i915/gem: Manually dump the debug trace on GEM_BUG_ON Chris Wilson
2019-11-18 23:02 ` [Intel-gfx] " Chris Wilson
2019-11-18 23:02 ` [PATCH 03/19] drm/i915/gt: Close race between engine_park and intel_gt_retire_requests Chris Wilson
2019-11-18 23:02 ` [Intel-gfx] " Chris Wilson
2019-11-19 14:15 ` Tvrtko Ursulin
2019-11-19 14:15 ` [Intel-gfx] " Tvrtko Ursulin
2019-11-19 14:41 ` Chris Wilson
2019-11-19 14:41 ` [Intel-gfx] " Chris Wilson
2019-11-20 11:39 ` Tvrtko Ursulin [this message]
2019-11-20 11:39 ` Tvrtko Ursulin
2019-11-20 11:51 ` Chris Wilson
2019-11-20 11:51 ` [Intel-gfx] " Chris Wilson
2019-11-18 23:02 ` [PATCH 04/19] drm/i915/gt: Unlock engine-pm after queuing the kernel context switch Chris Wilson
2019-11-18 23:02 ` [Intel-gfx] " Chris Wilson
2019-11-19 14:35 ` Tvrtko Ursulin
2019-11-19 14:35 ` [Intel-gfx] " Tvrtko Ursulin
2019-11-19 14:50 ` Chris Wilson
2019-11-19 14:50 ` [Intel-gfx] " Chris Wilson
2019-11-19 15:03 ` [PATCH] " Chris Wilson
2019-11-19 15:03 ` [Intel-gfx] " Chris Wilson
2019-11-18 23:02 ` [PATCH 05/19] drm/i915/gt: Make intel_ring_unpin() safe for concurrent pint Chris Wilson
2019-11-18 23:02 ` [Intel-gfx] " Chris Wilson
2019-11-19 14:54 ` Tvrtko Ursulin
2019-11-19 14:54 ` [Intel-gfx] " Tvrtko Ursulin
2019-11-18 23:02 ` [PATCH 06/19] drm/i915/gt: Schedule request retirement when submission idles Chris Wilson
2019-11-18 23:02 ` [Intel-gfx] " Chris Wilson
2019-11-19 15:04 ` Tvrtko Ursulin
2019-11-19 15:04 ` [Intel-gfx] " Tvrtko Ursulin
2019-11-19 16:20 ` Chris Wilson
2019-11-19 16:20 ` [Intel-gfx] " Chris Wilson
2019-11-19 16:33 ` Tvrtko Ursulin
2019-11-19 16:33 ` [Intel-gfx] " Tvrtko Ursulin
2019-11-19 16:42 ` Chris Wilson
2019-11-19 16:42 ` [Intel-gfx] " Chris Wilson
2019-11-19 18:58 ` Chris Wilson
2019-11-19 18:58 ` [Intel-gfx] " Chris Wilson
2019-11-18 23:02 ` [PATCH 07/19] drm/i915: Mark up the calling context for intel_wakeref_put() Chris Wilson
2019-11-18 23:02 ` [Intel-gfx] " Chris Wilson
2019-11-19 15:57 ` Tvrtko Ursulin
2019-11-19 15:57 ` [Intel-gfx] " Tvrtko Ursulin
2019-11-19 16:12 ` Chris Wilson
2019-11-19 16:12 ` [Intel-gfx] " Chris Wilson
2019-11-18 23:02 ` [PATCH 08/19] drm/i915/gem: Merge GGTT vma flush into a single loop Chris Wilson
2019-11-18 23:02 ` [Intel-gfx] " Chris Wilson
2019-11-18 23:02 ` [PATCH 09/19] drm/i915/gt: Only wait for register chipset flush if active Chris Wilson
2019-11-18 23:02 ` [Intel-gfx] " Chris Wilson
2019-11-18 23:02 ` [PATCH 10/19] drm/i915: Protect the obj->vma.list during iteration Chris Wilson
2019-11-18 23:02 ` [Intel-gfx] " Chris Wilson
2019-11-18 23:02 ` [PATCH 11/19] drm/i915: Wait until the intel_wakeref idle callback is complete Chris Wilson
2019-11-18 23:02 ` [Intel-gfx] " Chris Wilson
2019-11-19 16:15 ` Tvrtko Ursulin
2019-11-19 16:15 ` [Intel-gfx] " Tvrtko Ursulin
2019-11-18 23:02 ` [PATCH 12/19] drm/i915/gt: Declare timeline.lock to be irq-free Chris Wilson
2019-11-18 23:02 ` [Intel-gfx] " Chris Wilson
2019-11-19 15:58 ` Tvrtko Ursulin
2019-11-19 15:58 ` [Intel-gfx] " Tvrtko Ursulin
2019-11-18 23:02 ` [PATCH 13/19] drm/i915/gt: Move new timelines to the end of active_list Chris Wilson
2019-11-18 23:02 ` [Intel-gfx] " Chris Wilson
2019-11-19 16:02 ` Tvrtko Ursulin
2019-11-19 16:02 ` [Intel-gfx] " Tvrtko Ursulin
2019-11-18 23:02 ` [PATCH 14/19] drm/i915/gt: Schedule next retirement worker first Chris Wilson
2019-11-18 23:02 ` [Intel-gfx] " Chris Wilson
2019-11-19 16:07 ` Tvrtko Ursulin
2019-11-19 16:07 ` [Intel-gfx] " Tvrtko Ursulin
2019-11-18 23:02 ` [PATCH 15/19] drm/i915/gt: Flush the requests after wedging on suspend Chris Wilson
2019-11-18 23:02 ` [Intel-gfx] " Chris Wilson
2019-11-19 16:12 ` Tvrtko Ursulin
2019-11-19 16:12 ` [Intel-gfx] " Tvrtko Ursulin
2019-11-19 17:22 ` Chris Wilson
2019-11-19 17:22 ` [Intel-gfx] " Chris Wilson
2019-11-18 23:02 ` [PATCH 16/19] drm/i915/selftests: Flush the active callbacks Chris Wilson
2019-11-18 23:02 ` [Intel-gfx] " Chris Wilson
2019-11-18 23:02 ` [PATCH 17/19] drm/i915/selftests: Be explicit in ERR_PTR handling Chris Wilson
2019-11-18 23:02 ` [Intel-gfx] " Chris Wilson
2019-11-18 23:02 ` [PATCH 18/19] drm/i915/selftests: Exercise rc6 handling Chris Wilson
2019-11-18 23:02 ` [Intel-gfx] " Chris Wilson
2019-11-18 23:02 ` [PATCH 19/19] drm/i915/gt: Track engine round-trip times Chris Wilson
2019-11-18 23:02 ` [Intel-gfx] " Chris Wilson
2019-11-18 23:21 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/19] drm/i915/selftests: Force bonded submission to overlap Patchwork
2019-11-18 23:21 ` [Intel-gfx] " Patchwork
2019-11-19 0:04 ` ✓ Fi.CI.BAT: success " Patchwork
2019-11-19 0:04 ` [Intel-gfx] " Patchwork
2019-11-19 9:08 ` ✗ Fi.CI.IGT: failure " Patchwork
2019-11-19 9:08 ` [Intel-gfx] " Patchwork
2019-11-19 19:04 ` ✗ Fi.CI.BUILD: failure for series starting with [01/19] drm/i915/selftests: Force bonded submission to overlap (rev2) Patchwork
2019-11-19 19:04 ` [Intel-gfx] " Patchwork
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