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* [PATCH 1/2] drm/i915: use mode values consistently when converting to sdvo dtd
@ 2012-04-24 16:27 Daniel Vetter
  2012-04-24 16:27 ` [PATCH 2/2] drm/i915: properly handle interlaced bit for sdvo dtd conversion Daniel Vetter
  2012-04-24 19:24 ` [PATCH 1/2] drm/i915: use mode values consistently when converting to sdvo dtd Chris Wilson
  0 siblings, 2 replies; 4+ messages in thread
From: Daniel Vetter @ 2012-04-24 16:27 UTC (permalink / raw)
  To: Intel Graphics Development; +Cc: Daniel Vetter

The drm_mode->dtd conversion used the crtc timings, whereas the
dtd->drm_mod did not set these. Use the standard mode information, not
the crtc timings, in both cases to make these two functions proper
inverses of each another.

Note that this also kills the risk that we handle interlaced timings
inconsistently because the drm core uses half-frames for crtc timings,
whereas we need full frames. But interlaced support is pretty decently
broken anyway for sdvo encoders, so no big deal.

Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/gpu/drm/i915/intel_sdvo.c |   16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
index c330efd..457329c 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -746,18 +746,18 @@ static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
 	uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
 	uint16_t h_sync_offset, v_sync_offset;
 
-	width = mode->crtc_hdisplay;
-	height = mode->crtc_vdisplay;
+	width = mode->hdisplay;
+	height = mode->vdisplay;
 
 	/* do some mode translations */
-	h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
-	h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
+	h_blank_len = mode->htotal - mode->hdisplay;
+	h_sync_len = mode->hsync_end - mode->hsync_start;
 
-	v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
-	v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
+	v_blank_len = mode->vtotal - mode->vdisplay;
+	v_sync_len = mode->vsync_end - mode->vsync_start;
 
-	h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
-	v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
+	h_sync_offset = mode->hsync_start - mode->hdisplay;
+	v_sync_offset = mode->vsync_start - mode->vdisplay;
 
 	dtd->part1.clock = mode->clock / 10;
 	dtd->part1.h_active = width & 0xff;
-- 
1.7.10

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [PATCH 2/2] drm/i915: properly handle interlaced bit for sdvo dtd conversion
  2012-04-24 16:27 [PATCH 1/2] drm/i915: use mode values consistently when converting to sdvo dtd Daniel Vetter
@ 2012-04-24 16:27 ` Daniel Vetter
  2012-04-24 19:24 ` [PATCH 1/2] drm/i915: use mode values consistently when converting to sdvo dtd Chris Wilson
  1 sibling, 0 replies; 4+ messages in thread
From: Daniel Vetter @ 2012-04-24 16:27 UTC (permalink / raw)
  To: Intel Graphics Development; +Cc: Daniel Vetter

Maybe this make someone happy, because I'm pretty sure interlaced on
sdvo won't work without this.

Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/gpu/drm/i915/intel_sdvo.c |    4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
index 457329c..413da30 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -778,6 +778,8 @@ static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
 		((v_sync_len & 0x30) >> 4);
 
 	dtd->part2.dtd_flags = 0x18;
+	if (mode->flags & DRM_MODE_FLAG_INTERLACE)
+		dtd->part2.dtd_flags |= 0x1;
 	if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 		dtd->part2.dtd_flags |= 0x2;
 	if (mode->flags & DRM_MODE_FLAG_PVSYNC)
@@ -815,6 +817,8 @@ static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
 	mode->clock = dtd->part1.clock * 10;
 
 	mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
+	if (dtd->part2.dtd_flags & 0x1)
+		mode->flags |= DRM_MODE_FLAG_INTERLACE;
 	if (dtd->part2.dtd_flags & 0x2)
 		mode->flags |= DRM_MODE_FLAG_PHSYNC;
 	if (dtd->part2.dtd_flags & 0x4)
-- 
1.7.10

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* Re: [PATCH 1/2] drm/i915: use mode values consistently when converting to sdvo dtd
  2012-04-24 16:27 [PATCH 1/2] drm/i915: use mode values consistently when converting to sdvo dtd Daniel Vetter
  2012-04-24 16:27 ` [PATCH 2/2] drm/i915: properly handle interlaced bit for sdvo dtd conversion Daniel Vetter
@ 2012-04-24 19:24 ` Chris Wilson
  2012-05-04  9:35   ` Daniel Vetter
  1 sibling, 1 reply; 4+ messages in thread
From: Chris Wilson @ 2012-04-24 19:24 UTC (permalink / raw)
  To: Intel Graphics Development; +Cc: Daniel Vetter

On Tue, 24 Apr 2012 18:27:57 +0200, Daniel Vetter <daniel.vetter@ffwll.ch> wrote:
> The drm_mode->dtd conversion used the crtc timings, whereas the
> dtd->drm_mod did not set these. Use the standard mode information, not
> the crtc timings, in both cases to make these two functions proper
> inverses of each another.
> 
> Note that this also kills the risk that we handle interlaced timings
> inconsistently because the drm core uses half-frames for crtc timings,
> whereas we need full frames. But interlaced support is pretty decently
> broken anyway for sdvo encoders, so no big deal.

So as I understand it, if we had interlacing or dblscan enabled on the
incoming mode we would have been feeding the display timing into the
magic black box of the SDVO encoder rather the mode line.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH 1/2] drm/i915: use mode values consistently when converting to sdvo dtd
  2012-04-24 19:24 ` [PATCH 1/2] drm/i915: use mode values consistently when converting to sdvo dtd Chris Wilson
@ 2012-05-04  9:35   ` Daniel Vetter
  0 siblings, 0 replies; 4+ messages in thread
From: Daniel Vetter @ 2012-05-04  9:35 UTC (permalink / raw)
  To: Chris Wilson; +Cc: Daniel Vetter, Intel Graphics Development

On Tue, Apr 24, 2012 at 08:24:20PM +0100, Chris Wilson wrote:
> On Tue, 24 Apr 2012 18:27:57 +0200, Daniel Vetter <daniel.vetter@ffwll.ch> wrote:
> > The drm_mode->dtd conversion used the crtc timings, whereas the
> > dtd->drm_mod did not set these. Use the standard mode information, not
> > the crtc timings, in both cases to make these two functions proper
> > inverses of each another.
> > 
> > Note that this also kills the risk that we handle interlaced timings
> > inconsistently because the drm core uses half-frames for crtc timings,
> > whereas we need full frames. But interlaced support is pretty decently
> > broken anyway for sdvo encoders, so no big deal.
> 
> So as I understand it, if we had interlacing or dblscan enabled on the
> incoming mode we would have been feeding the display timing into the
> magic black box of the SDVO encoder rather the mode line.
> 
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Queued for -next, thanks for the review.
-Daniel
-- 
Daniel Vetter
Mail: daniel@ffwll.ch
Mobile: +41 (0)79 365 57 48

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2012-05-04  9:34 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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2012-04-24 16:27 [PATCH 1/2] drm/i915: use mode values consistently when converting to sdvo dtd Daniel Vetter
2012-04-24 16:27 ` [PATCH 2/2] drm/i915: properly handle interlaced bit for sdvo dtd conversion Daniel Vetter
2012-04-24 19:24 ` [PATCH 1/2] drm/i915: use mode values consistently when converting to sdvo dtd Chris Wilson
2012-05-04  9:35   ` Daniel Vetter

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