From: Eugeni Dodonov <eugeni.dodonov@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Eugeni Dodonov <eugeni.dodonov@intel.com>
Subject: [PATCH 13/25] drm/i915: initialize DDI buffer translations
Date: Wed, 9 May 2012 15:37:20 -0300 [thread overview]
Message-ID: <1336588652-702-14-git-send-email-eugeni.dodonov@intel.com> (raw)
In-Reply-To: <1336588652-702-1-git-send-email-eugeni.dodonov@intel.com>
DDI is introduced starting with Haswell GPU generation. So to simplify its
management in the future, we also add intel_ddi.c to hold all the
DDI-related items.
Buffer translations for DDI links must be initialized prior to enablement.
For FDI and DP, first 9 pairs of values are used to select the connection
parameters. HDMI uses the last pair of values and ignores the first 9
pairs. So we program HDMI values in both cases, which allows HDMI to work
over both FDI and DP-friendly buffers.
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/intel_ddi.c | 107 ++++++++++++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_display.c | 2 +
drivers/gpu/drm/i915/intel_drv.h | 1 +
4 files changed, 111 insertions(+)
create mode 100644 drivers/gpu/drm/i915/intel_ddi.c
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 8b8bbc7..0ca7f76 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -19,6 +19,7 @@ i915-y := i915_drv.o i915_dma.o i915_irq.o \
intel_crt.o \
intel_lvds.o \
intel_bios.o \
+ intel_ddi.o \
intel_dp.o \
intel_hdmi.o \
intel_sdvo.o \
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
new file mode 100644
index 0000000..08f210b
--- /dev/null
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -0,0 +1,107 @@
+/*
+ * Copyright © 2012 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ * Eugeni Dodonov <eugeni.dodonov@intel.com>
+ *
+ */
+
+#include "i915_drv.h"
+#include "intel_drv.h"
+
+/* HDMI/DVI modes ignore everything but the last 2 items. So we share
+ * them for both DP and FDI transports, allowing those ports to
+ * automatically adapt to HDMI connections as well
+ */
+static const u32 hsw_ddi_translations_dp[] = {
+ 0x00FFFFFF, 0x0006000E, /* DP parameters */
+ 0x00D75FFF, 0x0005000A,
+ 0x00C30FFF, 0x00040006,
+ 0x80AAAFFF, 0x000B0000,
+ 0x00FFFFFF, 0x0005000A,
+ 0x00D75FFF, 0x000C0004,
+ 0x80C30FFF, 0x000B0000,
+ 0x00FFFFFF, 0x00040006,
+ 0x80D75FFF, 0x000B0000,
+ 0x00FFFFFF, 0x00040006 /* HDMI parameters */
+};
+
+static const u32 hsw_ddi_translations_fdi[] = {
+ 0x00FFFFFF, 0x0007000E, /* FDI parameters */
+ 0x00D75FFF, 0x000F000A,
+ 0x00C30FFF, 0x00060006,
+ 0x00AAAFFF, 0x001E0000,
+ 0x00FFFFFF, 0x000F000A,
+ 0x00D75FFF, 0x00160004,
+ 0x00C30FFF, 0x001E0000,
+ 0x00FFFFFF, 0x00060006,
+ 0x00D75FFF, 0x001E0000,
+ 0x00FFFFFF, 0x00040006 /* HDMI parameters */
+};
+
+/* On Haswell, DDI port buffers must be programmed with correct values
+ * in advance. The buffer values are different for FDI and DP modes,
+ * but the HDMI/DVI fields are shared among those. So we program the DDI
+ * in either FDI or DP modes only, as HDMI connections will work with both
+ * of those
+ */
+void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port, bool use_fdi_mode)
+{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+ u32 reg;
+ int i;
+ const u32 *ddi_translations = ((use_fdi_mode) ?
+ hsw_ddi_translations_fdi :
+ hsw_ddi_translations_dp);
+
+ DRM_DEBUG_DRIVER("Initializing DDI buffers for port %c in %s mode\n",
+ port_name(port),
+ use_fdi_mode ? "FDI" : "DP");
+
+ WARN((use_fdi_mode && (port != PORT_E)),
+ "Programming port %c in FDI mode, this probably will not work.\n",
+ port_name(port));
+
+ for (i=0, reg=DDI_BUF_TRANS(port); i < ARRAY_SIZE(hsw_ddi_translations_fdi); i++) {
+ I915_WRITE(reg, ddi_translations[i]);
+ reg += 4;
+ }
+}
+
+/* Program DDI buffers translations for DP. By default, program ports A-D in DP
+ * mode and port E for FDI.
+ */
+void intel_prepare_ddi(struct drm_device *dev)
+{
+ int port;
+
+ if (IS_HASWELL(dev)) {
+ for (port = PORT_A; port < PORT_E; port++)
+ intel_prepare_ddi_buffers(dev, port, false);
+
+ /* DDI E is the suggested one to work in FDI mode, so program is as such by
+ * default. It will have to be re-programmed in case a digital DP output
+ * will be detected on it
+ */
+ intel_prepare_ddi_buffers(dev, PORT_E, true);
+ }
+}
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 9b46619..24b7b51 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6801,6 +6801,8 @@ void intel_modeset_init(struct drm_device *dev)
intel_init_pm(dev);
+ intel_prepare_ddi(dev);
+
intel_init_display(dev);
if (IS_GEN2(dev)) {
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index e5ee166..e6ce02b 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -446,6 +446,7 @@ extern void intel_init_clock_gating(struct drm_device *dev);
extern void intel_write_eld(struct drm_encoder *encoder,
struct drm_display_mode *mode);
extern void intel_cpt_verify_modeset(struct drm_device *dev, int pipe);
+extern void intel_prepare_ddi(struct drm_device *dev);
/* For use by IVB LP watermark workaround in intel_sprite.c */
extern void intel_update_watermarks(struct drm_device *dev);
--
1.7.10
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next prev parent reply other threads:[~2012-05-09 18:40 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-05-09 18:37 [PATCH 00/25] Haswell fixes Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 01/25] drm/i915: add new Haswell DIP controls registers Eugeni Dodonov
2012-05-10 0:34 ` Paulo Zanoni
2012-05-10 1:02 ` Eugeni Dodonov
2012-05-10 3:03 ` Paulo Zanoni
2012-05-10 8:32 ` Daniel Vetter
2012-05-10 13:18 ` Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 02/25] drm/i915: reuse Ivy Bridge interrupts code for Haswell Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 03/25] drm/i915: add support for SBI ops Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 04/25] drm/i915: calculate watermarks for devices that have 3 pipes Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 05/25] drm/i915: properly check for pipe count Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 06/25] drm/i915: show unknown sdvox registers on hdmi init Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 07/25] drm/i915: do not use fdi_normal_train on Haswell Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 08/25] drm/i915: detect PCH encoders " Eugeni Dodonov
2012-05-09 21:46 ` Daniel Vetter
2012-05-09 23:30 ` Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 09/25] drm/i915: enable power wells on Haswell init Eugeni Dodonov
2012-05-09 21:42 ` Daniel Vetter
2012-05-09 23:29 ` Eugeni Dodonov
2012-05-10 14:48 ` Daniel Vetter
2012-05-10 15:08 ` Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 10/25] drm/i915: add LPT PCH checks Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 11/25] drm/i915: handle DDI-related assertions Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 12/25] drm/i915: account for only one PCH receiver on Haswell Eugeni Dodonov
2012-05-09 18:37 ` Eugeni Dodonov [this message]
2012-05-09 18:37 ` [PATCH 14/25] drm/i915: support DDI training in FDI mode Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 15/25] drm/i915: use ironlake eld write routine for Haswell Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 16/25] drm/i915: define Haswell watermarks and clock gating Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 17/25] drm/i915: program WM_LINETIME on Haswell Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 18/25] drm/i915: disable pipe DDI function when disabling pipe Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 19/25] drm/i915: program iCLKIP on Lynx Point Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 20/25] drm/i915: detect digital outputs on Haswell Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 21/25] drm/i915: add support for DDI-controlled digital outputs Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 22/25] drm/i915: add WR PLL programming table Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 23/25] drm/i915: move HDMI structs to shared location Eugeni Dodonov
2012-05-09 22:05 ` Daniel Vetter
2012-05-09 18:37 ` [PATCH 24/25] drm/i915: prepare HDMI link for Haswell Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 25/25] drm/i915: hook Haswell devices in place Eugeni Dodonov
2012-05-10 15:56 ` Daniel Vetter
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