From: Eugeni Dodonov <eugeni.dodonov@linux.intel.com>
To: Daniel Vetter <daniel@ffwll.ch>
Cc: intel-gfx@lists.freedesktop.org,
Eugeni Dodonov <eugeni.dodonov@intel.com>
Subject: Re: [PATCH 09/25] drm/i915: enable power wells on Haswell init
Date: Thu, 10 May 2012 12:08:22 -0300 [thread overview]
Message-ID: <4FABD9E6.6090909@linux.intel.com> (raw)
In-Reply-To: <20120510144818.GB4912@phenom.ffwll.local>
On 05/10/2012 11:48 AM, Daniel Vetter wrote:
> On Wed, May 09, 2012 at 08:29:57PM -0300, Eugeni Dodonov wrote:
>> This attempts to enable all the available power wells during the
>> initialization.
>>
>> Those power wells can be enabled in parallel or on-demand, and disabled
>> when no longer needed, but this is out of scope of this initial
>> enablement. Proper tracking of who uses which power well will require
>> a considerable rework of our display handling, so we just leave them all
>> enabled when the driver is loaded for now.
>>
>> v2: use more generic and future-proof code
>>
>> v3: call intel_init_power_wells from within intel_modeset_init_hw, so it
>> would be called upon resume path as well.
>>
>> Signed-off-by: Eugeni Dodonov<eugeni.dodonov@intel.com>
>
> I've picked up everything up to this one here into dinq. Can you please
> double-check whether the power well enabling is still at the right place?
> I've somehow dropped Chris' patch to move around things for the rps stuff
> that I've merged yesterday, but now it's back as:
>
> commit 2e1352cf196094f44e73776f41087f4c489ab936
> Author: Chris Wilson<chris@chris-wilson.co.uk>
> Date: Wed May 9 11:56:28 2012 +0100
>
> drm/i915: gen6_enable_rps() wants to be called after ring
> initialisation
>
> Cheers, Daniel
I re-tested with latest drm-intel-next-queued (with everything applied
up to this patch), and applied the remaining patches on top of it -
including this power wells patch - and confirmed that it still works.
I haven't tested suspend-resume yet (as this does not works yet anyway :)).
next prev parent reply other threads:[~2012-05-10 15:08 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-05-09 18:37 [PATCH 00/25] Haswell fixes Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 01/25] drm/i915: add new Haswell DIP controls registers Eugeni Dodonov
2012-05-10 0:34 ` Paulo Zanoni
2012-05-10 1:02 ` Eugeni Dodonov
2012-05-10 3:03 ` Paulo Zanoni
2012-05-10 8:32 ` Daniel Vetter
2012-05-10 13:18 ` Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 02/25] drm/i915: reuse Ivy Bridge interrupts code for Haswell Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 03/25] drm/i915: add support for SBI ops Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 04/25] drm/i915: calculate watermarks for devices that have 3 pipes Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 05/25] drm/i915: properly check for pipe count Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 06/25] drm/i915: show unknown sdvox registers on hdmi init Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 07/25] drm/i915: do not use fdi_normal_train on Haswell Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 08/25] drm/i915: detect PCH encoders " Eugeni Dodonov
2012-05-09 21:46 ` Daniel Vetter
2012-05-09 23:30 ` Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 09/25] drm/i915: enable power wells on Haswell init Eugeni Dodonov
2012-05-09 21:42 ` Daniel Vetter
2012-05-09 23:29 ` Eugeni Dodonov
2012-05-10 14:48 ` Daniel Vetter
2012-05-10 15:08 ` Eugeni Dodonov [this message]
2012-05-09 18:37 ` [PATCH 10/25] drm/i915: add LPT PCH checks Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 11/25] drm/i915: handle DDI-related assertions Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 12/25] drm/i915: account for only one PCH receiver on Haswell Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 13/25] drm/i915: initialize DDI buffer translations Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 14/25] drm/i915: support DDI training in FDI mode Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 15/25] drm/i915: use ironlake eld write routine for Haswell Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 16/25] drm/i915: define Haswell watermarks and clock gating Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 17/25] drm/i915: program WM_LINETIME on Haswell Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 18/25] drm/i915: disable pipe DDI function when disabling pipe Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 19/25] drm/i915: program iCLKIP on Lynx Point Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 20/25] drm/i915: detect digital outputs on Haswell Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 21/25] drm/i915: add support for DDI-controlled digital outputs Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 22/25] drm/i915: add WR PLL programming table Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 23/25] drm/i915: move HDMI structs to shared location Eugeni Dodonov
2012-05-09 22:05 ` Daniel Vetter
2012-05-09 18:37 ` [PATCH 24/25] drm/i915: prepare HDMI link for Haswell Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 25/25] drm/i915: hook Haswell devices in place Eugeni Dodonov
2012-05-10 15:56 ` Daniel Vetter
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=4FABD9E6.6090909@linux.intel.com \
--to=eugeni.dodonov@linux.intel.com \
--cc=daniel@ffwll.ch \
--cc=eugeni.dodonov@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox