From: Daniel Vetter <daniel@ffwll.ch>
To: Eugeni Dodonov <eugeni.dodonov@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 08/25] drm/i915: detect PCH encoders on Haswell
Date: Wed, 9 May 2012 23:46:58 +0200 [thread overview]
Message-ID: <20120509214658.GF4963@phenom.ffwll.local> (raw)
In-Reply-To: <1336588652-702-9-git-send-email-eugeni.dodonov@intel.com>
On Wed, May 09, 2012 at 03:37:15PM -0300, Eugeni Dodonov wrote:
> On Haswell, the recommended PCH-connected output is the one driven by DDI
> E in FDI mode, used for VGA connection. All the others are handled by the
> CPU.
>
> Note that this does not accounts for Haswell/PPT combination yet, so if we
> encounter such combination an error message is thrown to indicate that
> things could go wrong.
>
> Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
> ---
> drivers/gpu/drm/i915/intel_display.c | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index f809d6a..96933cc 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -2610,6 +2610,22 @@ static bool intel_crtc_driving_pch(struct drm_crtc *crtc)
> if (encoder->base.crtc != crtc)
> continue;
>
> + /* On Haswell, LPT PCH handles the VGA connection via FDI, and Haswell
> + * CPU handles all others */
> + if (IS_HASWELL(dev)) {
> + if (encoder->type == DRM_MODE_ENCODER_DAC) {
> + /* It is still unclear how this would work on PPT, so throw up an error */
> + if (!HAS_PCH_LPT(dev))
> + DRM_ERROR("DAC detected on a non-LPT PCH, this probably won't work\n");
Hm, I guess we should move the LPT check out of the DAC check - after all
we could drive a DP output through FDI on a PPT. Or maybe not, which
implies that we have no clue in either case ;-)
-Daniel
> +
> + return true;
> + } else {
> + DRM_DEBUG_KMS("Haswell detected encoder %d, assuming is CPU\n",
> + encoder->type);
> + return false;
> + }
> + }
> +
> switch (encoder->type) {
> case INTEL_OUTPUT_EDP:
> if (!intel_encoder_is_pch_edp(&encoder->base))
> --
> 1.7.10
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Mail: daniel@ffwll.ch
Mobile: +41 (0)79 365 57 48
next prev parent reply other threads:[~2012-05-09 21:45 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-05-09 18:37 [PATCH 00/25] Haswell fixes Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 01/25] drm/i915: add new Haswell DIP controls registers Eugeni Dodonov
2012-05-10 0:34 ` Paulo Zanoni
2012-05-10 1:02 ` Eugeni Dodonov
2012-05-10 3:03 ` Paulo Zanoni
2012-05-10 8:32 ` Daniel Vetter
2012-05-10 13:18 ` Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 02/25] drm/i915: reuse Ivy Bridge interrupts code for Haswell Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 03/25] drm/i915: add support for SBI ops Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 04/25] drm/i915: calculate watermarks for devices that have 3 pipes Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 05/25] drm/i915: properly check for pipe count Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 06/25] drm/i915: show unknown sdvox registers on hdmi init Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 07/25] drm/i915: do not use fdi_normal_train on Haswell Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 08/25] drm/i915: detect PCH encoders " Eugeni Dodonov
2012-05-09 21:46 ` Daniel Vetter [this message]
2012-05-09 23:30 ` Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 09/25] drm/i915: enable power wells on Haswell init Eugeni Dodonov
2012-05-09 21:42 ` Daniel Vetter
2012-05-09 23:29 ` Eugeni Dodonov
2012-05-10 14:48 ` Daniel Vetter
2012-05-10 15:08 ` Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 10/25] drm/i915: add LPT PCH checks Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 11/25] drm/i915: handle DDI-related assertions Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 12/25] drm/i915: account for only one PCH receiver on Haswell Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 13/25] drm/i915: initialize DDI buffer translations Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 14/25] drm/i915: support DDI training in FDI mode Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 15/25] drm/i915: use ironlake eld write routine for Haswell Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 16/25] drm/i915: define Haswell watermarks and clock gating Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 17/25] drm/i915: program WM_LINETIME on Haswell Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 18/25] drm/i915: disable pipe DDI function when disabling pipe Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 19/25] drm/i915: program iCLKIP on Lynx Point Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 20/25] drm/i915: detect digital outputs on Haswell Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 21/25] drm/i915: add support for DDI-controlled digital outputs Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 22/25] drm/i915: add WR PLL programming table Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 23/25] drm/i915: move HDMI structs to shared location Eugeni Dodonov
2012-05-09 22:05 ` Daniel Vetter
2012-05-09 18:37 ` [PATCH 24/25] drm/i915: prepare HDMI link for Haswell Eugeni Dodonov
2012-05-09 18:37 ` [PATCH 25/25] drm/i915: hook Haswell devices in place Eugeni Dodonov
2012-05-10 15:56 ` Daniel Vetter
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