* [PATCH 1/4 v4] drm/i915: timeout parameter for seqno wait
@ 2012-05-11 20:54 Ben Widawsky
2012-05-11 20:54 ` [PATCH 2/4 v3] drm/i915: improve i915_wait_request_begin trace Ben Widawsky
` (5 more replies)
0 siblings, 6 replies; 11+ messages in thread
From: Ben Widawsky @ 2012-05-11 20:54 UTC (permalink / raw)
To: intel-gfx; +Cc: Ben Widawsky
Insert a wait parameter in the code so we can possibly timeout on a
seqno wait if need be. The code should be functionally the same as
before because all the callers will continue to retry if an arbitrary
timeout elapses.
We'd like to have nanosecond granularity, but the only way to do this is
with hrtimer, and that doesn't fit well with the needs of this code.
v2: Fix rebase error (Chris)
Return proper time even in wedged + signal case (Chris + Ben)
Use timespec constructs (Ben)
Didn't take Daniel's advice regarding the Frankenstein-ness of the
function. I did try his advice, but in the end I liked the way the
original code looked, better.
v3: Make wakeups far less frequent for infinite waits (Chris)
v4: Remove dummy_wait variable (Daniel)
Use raw monotonic time instead of jiffies (made the code a bit cleaner) (Ben)
Added a couple of warnings (Ben)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
drivers/gpu/drm/i915/i915_gem.c | 73 ++++++++++++++++++++++++++++++++-------
1 file changed, 61 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 44a5f24..c558bae 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1868,34 +1868,85 @@ i915_gem_check_olr(struct intel_ring_buffer *ring, u32 seqno)
return ret;
}
+/**
+ * __wait_seqno - wait until execution of seqno has finished
+ * @ring: the ring expected to report seqno
+ * @seqno: duh!
+ * @interruptible: do an interruptible wait (normally yes)
+ * @timeout: in - how long to wait (NULL forever); out - how much time remaining
+ *
+ * Returns 0 if the seqno was found within the alloted time. Else returns the
+ * errno with remaining time filled in timeout argument.
+ */
static int __wait_seqno(struct intel_ring_buffer *ring, u32 seqno,
- bool interruptible)
+ bool interruptible, struct timespec *timeout)
{
drm_i915_private_t *dev_priv = ring->dev->dev_private;
- int ret = 0;
+ struct timespec before, now, wait_time={1,0};
+ unsigned long timeout_jiffies;
+ long end;
+ bool wait_forever = true;
if (i915_seqno_passed(ring->get_seqno(ring), seqno))
return 0;
trace_i915_gem_request_wait_begin(ring, seqno);
+
+ if (timeout != NULL) {
+ wait_time = *timeout;
+ wait_forever = false;
+ }
+
+ timeout_jiffies = timespec_to_jiffies(&wait_time);
+
if (WARN_ON(!ring->irq_get(ring)))
return -ENODEV;
+ /* Record current jiffies in case interrupted by signal, or wedged * */
+ getrawmonotonic(&before);
+
#define EXIT_COND \
(i915_seqno_passed(ring->get_seqno(ring), seqno) || \
atomic_read(&dev_priv->mm.wedged))
+ do {
+ if (interruptible)
+ end = wait_event_interruptible_timeout(ring->irq_queue,
+ EXIT_COND,
+ timeout_jiffies);
+ else
+ end = wait_event_timeout(ring->irq_queue, EXIT_COND,
+ timeout_jiffies);
- if (interruptible)
- ret = wait_event_interruptible(ring->irq_queue,
- EXIT_COND);
- else
- wait_event(ring->irq_queue, EXIT_COND);
+ if (atomic_read(&dev_priv->mm.wedged))
+ end = -EAGAIN;
+ } while (end == 0 && wait_forever);
+
+ getrawmonotonic(&now);
ring->irq_put(ring);
trace_i915_gem_request_wait_end(ring, seqno);
#undef EXIT_COND
- return ret;
+ switch (end) {
+ case -EAGAIN: /* Wedged */
+ case -ERESTARTSYS: /* Signal */
+ if (!WARN_ON(timespec_compare(&now, &before) <= 0) && timeout) {
+ struct timespec temp = *timeout;
+ struct timespec sleep_time = timespec_sub(now, before);
+ *timeout = timespec_sub(*timeout, sleep_time);
+ WARN_ON(timespec_compare(&temp, timeout) < 0);
+ }
+ return (int)end;
+ case 0: /* Timeout */
+ if (timeout)
+ jiffies_to_timespec(end, timeout);
+ return -ETIME;
+ default: /* Completed */
+ WARN_ON(end < 0); /* We're not aware of other errors */
+ if (timeout)
+ jiffies_to_timespec(end, timeout);
+ return 0;
+ }
}
/**
@@ -1919,9 +1970,7 @@ i915_wait_request(struct intel_ring_buffer *ring,
if (ret)
return ret;
- ret = __wait_seqno(ring, seqno, dev_priv->mm.interruptible);
- if (atomic_read(&dev_priv->mm.wedged))
- ret = -EAGAIN;
+ ret = __wait_seqno(ring, seqno, dev_priv->mm.interruptible, NULL);
return ret;
}
@@ -2996,7 +3045,7 @@ i915_gem_ring_throttle(struct drm_device *dev, struct drm_file *file)
if (seqno == 0)
return 0;
- ret = __wait_seqno(ring, seqno, true);
+ ret = __wait_seqno(ring, seqno, true, NULL);
if (ret == 0)
queue_delayed_work(dev_priv->wq, &dev_priv->mm.retire_work, 0);
--
1.7.10.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 2/4 v3] drm/i915: improve i915_wait_request_begin trace
2012-05-11 20:54 [PATCH 1/4 v4] drm/i915: timeout parameter for seqno wait Ben Widawsky
@ 2012-05-11 20:54 ` Ben Widawsky
2012-05-11 20:54 ` [PATCH 3/4 v6] drm/i915: wait render timeout ioctl Ben Widawsky
` (4 subsequent siblings)
5 siblings, 0 replies; 11+ messages in thread
From: Ben Widawsky @ 2012-05-11 20:54 UTC (permalink / raw)
To: intel-gfx; +Cc: Ben Widawsky
The trace events adds whether or not the wait was blocking. Blocking in
this case means to hold struct_mutex (ie. no new work can be submitted
during the wait). The information is inherently racy.
The blocking information is racy since mutex_is_locked doesn't check
that the current thread holds the lock. The only other option would be
to pass the boolean information of whether or not the class was blocking
down through the stack which is less desirable.
v2: Don't do a trace event per loop. (Chris)
Only get blocking/non-blocking info (Chris)
v3: updated comment in code as well as commit msg (Daniel)
Add "(NB)" to trace information to remind us in 6 months (Ben)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
drivers/gpu/drm/i915/i915_trace.h | 28 ++++++++++++++++++++++++++--
1 file changed, 26 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h
index dac7bba..fe90b3a 100644
--- a/drivers/gpu/drm/i915/i915_trace.h
+++ b/drivers/gpu/drm/i915/i915_trace.h
@@ -311,9 +311,33 @@ DEFINE_EVENT(i915_gem_request, i915_gem_request_retire,
TP_ARGS(ring, seqno)
);
-DEFINE_EVENT(i915_gem_request, i915_gem_request_wait_begin,
+TRACE_EVENT(i915_gem_request_wait_begin,
TP_PROTO(struct intel_ring_buffer *ring, u32 seqno),
- TP_ARGS(ring, seqno)
+ TP_ARGS(ring, seqno),
+
+ TP_STRUCT__entry(
+ __field(u32, dev)
+ __field(u32, ring)
+ __field(u32, seqno)
+ __field(bool, blocking)
+ ),
+
+ /* NB: the blocking information is racy since mutex_is_locked
+ * doesn't check that the current thread holds the lock. The only
+ * other option would be to pass the boolean information of whether
+ * or not the class was blocking down through the stack which is
+ * less desirable.
+ */
+ TP_fast_assign(
+ __entry->dev = ring->dev->primary->index;
+ __entry->ring = ring->id;
+ __entry->seqno = seqno;
+ __entry->blocking = mutex_is_locked(&ring->dev->struct_mutex);
+ ),
+
+ TP_printk("dev=%u, ring=%u, seqno=%u, blocking=%s",
+ __entry->dev, __entry->ring, __entry->seqno,
+ __entry->blocking ? "yes (NB)" : "no")
);
DEFINE_EVENT(i915_gem_request, i915_gem_request_wait_end,
--
1.7.10.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 3/4 v6] drm/i915: wait render timeout ioctl
2012-05-11 20:54 [PATCH 1/4 v4] drm/i915: timeout parameter for seqno wait Ben Widawsky
2012-05-11 20:54 ` [PATCH 2/4 v3] drm/i915: improve i915_wait_request_begin trace Ben Widawsky
@ 2012-05-11 20:54 ` Ben Widawsky
2012-05-11 23:09 ` Eugeni Dodonov
2012-05-11 20:54 ` [PATCH 4/4] drm/i915: s/i915_wait_reqest/i915_wait_seqno/g Ben Widawsky
` (3 subsequent siblings)
5 siblings, 1 reply; 11+ messages in thread
From: Ben Widawsky @ 2012-05-11 20:54 UTC (permalink / raw)
To: intel-gfx; +Cc: Ben Widawsky
This helps implement GL_ARB_sync but stops short of allowing full blown
sync objects. Finally we can use the new timed seqno waiting function
to allow userspace to wait on a buffer object with a timeout. This
implements that interface.
The IOCTL will take as input a buffer object handle, and a timeout in
nanoseconds (flags is currently optional but will likely be used for
permutations of flush operations). Users may specify 0 nanoseconds to
instantly check.
The wait ioctl with a timeout of 0 reimplements the busy ioctl. With any
non-zero timeout parameter the wait ioctl will wait for the given number
of nanoseconds on an object becoming unbusy. Since the wait itself does
so holding struct_mutex the object may become re-busied before this
completes. A similar but shorter race condition exists in the busy
ioctl.
v2: ETIME/ERESTARTSYS instead of changing to EBUSY, and EGAIN (Chris)
Flush the object from the gpu write domain (Chris + Daniel)
Fix leaked refcount in good case (Chris)
Naturally align ioctl struct (Chris)
v3: Drop lock after getting seqno to avoid ugly dance (Chris)
v4: check for 0 timeout after olr check to allow polling (Chris)
v5: Updated the comment. (Chris)
v6: Return -ETIME instead of -EBUSY when timeout_ns is 0 (Daniel)
Fix the commit message comment to be less ugly (Ben)
Add a warning to check the return timespec (Ben)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
drivers/gpu/drm/i915/i915_dma.c | 1 +
drivers/gpu/drm/i915/i915_drv.h | 2 +
drivers/gpu/drm/i915/i915_gem.c | 86 +++++++++++++++++++++++++++++++++++++++
include/drm/i915_drm.h | 10 +++++
4 files changed, 99 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 006ea47..bd6b402 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1800,6 +1800,7 @@ struct drm_ioctl_desc i915_ioctls[] = {
DRM_IOCTL_DEF_DRV(I915_OVERLAY_ATTRS, intel_overlay_attrs, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED),
DRM_IOCTL_DEF_DRV(I915_SET_SPRITE_COLORKEY, intel_sprite_set_colorkey, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED),
DRM_IOCTL_DEF_DRV(I915_GET_SPRITE_COLORKEY, intel_sprite_get_colorkey, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED),
+ DRM_IOCTL_DEF_DRV(I915_GEM_WAIT, i915_gem_wait_ioctl, DRM_UNLOCKED),
};
int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 83a557c..8afc673 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1226,6 +1226,8 @@ int i915_gem_get_tiling(struct drm_device *dev, void *data,
struct drm_file *file_priv);
int i915_gem_get_aperture_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv);
+int i915_gem_wait_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *file_priv);
void i915_gem_load(struct drm_device *dev);
int i915_gem_init_object(struct drm_gem_object *obj);
int __must_check i915_gem_flush_ring(struct intel_ring_buffer *ring,
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index c558bae..37ff972 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2003,6 +2003,92 @@ i915_gem_object_wait_rendering(struct drm_i915_gem_object *obj)
}
/**
+ * i915_gem_wait_ioctl - implements DRM_IOCTL_I915_GEM_WAIT
+ * @DRM_IOCTL_ARGS: standard ioctl arguments
+ *
+ * Returns 0 if successful, else an error is returned with the remaining time in
+ * the timeout parameter.
+ * -ETIME: object is still busy after timeout
+ * -ERESTARTSYS: signal interrupted the wait
+ * -ENONENT: object doesn't exist
+ * Also possible, but rare:
+ * -EAGAIN: GPU wedged
+ * -ENOMEM: damn
+ * -ENODEV: Internal IRQ fail
+ * -E?: The add request failed
+ *
+ * The wait ioctl with a timeout of 0 reimplements the busy ioctl. With any
+ * non-zero timeout parameter the wait ioctl will wait for the given number of
+ * nanoseconds on an object becoming unbusy. Since the wait itself does so
+ * without holding struct_mutex the object may become re-busied before this
+ * function completes. A similar but shorter * race condition exists in the busy
+ * ioctl
+ */
+int
+i915_gem_wait_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
+{
+ struct drm_i915_gem_wait *args = data;
+ struct drm_i915_gem_object *obj;
+ struct intel_ring_buffer *ring = NULL;
+ struct timespec timeout;
+ u32 seqno = 0;
+ int ret = 0;
+
+ timeout = ns_to_timespec(args->timeout_ns);
+
+ ret = i915_mutex_lock_interruptible(dev);
+ if (ret)
+ return ret;
+
+ obj = to_intel_bo(drm_gem_object_lookup(dev, file, args->bo_handle));
+ if (&obj->base == NULL) {
+ mutex_unlock(&dev->struct_mutex);
+ return -ENOENT;
+ }
+
+ /* Need to make sure the object is flushed first. This non-obvious
+ * flush is required to enforce that (active && !olr) == no wait
+ * necessary.
+ */
+ ret = i915_gem_object_flush_gpu_write_domain(obj);
+ if (ret)
+ goto out;
+
+ if (obj->active) {
+ seqno = obj->last_rendering_seqno;
+ ring = obj->ring;
+ }
+
+ if (seqno == 0)
+ goto out;
+
+ ret = i915_gem_check_olr(ring, seqno);
+ if (ret)
+ goto out;
+
+ /* Do this after OLR check to make sure we make forward progress polling
+ * on this IOCTL with a 0 timeout (like busy ioctl)
+ */
+ if (!args->timeout_ns) {
+ ret = -ETIME;
+ goto out;
+ }
+
+ drm_gem_object_unreference(&obj->base);
+ mutex_unlock(&dev->struct_mutex);
+
+ ret = __wait_seqno(ring, seqno, true, &timeout);
+ WARN_ON(!timespec_valid(&timeout));
+ args->timeout_ns = timespec_to_ns(&timeout);
+ return ret;
+
+out:
+ drm_gem_object_unreference(&obj->base);
+ mutex_unlock(&dev->struct_mutex);
+ return ret;
+}
+
+/**
* i915_gem_object_sync - sync an object to a ring.
*
* @obj: object which may be in use on another ring.
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index f3f8224..bab1743 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -200,6 +200,7 @@ typedef struct _drm_i915_sarea {
#define DRM_I915_GEM_EXECBUFFER2 0x29
#define DRM_I915_GET_SPRITE_COLORKEY 0x2a
#define DRM_I915_SET_SPRITE_COLORKEY 0x2b
+#define DRM_I915_GEM_WAIT 0x2c
#define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
#define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH)
@@ -243,6 +244,7 @@ typedef struct _drm_i915_sarea {
#define DRM_IOCTL_I915_OVERLAY_ATTRS DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_OVERLAY_ATTRS, struct drm_intel_overlay_attrs)
#define DRM_IOCTL_I915_SET_SPRITE_COLORKEY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_SET_SPRITE_COLORKEY, struct drm_intel_sprite_colorkey)
#define DRM_IOCTL_I915_GET_SPRITE_COLORKEY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_SET_SPRITE_COLORKEY, struct drm_intel_sprite_colorkey)
+#define DRM_IOCTL_I915_GEM_WAIT DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_WAIT, struct drm_i915_gem_wait)
/* Allow drivers to submit batchbuffers directly to hardware, relying
* on the security mechanisms provided by hardware.
@@ -886,4 +888,12 @@ struct drm_intel_sprite_colorkey {
__u32 flags;
};
+struct drm_i915_gem_wait {
+ /** Handle of BO we shall wait on */
+ __u32 bo_handle;
+ __u32 flags;
+ /** Number of nanoseconds to wait, Returns time remaining. */
+ __u64 timeout_ns;
+};
+
#endif /* _I915_DRM_H_ */
--
1.7.10.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 4/4] drm/i915: s/i915_wait_reqest/i915_wait_seqno/g
2012-05-11 20:54 [PATCH 1/4 v4] drm/i915: timeout parameter for seqno wait Ben Widawsky
2012-05-11 20:54 ` [PATCH 2/4 v3] drm/i915: improve i915_wait_request_begin trace Ben Widawsky
2012-05-11 20:54 ` [PATCH 3/4 v6] drm/i915: wait render timeout ioctl Ben Widawsky
@ 2012-05-11 20:54 ` Ben Widawsky
2012-05-11 22:56 ` Eugeni Dodonov
2012-05-11 20:54 ` [PATCH] intel: add a timed wait function Ben Widawsky
` (2 subsequent siblings)
5 siblings, 1 reply; 11+ messages in thread
From: Ben Widawsky @ 2012-05-11 20:54 UTC (permalink / raw)
To: intel-gfx; +Cc: Ben Widawsky
Wait request is poorly named IMO. After working with these functions for
some time, I feel it's much clearer to name the functions more
appropriately.
Of course we must update the callers to use the new name as well.
This leaves room within our namespace for a *real* wait request function
at some point.
Note to maintainer: this patch is optional.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
drivers/gpu/drm/i915/i915_drv.h | 4 ++--
drivers/gpu/drm/i915/i915_gem.c | 9 ++++-----
drivers/gpu/drm/i915/intel_overlay.c | 4 ++--
drivers/gpu/drm/i915/intel_ringbuffer.c | 2 +-
4 files changed, 9 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 8afc673..8c6d4e7 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1312,8 +1312,8 @@ int __must_check i915_gem_idle(struct drm_device *dev);
int __must_check i915_add_request(struct intel_ring_buffer *ring,
struct drm_file *file,
struct drm_i915_gem_request *request);
-int __must_check i915_wait_request(struct intel_ring_buffer *ring,
- uint32_t seqno);
+int __must_check i915_wait_seqno(struct intel_ring_buffer *ring,
+ uint32_t seqno);
int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf);
int __must_check
i915_gem_object_set_to_gtt_domain(struct drm_i915_gem_object *obj,
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 37ff972..eb1f4e1 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1954,8 +1954,7 @@ static int __wait_seqno(struct intel_ring_buffer *ring, u32 seqno,
* request and object lists appropriately for that event.
*/
int
-i915_wait_request(struct intel_ring_buffer *ring,
- uint32_t seqno)
+i915_wait_seqno(struct intel_ring_buffer *ring, uint32_t seqno)
{
drm_i915_private_t *dev_priv = ring->dev->dev_private;
int ret = 0;
@@ -1993,7 +1992,7 @@ i915_gem_object_wait_rendering(struct drm_i915_gem_object *obj)
* it.
*/
if (obj->active) {
- ret = i915_wait_request(obj->ring, obj->last_rendering_seqno);
+ ret = i915_wait_seqno(obj->ring, obj->last_rendering_seqno);
if (ret)
return ret;
i915_gem_retire_requests_ring(obj->ring);
@@ -2266,7 +2265,7 @@ static int i915_ring_idle(struct intel_ring_buffer *ring)
return ret;
}
- return i915_wait_request(ring, i915_gem_next_request_seqno(ring));
+ return i915_wait_seqno(ring, i915_gem_next_request_seqno(ring));
}
int i915_gpu_idle(struct drm_device *dev)
@@ -2465,7 +2464,7 @@ i915_gem_object_flush_fence(struct drm_i915_gem_object *obj)
}
if (obj->last_fenced_seqno) {
- ret = i915_wait_request(obj->ring, obj->last_fenced_seqno);
+ ret = i915_wait_seqno(obj->ring, obj->last_fenced_seqno);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
index 458743d..830d0dd 100644
--- a/drivers/gpu/drm/i915/intel_overlay.c
+++ b/drivers/gpu/drm/i915/intel_overlay.c
@@ -226,7 +226,7 @@ static int intel_overlay_do_wait_request(struct intel_overlay *overlay,
}
overlay->last_flip_req = request->seqno;
overlay->flip_tail = tail;
- ret = i915_wait_request(ring, overlay->last_flip_req);
+ ret = i915_wait_seqno(ring, overlay->last_flip_req);
if (ret)
return ret;
i915_gem_retire_requests(dev);
@@ -452,7 +452,7 @@ static int intel_overlay_recover_from_interrupt(struct intel_overlay *overlay)
if (overlay->last_flip_req == 0)
return 0;
- ret = i915_wait_request(ring, overlay->last_flip_req);
+ ret = i915_wait_seqno(ring, overlay->last_flip_req);
if (ret)
return ret;
i915_gem_retire_requests(dev);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index b59b6d5..1df1694 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1085,7 +1085,7 @@ static int intel_ring_wait_seqno(struct intel_ring_buffer *ring, u32 seqno)
was_interruptible = dev_priv->mm.interruptible;
dev_priv->mm.interruptible = false;
- ret = i915_wait_request(ring, seqno);
+ ret = i915_wait_seqno(ring, seqno);
dev_priv->mm.interruptible = was_interruptible;
if (!ret)
--
1.7.10.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH] intel: add a timed wait function
2012-05-11 20:54 [PATCH 1/4 v4] drm/i915: timeout parameter for seqno wait Ben Widawsky
` (2 preceding siblings ...)
2012-05-11 20:54 ` [PATCH 4/4] drm/i915: s/i915_wait_reqest/i915_wait_seqno/g Ben Widawsky
@ 2012-05-11 20:54 ` Ben Widawsky
2012-05-11 20:54 ` [PATCH] tests/wait render timeout test Ben Widawsky
2012-05-11 23:09 ` [PATCH 1/4 v4] drm/i915: timeout parameter for seqno wait Eugeni Dodonov
5 siblings, 0 replies; 11+ messages in thread
From: Ben Widawsky @ 2012-05-11 20:54 UTC (permalink / raw)
To: intel-gfx; +Cc: Ben Widawsky
drm_intel_gem_bo_wait(bo, &timeout in ns)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
include/drm/i915_drm.h | 10 ++++++++++
intel/intel_bufmgr.h | 1 +
intel/intel_bufmgr_gem.c | 26 ++++++++++++++++++++++++++
3 files changed, 37 insertions(+)
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index af3ce17..5dc5f12 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -191,6 +191,7 @@ typedef struct _drm_i915_sarea {
#define DRM_I915_GEM_EXECBUFFER2 0x29
#define DRM_I915_GET_SPRITE_COLORKEY 0x2a
#define DRM_I915_SET_SPRITE_COLORKEY 0x2b
+#define DRM_I915_GEM_WAIT 0x2c
#define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
#define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH)
@@ -234,6 +235,7 @@ typedef struct _drm_i915_sarea {
#define DRM_IOCTL_I915_OVERLAY_ATTRS DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_OVERLAY_ATTRS, struct drm_intel_overlay_attrs)
#define DRM_IOCTL_I915_SET_SPRITE_COLORKEY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_SET_SPRITE_COLORKEY, struct drm_intel_sprite_colorkey)
#define DRM_IOCTL_I915_GET_SPRITE_COLORKEY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_SET_SPRITE_COLORKEY, struct drm_intel_sprite_colorkey)
+#define DRM_IOCTL_I915_GEM_WAIT DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_WAIT, struct drm_i915_gem_wait)
/* Allow drivers to submit batchbuffers directly to hardware, relying
* on the security mechanisms provided by hardware.
@@ -876,4 +878,12 @@ struct drm_intel_sprite_colorkey {
__u32 flags;
};
+struct drm_i915_gem_wait {
+ /** Handle of BO we shall wait on */
+ __u32 bo_handle;
+ __u32 flags;
+ /** Number of nanoseconds to wait, Returns time remaining. */
+ __u64 timeout_ns;
+};
+
#endif /* _I915_DRM_H_ */
diff --git a/intel/intel_bufmgr.h b/intel/intel_bufmgr.h
index c197abc..d78884e 100644
--- a/intel/intel_bufmgr.h
+++ b/intel/intel_bufmgr.h
@@ -184,6 +184,7 @@ int drm_intel_get_pipe_from_crtc_id(drm_intel_bufmgr *bufmgr, int crtc_id);
int drm_intel_get_aperture_sizes(int fd, size_t *mappable, size_t *total);
int drm_intel_bufmgr_gem_get_devid(drm_intel_bufmgr *bufmgr);
+int drm_intel_gem_bo_wait(drm_intel_bo *bo, uint64_t *timeout_ns);
/* drm_intel_bufmgr_fake.c */
drm_intel_bufmgr *drm_intel_bufmgr_fake_init(int fd,
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index b776d2f..695a449 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -1478,6 +1478,32 @@ drm_intel_gem_bo_wait_rendering(drm_intel_bo *bo)
drm_intel_gem_bo_start_gtt_access(bo, 1);
}
+int drm_intel_gem_bo_wait(drm_intel_bo *bo, uint64_t *timeout_ns)
+{
+ drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr;
+ drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
+ struct drm_i915_gem_wait wait;
+ int ret;
+
+ if (!timeout_ns)
+ return -EINVAL;
+
+ wait.bo_handle = bo_gem->gem_handle;
+ wait.timeout_ns = *timeout_ns;
+ wait.flags = 0;
+ ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_WAIT, &wait);
+ if (ret)
+ return ret;
+
+ if (wait.timeout_ns == 0) {
+ DBG("Wait timed out on buffer %d\n", bo_gem->gem_handle);
+ *timeout_ns = 0;
+ } else
+ *timeout_ns = wait.timeout_ns;
+
+ return ret;
+}
+
/**
* Sets the object to the GTT read and possibly write domain, used by the X
* 2D driver in the absence of kernel support to do drm_intel_gem_bo_map_gtt().
--
1.7.10.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH] tests/wait render timeout test
2012-05-11 20:54 [PATCH 1/4 v4] drm/i915: timeout parameter for seqno wait Ben Widawsky
` (3 preceding siblings ...)
2012-05-11 20:54 ` [PATCH] intel: add a timed wait function Ben Widawsky
@ 2012-05-11 20:54 ` Ben Widawsky
2012-05-11 23:09 ` [PATCH 1/4 v4] drm/i915: timeout parameter for seqno wait Eugeni Dodonov
5 siblings, 0 replies; 11+ messages in thread
From: Ben Widawsky @ 2012-05-11 20:54 UTC (permalink / raw)
To: intel-gfx; +Cc: Ben Widawsky
Assures that signals interrupting the wait works properly. Because of
the scheduling around signals, interrupted waits will *seem* faster as
the GPU continues to work while all the CPU scheduling stuff happens.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
tests/Makefile.am | 3 +
tests/gem_wait_render_timeout.c | 155 +++++++++++++++++++++++++++++++++++++++
2 files changed, 158 insertions(+)
create mode 100644 tests/gem_wait_render_timeout.c
diff --git a/tests/Makefile.am b/tests/Makefile.am
index 18caf78..8dcf416 100644
--- a/tests/Makefile.am
+++ b/tests/Makefile.am
@@ -63,6 +63,7 @@ TESTS_progs = \
drm_vma_limiter_cached \
sysfs_rc6_residency \
flip_test \
+ gem_wait_render_timeout \
$(NULL)
# IMPORTANT: The ZZ_ tests need to be run last!
@@ -116,3 +117,5 @@ AM_CFLAGS += $(CAIRO_CFLAGS) $(LIBUDEV_CFLAGS) $(GLIB_CFLAGS)
gem_fence_thrash_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
gem_fence_thrash_LDADD = $(LDADD) -lpthread
+
+gem_wait_render_timeout_LDADD = $(LDADD) -lrt
diff --git a/tests/gem_wait_render_timeout.c b/tests/gem_wait_render_timeout.c
new file mode 100644
index 0000000..8edfc43
--- /dev/null
+++ b/tests/gem_wait_render_timeout.c
@@ -0,0 +1,155 @@
+/*
+ * Copyright © 2012 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ * Ben Widawsky <ben@bwidawsk.net>
+ *
+ */
+
+#include <stdio.h>
+#include <time.h>
+#include "drm.h"
+#include "rendercopy.h"
+
+#define MSEC_PER_SEC 1000L
+#define USEC_PER_MSEC 1000L
+#define NSEC_PER_USEC 1000L
+#define NSEC_PER_MSEC 1000000L
+#define USEC_PER_SEC 1000000L
+#define NSEC_PER_SEC 1000000000L
+
+#define ENOUGH_WORK_IN_SECONDS 2
+#define BUF_SIZE (8<<20)
+#define BUF_PAGES ((8<<20)>>12)
+drm_intel_bo *dst, *dst2;
+
+/* returns time diff in milliseconds */
+static int64_t
+do_time_diff(struct timespec *end, struct timespec *start)
+{
+ int64_t ret;
+ ret = (NSEC_PER_MSEC * difftime(end->tv_sec, start->tv_sec)) +
+ ((end->tv_nsec/NSEC_PER_MSEC) - (start->tv_nsec/NSEC_PER_MSEC));
+ return ret;
+}
+
+
+static void blt_color_fill(struct intel_batchbuffer *batch,
+ drm_intel_bo *buf,
+ const unsigned int pages)
+{
+ const unsigned short height = pages;
+ const unsigned short width = 4096;
+ BEGIN_BATCH(5);
+ OUT_BATCH(COLOR_BLT_CMD |
+ COLOR_BLT_WRITE_ALPHA |
+ COLOR_BLT_WRITE_RGB);
+ OUT_BATCH((3 << 24) | /* 32 Bit Color */
+ 0xF0 | /* Raster OP copy background register */
+ 0); /* Dest pitch is 0 */
+ OUT_BATCH(width << 16 |
+ height);
+ OUT_RELOC(buf, I915_GEM_DOMAIN_RENDER, 0, 0);
+ OUT_BATCH(rand()); /* random pattern */
+ ADVANCE_BATCH();
+}
+
+int main(int argc, char **argv)
+{
+ drm_intel_bufmgr *bufmgr;
+ struct intel_batchbuffer *batch;
+ uint64_t timeout = ENOUGH_WORK_IN_SECONDS * NSEC_PER_SEC;
+ int fd, ret;
+ const bool do_signals = true; /* signals will seem to make the operation
+ * use less process CPU time */
+ bool done = false;
+ int i, iter = 0x100;
+
+ fd = drm_open_any();
+
+ bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
+ drm_intel_bufmgr_gem_enable_reuse(bufmgr);
+ batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
+
+ dst = drm_intel_bo_alloc(bufmgr, "dst", BUF_SIZE, 4096);
+ dst2 = drm_intel_bo_alloc(bufmgr, "dst2", BUF_SIZE, 4096);
+
+ /* Figure out a rough number of fills required to consume 1 second of
+ * GPU work.
+ */
+ do {
+ struct timespec start, end;
+ long diff;
+
+ assert(clock_gettime(CLOCK_MONOTONIC_RAW, &start) == 0);
+ for (i = 0; i < iter; i++)
+ blt_color_fill(batch, dst, BUF_PAGES);
+ intel_batchbuffer_flush(batch);
+ drm_intel_bo_wait_rendering(dst);
+ assert(clock_gettime(CLOCK_MONOTONIC_RAW, &end) == 0);
+
+ diff = do_time_diff(&end, &start);
+ assert(diff >= 0);
+
+ if ((diff / MSEC_PER_SEC) > ENOUGH_WORK_IN_SECONDS)
+ done = true;
+ else
+ iter <<= 1;
+ } while (!done && iter < 1000000);
+
+ assert(iter < 1000000);
+
+ printf("%d iters is enough work\n", iter);
+ gem_quiescent_gpu(fd);
+ if (do_signals)
+ drmtest_fork_signal_helper();
+ /* We should be able to do half as much work in the same amount of time */
+ for (i = 0; i < iter; i++)
+ blt_color_fill(batch, dst2, BUF_PAGES);
+
+ intel_batchbuffer_flush(batch);
+
+ ret = drm_intel_gem_bo_wait(dst2, &timeout);
+ if (do_signals)
+ drmtest_stop_signal_helper();
+ if (ret) {
+ fprintf(stderr, "Timed wait failed %s\n", strerror(errno));
+ exit(EXIT_FAILURE);
+ }
+
+ assert(timeout != 0);
+
+ if (timeout == (ENOUGH_WORK_IN_SECONDS * NSEC_PER_SEC))
+ printf("Buffer was already done!\n");
+ else {
+ printf("Finished with %lu time remaining\n", timeout);
+ }
+
+ drm_intel_bo_unreference(dst2);
+ drm_intel_bo_unreference(dst);
+ intel_batchbuffer_free(batch);
+ drm_intel_bufmgr_destroy(bufmgr);
+
+ close(fd);
+
+ return 0;
+}
--
1.7.10.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH 4/4] drm/i915: s/i915_wait_reqest/i915_wait_seqno/g
2012-05-11 20:54 ` [PATCH 4/4] drm/i915: s/i915_wait_reqest/i915_wait_seqno/g Ben Widawsky
@ 2012-05-11 22:56 ` Eugeni Dodonov
2012-05-12 21:20 ` Ben Widawsky
0 siblings, 1 reply; 11+ messages in thread
From: Eugeni Dodonov @ 2012-05-11 22:56 UTC (permalink / raw)
To: Ben Widawsky; +Cc: intel-gfx
On 05/11/2012 05:54 PM, Ben Widawsky wrote:
> Wait request is poorly named IMO. After working with these functions for
> some time, I feel it's much clearer to name the functions more
> appropriately.
>
> Of course we must update the callers to use the new name as well.
>
> This leaves room within our namespace for a *real* wait request function
> at some point.
>
> Note to maintainer: this patch is optional.
>
> Signed-off-by: Ben Widawsky<ben@bwidawsk.net>
My only bikeshedding is to 's/wait_reqest/wait_request' in patch title :).
Eugeni
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 3/4 v6] drm/i915: wait render timeout ioctl
2012-05-11 20:54 ` [PATCH 3/4 v6] drm/i915: wait render timeout ioctl Ben Widawsky
@ 2012-05-11 23:09 ` Eugeni Dodonov
2012-05-12 21:07 ` Ben Widawsky
0 siblings, 1 reply; 11+ messages in thread
From: Eugeni Dodonov @ 2012-05-11 23:09 UTC (permalink / raw)
To: Ben Widawsky; +Cc: intel-gfx
On 05/11/2012 05:54 PM, Ben Widawsky wrote:
> @@ -1800,6 +1800,7 @@ struct drm_ioctl_desc i915_ioctls[] = {
> DRM_IOCTL_DEF_DRV(I915_OVERLAY_ATTRS, intel_overlay_attrs, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED),
> DRM_IOCTL_DEF_DRV(I915_SET_SPRITE_COLORKEY, intel_sprite_set_colorkey, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED),
> DRM_IOCTL_DEF_DRV(I915_GET_SPRITE_COLORKEY, intel_sprite_get_colorkey, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED),
> + DRM_IOCTL_DEF_DRV(I915_GEM_WAIT, i915_gem_wait_ioctl, DRM_UNLOCKED),
> };
I was just wondering (not directly related to this patch, but more
thinking on the overall gem flow) - don't we want to use DRM_AUTH here?
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 1/4 v4] drm/i915: timeout parameter for seqno wait
2012-05-11 20:54 [PATCH 1/4 v4] drm/i915: timeout parameter for seqno wait Ben Widawsky
` (4 preceding siblings ...)
2012-05-11 20:54 ` [PATCH] tests/wait render timeout test Ben Widawsky
@ 2012-05-11 23:09 ` Eugeni Dodonov
5 siblings, 0 replies; 11+ messages in thread
From: Eugeni Dodonov @ 2012-05-11 23:09 UTC (permalink / raw)
To: Ben Widawsky; +Cc: intel-gfx
On 05/11/2012 05:54 PM, Ben Widawsky wrote:
> Insert a wait parameter in the code so we can possibly timeout on a
> seqno wait if need be. The code should be functionally the same as
> before because all the callers will continue to retry if an arbitrary
> timeout elapses.
>
> We'd like to have nanosecond granularity, but the only way to do this is
> with hrtimer, and that doesn't fit well with the needs of this code.
>
> v2: Fix rebase error (Chris)
> Return proper time even in wedged + signal case (Chris + Ben)
> Use timespec constructs (Ben)
> Didn't take Daniel's advice regarding the Frankenstein-ness of the
> function. I did try his advice, but in the end I liked the way the
> original code looked, better.
>
> v3: Make wakeups far less frequent for infinite waits (Chris)
>
> v4: Remove dummy_wait variable (Daniel)
> Use raw monotonic time instead of jiffies (made the code a bit cleaner) (Ben)
> Added a couple of warnings (Ben)
>
> Signed-off-by: Ben Widawsky<ben@bwidawsk.net>
I couldn't find much to bikeshed here except for question on patch 3 and
one small typo on Patch 4. So for the series:
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 3/4 v6] drm/i915: wait render timeout ioctl
2012-05-11 23:09 ` Eugeni Dodonov
@ 2012-05-12 21:07 ` Ben Widawsky
0 siblings, 0 replies; 11+ messages in thread
From: Ben Widawsky @ 2012-05-12 21:07 UTC (permalink / raw)
To: eugeni.dodonov; +Cc: intel-gfx
On Fri, 11 May 2012 20:09:19 -0300
Eugeni Dodonov <eugeni.dodonov@linux.intel.com> wrote:
> On 05/11/2012 05:54 PM, Ben Widawsky wrote:
> > @@ -1800,6 +1800,7 @@ struct drm_ioctl_desc i915_ioctls[] = {
> > DRM_IOCTL_DEF_DRV(I915_OVERLAY_ATTRS, intel_overlay_attrs, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED),
> > DRM_IOCTL_DEF_DRV(I915_SET_SPRITE_COLORKEY, intel_sprite_set_colorkey, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED),
> > DRM_IOCTL_DEF_DRV(I915_GET_SPRITE_COLORKEY, intel_sprite_get_colorkey, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED),
> > + DRM_IOCTL_DEF_DRV(I915_GEM_WAIT, i915_gem_wait_ioctl, DRM_UNLOCKED),
> > };
>
> I was just wondering (not directly related to this patch, but more
> thinking on the overall gem flow) - don't we want to use DRM_AUTH here?
I'd like to hear from others on this. I never really understand when to
use DRM_AUTH, and when not to. Given that BUSY ioctl uses DRM_AUTH, you
are probably right (and execbuffer too for that matter).
However from a security perspective, I don't really see why we need
DRM_AUTH for this, or BUSY, and OTOH, set domain doesn't have DRM_AUTH,
and the operation is quite similar, so I dunno.
At this point I think whatever is most consistent is the right answer.
--
Ben Widawsky, Intel Open Source Technology Center
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 4/4] drm/i915: s/i915_wait_reqest/i915_wait_seqno/g
2012-05-11 22:56 ` Eugeni Dodonov
@ 2012-05-12 21:20 ` Ben Widawsky
0 siblings, 0 replies; 11+ messages in thread
From: Ben Widawsky @ 2012-05-12 21:20 UTC (permalink / raw)
To: eugeni.dodonov; +Cc: intel-gfx
On Fri, 11 May 2012 19:56:42 -0300
Eugeni Dodonov <eugeni.dodonov@linux.intel.com> wrote:
> On 05/11/2012 05:54 PM, Ben Widawsky wrote:
> > Wait request is poorly named IMO. After working with these functions for
> > some time, I feel it's much clearer to name the functions more
> > appropriately.
> >
> > Of course we must update the callers to use the new name as well.
> >
> > This leaves room within our namespace for a *real* wait request function
> > at some point.
> >
> > Note to maintainer: this patch is optional.
> >
> > Signed-off-by: Ben Widawsky<ben@bwidawsk.net>
>
> My only bikeshedding is to 's/wait_reqest/wait_request' in patch title :).
>
> Eugeni
Thanks. Fixed locally. Daniel, let me know if you want me to resubmit it
when you're ready to merge.
--
Ben Widawsky, Intel Open Source Technology Center
^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2012-05-12 21:21 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2012-05-11 20:54 [PATCH 1/4 v4] drm/i915: timeout parameter for seqno wait Ben Widawsky
2012-05-11 20:54 ` [PATCH 2/4 v3] drm/i915: improve i915_wait_request_begin trace Ben Widawsky
2012-05-11 20:54 ` [PATCH 3/4 v6] drm/i915: wait render timeout ioctl Ben Widawsky
2012-05-11 23:09 ` Eugeni Dodonov
2012-05-12 21:07 ` Ben Widawsky
2012-05-11 20:54 ` [PATCH 4/4] drm/i915: s/i915_wait_reqest/i915_wait_seqno/g Ben Widawsky
2012-05-11 22:56 ` Eugeni Dodonov
2012-05-12 21:20 ` Ben Widawsky
2012-05-11 20:54 ` [PATCH] intel: add a timed wait function Ben Widawsky
2012-05-11 20:54 ` [PATCH] tests/wait render timeout test Ben Widawsky
2012-05-11 23:09 ` [PATCH 1/4 v4] drm/i915: timeout parameter for seqno wait Eugeni Dodonov
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox