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From: Ben Widawsky <benjamin.widawsky@intel.com>
To: Intel GFX <intel-gfx@lists.freedesktop.org>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Subject: [PATCH 02/21] drm/i915: Fix up the bdw pipe interrupt enable lists
Date: Thu,  7 Nov 2013 21:40:32 -0800	[thread overview]
Message-ID: <1383889251-498-2-git-send-email-benjamin.widawsky@intel.com> (raw)
In-Reply-To: <1383889251-498-1-git-send-email-benjamin.widawsky@intel.com>

From: Daniel Vetter <daniel.vetter@ffwll.ch>

- Pipe underrun can't just be enabled, we need some support code like
  on ilk-hsw to make this happen. So drop it for now.
- CRC error is a special mode of the CRC hardware that we don't use,
  so again drop it. Real CRC support for bdw will be added later.
- All the other error bits are about faults, so rename the #define and
  adjust the output.

v2: Use pipe_name as pointed out by Ville. Ville's comment was on a
previous patch, but it was easier to squash in here.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/gpu/drm/i915/i915_irq.c | 10 ++++++----
 drivers/gpu/drm/i915/i915_reg.h |  9 ++++-----
 2 files changed, 10 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index c04fbbf..e1bfc85 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1793,8 +1793,11 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg)
 			intel_finish_page_flip_plane(dev, pipe);
 		}
 
-		if (pipe_iir & GEN8_DE_PIPE_IRQ_ERRORS)
-			DRM_ERROR("Errors on pipe %c\n", 'A' + pipe);
+		if (pipe_iir & GEN8_DE_PIPE_IRQ_FAULT_ERRORS) {
+			DRM_ERROR("Fault errors on pipe %c\n: 0x%08x",
+				  pipe_name(pipe),
+				  pipe_iir & GEN8_DE_PIPE_IRQ_FAULT_ERRORS);
+		}
 
 		if (pipe_iir) {
 			ret = IRQ_HANDLED;
@@ -2863,9 +2866,8 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
 {
 	struct drm_device *dev = dev_priv->dev;
 	uint32_t de_pipe_enables = GEN8_PIPE_FLIP_DONE |
-				   GEN8_PIPE_SCAN_LINE_EVENT |
 				   GEN8_PIPE_VBLANK |
-				   GEN8_DE_PIPE_IRQ_ERRORS;
+				   GEN8_DE_PIPE_IRQ_FAULT_ERRORS;
 	int pipe;
 	dev_priv->de_irq_mask[PIPE_A] = ~de_pipe_enables;
 	dev_priv->de_irq_mask[PIPE_B] = ~de_pipe_enables;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index f150eda..9e75883 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4064,11 +4064,10 @@
 #define  GEN8_PIPE_SCAN_LINE_EVENT	(1 << 2)
 #define  GEN8_PIPE_VSYNC		(1 << 1)
 #define  GEN8_PIPE_VBLANK		(1 << 0)
-#define GEN8_DE_PIPE_IRQ_ERRORS	(GEN8_PIPE_UNDERRUN | \
-				 GEN8_PIPE_CDCLK_CRC_ERROR | \
-				 GEN8_PIPE_CURSOR_FAULT | \
-				 GEN8_PIPE_SPRITE_FAULT | \
-				 GEN8_PIPE_PRIMARY_FAULT)
+#define GEN8_DE_PIPE_IRQ_FAULT_ERRORS \
+	(GEN8_PIPE_CURSOR_FAULT | \
+	 GEN8_PIPE_SPRITE_FAULT | \
+	 GEN8_PIPE_PRIMARY_FAULT)
 
 #define GEN8_DE_PORT_ISR 0x44440
 #define GEN8_DE_PORT_IMR 0x44444
-- 
1.8.4.2

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  reply	other threads:[~2013-11-08  6:09 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-11-08  5:40 [PATCH 01/21] drm/i915: Optimize pipe irq handling on bdw Ben Widawsky
2013-11-08  5:40 ` Ben Widawsky [this message]
2013-11-08  5:40 ` [PATCH 03/21] drm/i915: Wire up port A aux channel Ben Widawsky
2013-11-08  5:40 ` [PATCH 04/21] drm/i915: Wire up PCH interrupts for bdw Ben Widawsky
2013-11-08  5:40 ` [PATCH 05/21] drm/i915: Wire up pipe CRC support " Ben Widawsky
2013-11-08  5:40 ` [PATCH 06/21] drm/i915: Optimize gen8_enable|disable_vblank functions Ben Widawsky
2013-11-08  5:40 ` [PATCH 07/21] drm/i915: Wire up cpu fifo underrun reporting support for bdw Ben Widawsky
2013-11-08  5:40 ` [PATCH 08/21] drm/i915: Mask the vblank interrupt on bdw by default Ben Widawsky
2013-11-08  5:40 ` [PATCH 09/21] drm/i915/bdw: Take render error interrupt out of the mask Ben Widawsky
2013-11-08  5:40 ` [PATCH 10/21] drm/i915/bdw: Add missed break for forcewake mmio Ben Widawsky
2013-11-08  5:40 ` [PATCH 11/21] drm/i915/bdw: Add BDW PCH check first Ben Widawsky
2013-11-08  5:40 ` [PATCH 12/21] drm/i915/bdw: posting read the full 64b PTE Ben Widawsky
2013-11-08  5:40 ` [PATCH 13/21] drm/i915/bdw: Initialize BDW forcewake vfuncs Ben Widawsky
2013-11-08  5:40 ` [PATCH 14/21] drm/i915: Abstract backlight registers a bit Ben Widawsky
2013-11-08 19:04   ` Daniel Vetter
2013-11-11  9:41     ` Jani Nikula
2013-11-08  5:40 ` [PATCH 15/21] drm/i915/bdw: GEN8 backlight support Ben Widawsky
2013-11-08  5:40 ` [PATCH 16/21] drm/i915/bdw: Remove semaphore disabled DRM_INFO Ben Widawsky
2013-11-08  5:40 ` [PATCH 17/21] drm/i915/bdw: Do gen6 style reset for gen8 Ben Widawsky
2013-11-08  5:40 ` [PATCH 18/21] drm/i915/bdw: Free correct number of ppgtt pages Ben Widawsky
2013-11-08  5:40 ` [PATCH 19/21] drm/i915: Never allow VGA on LPT LP PCH Ben Widawsky
2013-11-08 13:37   ` Paulo Zanoni
2013-11-08 18:42   ` Ben Widawsky
2013-11-08  5:40 ` [PATCH 20/21] drm/i915/bdw: Add comment about gen8 HWS PGA Ben Widawsky
2013-11-08  5:40 ` [PATCH 21/21] drm/i915/bdw: Limit GTT to 2GB Ben Widawsky
2013-11-11 22:58   ` Daniel Vetter

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