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From: Ben Widawsky <benjamin.widawsky@intel.com>
To: Intel GFX <intel-gfx@lists.freedesktop.org>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Subject: [PATCH 06/21] drm/i915: Optimize gen8_enable|disable_vblank functions
Date: Thu,  7 Nov 2013 21:40:36 -0800	[thread overview]
Message-ID: <1383889251-498-6-git-send-email-benjamin.widawsky@intel.com> (raw)
In-Reply-To: <1383889251-498-1-git-send-email-benjamin.widawsky@intel.com>

From: Daniel Vetter <daniel.vetter@ffwll.ch>

Let's cache the IMR value like on other platforms. This is needed to
implement the underrun reporting since then we'll have two places that
change the same register at runtime.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/gpu/drm/i915/i915_irq.c | 18 ++++++------------
 1 file changed, 6 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index a06de99..9ea0df2 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2203,17 +2203,14 @@ static int gen8_enable_vblank(struct drm_device *dev, int pipe)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	unsigned long irqflags;
-	uint32_t imr;
 
 	if (!i915_pipe_enabled(dev, pipe))
 		return -EINVAL;
 
 	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
-	imr = I915_READ(GEN8_DE_PIPE_IMR(pipe));
-	if ((imr & GEN8_PIPE_VBLANK) == 1) {
-		I915_WRITE(GEN8_DE_PIPE_IMR(pipe), imr & ~GEN8_PIPE_VBLANK);
-		POSTING_READ(GEN8_DE_PIPE_IMR(pipe));
-	}
+	dev_priv->de_irq_mask[pipe] &= ~GEN8_PIPE_VBLANK;
+	I915_WRITE(GEN8_DE_PIPE_IMR(pipe), dev_priv->de_irq_mask[pipe]);
+	POSTING_READ(GEN8_DE_PIPE_IMR(pipe));
 	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
 	return 0;
 }
@@ -2270,17 +2267,14 @@ static void gen8_disable_vblank(struct drm_device *dev, int pipe)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	unsigned long irqflags;
-	uint32_t imr;
 
 	if (!i915_pipe_enabled(dev, pipe))
 		return;
 
 	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
-	imr = I915_READ(GEN8_DE_PIPE_IMR(pipe));
-	if ((imr & GEN8_PIPE_VBLANK) == 0) {
-		I915_WRITE(GEN8_DE_PIPE_IMR(pipe), imr | GEN8_PIPE_VBLANK);
-		POSTING_READ(GEN8_DE_PIPE_IMR(pipe));
-	}
+	dev_priv->de_irq_mask[pipe] |= GEN8_PIPE_VBLANK;
+	I915_WRITE(GEN8_DE_PIPE_IMR(pipe), dev_priv->de_irq_mask[pipe]);
+	POSTING_READ(GEN8_DE_PIPE_IMR(pipe));
 	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
 }
 
-- 
1.8.4.2

  parent reply	other threads:[~2013-11-08  6:09 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-11-08  5:40 [PATCH 01/21] drm/i915: Optimize pipe irq handling on bdw Ben Widawsky
2013-11-08  5:40 ` [PATCH 02/21] drm/i915: Fix up the bdw pipe interrupt enable lists Ben Widawsky
2013-11-08  5:40 ` [PATCH 03/21] drm/i915: Wire up port A aux channel Ben Widawsky
2013-11-08  5:40 ` [PATCH 04/21] drm/i915: Wire up PCH interrupts for bdw Ben Widawsky
2013-11-08  5:40 ` [PATCH 05/21] drm/i915: Wire up pipe CRC support " Ben Widawsky
2013-11-08  5:40 ` Ben Widawsky [this message]
2013-11-08  5:40 ` [PATCH 07/21] drm/i915: Wire up cpu fifo underrun reporting " Ben Widawsky
2013-11-08  5:40 ` [PATCH 08/21] drm/i915: Mask the vblank interrupt on bdw by default Ben Widawsky
2013-11-08  5:40 ` [PATCH 09/21] drm/i915/bdw: Take render error interrupt out of the mask Ben Widawsky
2013-11-08  5:40 ` [PATCH 10/21] drm/i915/bdw: Add missed break for forcewake mmio Ben Widawsky
2013-11-08  5:40 ` [PATCH 11/21] drm/i915/bdw: Add BDW PCH check first Ben Widawsky
2013-11-08  5:40 ` [PATCH 12/21] drm/i915/bdw: posting read the full 64b PTE Ben Widawsky
2013-11-08  5:40 ` [PATCH 13/21] drm/i915/bdw: Initialize BDW forcewake vfuncs Ben Widawsky
2013-11-08  5:40 ` [PATCH 14/21] drm/i915: Abstract backlight registers a bit Ben Widawsky
2013-11-08 19:04   ` Daniel Vetter
2013-11-11  9:41     ` Jani Nikula
2013-11-08  5:40 ` [PATCH 15/21] drm/i915/bdw: GEN8 backlight support Ben Widawsky
2013-11-08  5:40 ` [PATCH 16/21] drm/i915/bdw: Remove semaphore disabled DRM_INFO Ben Widawsky
2013-11-08  5:40 ` [PATCH 17/21] drm/i915/bdw: Do gen6 style reset for gen8 Ben Widawsky
2013-11-08  5:40 ` [PATCH 18/21] drm/i915/bdw: Free correct number of ppgtt pages Ben Widawsky
2013-11-08  5:40 ` [PATCH 19/21] drm/i915: Never allow VGA on LPT LP PCH Ben Widawsky
2013-11-08 13:37   ` Paulo Zanoni
2013-11-08 18:42   ` Ben Widawsky
2013-11-08  5:40 ` [PATCH 20/21] drm/i915/bdw: Add comment about gen8 HWS PGA Ben Widawsky
2013-11-08  5:40 ` [PATCH 21/21] drm/i915/bdw: Limit GTT to 2GB Ben Widawsky
2013-11-11 22:58   ` Daniel Vetter

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