From: Ben Widawsky <benjamin.widawsky@intel.com>
To: Intel GFX <intel-gfx@lists.freedesktop.org>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Subject: [PATCH 03/21] drm/i915: Wire up port A aux channel
Date: Thu, 7 Nov 2013 21:40:33 -0800 [thread overview]
Message-ID: <1383889251-498-3-git-send-email-benjamin.widawsky@intel.com> (raw)
In-Reply-To: <1383889251-498-1-git-send-email-benjamin.widawsky@intel.com>
From: Daniel Vetter <daniel.vetter@ffwll.ch>
Useful for dp aux to work better. Also stop enabling the port A
hotplug event - eDP panels are expected to fire that interupt and
we're not really ready to deal with them. This is consistent with how
we handle port A on ilk-hsw.
The more important bit is that we must delay the enabling of hotplug
interrupts until all the encoders are fully set up. But we need irq
support earlier than that, hence hotplug interrupts can only be
enabled in the ->hpd_irq_setup callback.
v2: Drop the _HOTPLUG, it isn't (Ville).
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
drivers/gpu/drm/i915/i915_irq.c | 19 +++++++++++++++++--
drivers/gpu/drm/i915/i915_reg.h | 3 ++-
2 files changed, 19 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index e1bfc85..9304ce3 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1778,6 +1778,21 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg)
}
}
+ if (master_ctl & GEN8_DE_PORT_IRQ) {
+ tmp = I915_READ(GEN8_DE_PORT_IIR);
+ if (tmp & GEN8_AUX_CHANNEL_A)
+ dp_aux_irq_handler(dev);
+ else if (tmp)
+ DRM_ERROR("Unexpected DE Port interrupt\n");
+ else
+ DRM_ERROR("The master control interrupt lied (DE PORT)!\n");
+
+ if (tmp) {
+ I915_WRITE(GEN8_DE_PORT_IIR, tmp);
+ ret = IRQ_HANDLED;
+ }
+ }
+
for_each_pipe(pipe) {
uint32_t pipe_iir;
@@ -2883,8 +2898,8 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
}
POSTING_READ(GEN8_DE_PIPE_ISR(0));
- I915_WRITE(GEN8_DE_PORT_IMR, ~_PORT_DP_A_HOTPLUG);
- I915_WRITE(GEN8_DE_PORT_IER, _PORT_DP_A_HOTPLUG);
+ I915_WRITE(GEN8_DE_PORT_IMR, ~GEN8_AUX_CHANNEL_A);
+ I915_WRITE(GEN8_DE_PORT_IER, GEN8_AUX_CHANNEL_A);
POSTING_READ(GEN8_DE_PORT_IER);
}
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 9e75883..fe8cb4c 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4073,7 +4073,8 @@
#define GEN8_DE_PORT_IMR 0x44444
#define GEN8_DE_PORT_IIR 0x44448
#define GEN8_DE_PORT_IER 0x4444c
-#define _PORT_DP_A_HOTPLUG (1 << 3)
+#define GEN8_PORT_DP_A_HOTPLUG (1 << 3)
+#define GEN8_AUX_CHANNEL_A (1 << 0)
#define GEN8_DE_MISC_ISR 0x44460
#define GEN8_DE_MISC_IMR 0x44464
--
1.8.4.2
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next prev parent reply other threads:[~2013-11-08 6:09 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-11-08 5:40 [PATCH 01/21] drm/i915: Optimize pipe irq handling on bdw Ben Widawsky
2013-11-08 5:40 ` [PATCH 02/21] drm/i915: Fix up the bdw pipe interrupt enable lists Ben Widawsky
2013-11-08 5:40 ` Ben Widawsky [this message]
2013-11-08 5:40 ` [PATCH 04/21] drm/i915: Wire up PCH interrupts for bdw Ben Widawsky
2013-11-08 5:40 ` [PATCH 05/21] drm/i915: Wire up pipe CRC support " Ben Widawsky
2013-11-08 5:40 ` [PATCH 06/21] drm/i915: Optimize gen8_enable|disable_vblank functions Ben Widawsky
2013-11-08 5:40 ` [PATCH 07/21] drm/i915: Wire up cpu fifo underrun reporting support for bdw Ben Widawsky
2013-11-08 5:40 ` [PATCH 08/21] drm/i915: Mask the vblank interrupt on bdw by default Ben Widawsky
2013-11-08 5:40 ` [PATCH 09/21] drm/i915/bdw: Take render error interrupt out of the mask Ben Widawsky
2013-11-08 5:40 ` [PATCH 10/21] drm/i915/bdw: Add missed break for forcewake mmio Ben Widawsky
2013-11-08 5:40 ` [PATCH 11/21] drm/i915/bdw: Add BDW PCH check first Ben Widawsky
2013-11-08 5:40 ` [PATCH 12/21] drm/i915/bdw: posting read the full 64b PTE Ben Widawsky
2013-11-08 5:40 ` [PATCH 13/21] drm/i915/bdw: Initialize BDW forcewake vfuncs Ben Widawsky
2013-11-08 5:40 ` [PATCH 14/21] drm/i915: Abstract backlight registers a bit Ben Widawsky
2013-11-08 19:04 ` Daniel Vetter
2013-11-11 9:41 ` Jani Nikula
2013-11-08 5:40 ` [PATCH 15/21] drm/i915/bdw: GEN8 backlight support Ben Widawsky
2013-11-08 5:40 ` [PATCH 16/21] drm/i915/bdw: Remove semaphore disabled DRM_INFO Ben Widawsky
2013-11-08 5:40 ` [PATCH 17/21] drm/i915/bdw: Do gen6 style reset for gen8 Ben Widawsky
2013-11-08 5:40 ` [PATCH 18/21] drm/i915/bdw: Free correct number of ppgtt pages Ben Widawsky
2013-11-08 5:40 ` [PATCH 19/21] drm/i915: Never allow VGA on LPT LP PCH Ben Widawsky
2013-11-08 13:37 ` Paulo Zanoni
2013-11-08 18:42 ` Ben Widawsky
2013-11-08 5:40 ` [PATCH 20/21] drm/i915/bdw: Add comment about gen8 HWS PGA Ben Widawsky
2013-11-08 5:40 ` [PATCH 21/21] drm/i915/bdw: Limit GTT to 2GB Ben Widawsky
2013-11-11 22:58 ` Daniel Vetter
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