From: Ben Widawsky <benjamin.widawsky@intel.com>
To: Intel GFX <intel-gfx@lists.freedesktop.org>
Cc: Ben Widawsky <ben@bwidawsk.net>,
Ben Widawsky <benjamin.widawsky@intel.com>
Subject: [PATCH 20/21] drm/i915/bdw: Add comment about gen8 HWS PGA
Date: Thu, 7 Nov 2013 21:40:50 -0800 [thread overview]
Message-ID: <1383889251-498-20-git-send-email-benjamin.widawsky@intel.com> (raw)
In-Reply-To: <1383889251-498-1-git-send-email-benjamin.widawsky@intel.com>
This confused me some many times that I think it is appropriate to add a
small comment to instruct the reader of the code that it is indeed doing
what it is supposed to do.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index b620337..c2f09d45 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -965,6 +965,7 @@ void intel_ring_setup_status_page(struct intel_ring_buffer *ring)
} else if (IS_GEN6(ring->dev)) {
mmio = RING_HWS_PGA_GEN6(ring->mmio_base);
} else {
+ /* XXX: gen8 returns to sanity */
mmio = RING_HWS_PGA(ring->mmio_base);
}
--
1.8.4.2
next prev parent reply other threads:[~2013-11-08 8:17 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-11-08 5:40 [PATCH 01/21] drm/i915: Optimize pipe irq handling on bdw Ben Widawsky
2013-11-08 5:40 ` [PATCH 02/21] drm/i915: Fix up the bdw pipe interrupt enable lists Ben Widawsky
2013-11-08 5:40 ` [PATCH 03/21] drm/i915: Wire up port A aux channel Ben Widawsky
2013-11-08 5:40 ` [PATCH 04/21] drm/i915: Wire up PCH interrupts for bdw Ben Widawsky
2013-11-08 5:40 ` [PATCH 05/21] drm/i915: Wire up pipe CRC support " Ben Widawsky
2013-11-08 5:40 ` [PATCH 06/21] drm/i915: Optimize gen8_enable|disable_vblank functions Ben Widawsky
2013-11-08 5:40 ` [PATCH 07/21] drm/i915: Wire up cpu fifo underrun reporting support for bdw Ben Widawsky
2013-11-08 5:40 ` [PATCH 08/21] drm/i915: Mask the vblank interrupt on bdw by default Ben Widawsky
2013-11-08 5:40 ` [PATCH 09/21] drm/i915/bdw: Take render error interrupt out of the mask Ben Widawsky
2013-11-08 5:40 ` [PATCH 10/21] drm/i915/bdw: Add missed break for forcewake mmio Ben Widawsky
2013-11-08 5:40 ` [PATCH 11/21] drm/i915/bdw: Add BDW PCH check first Ben Widawsky
2013-11-08 5:40 ` [PATCH 12/21] drm/i915/bdw: posting read the full 64b PTE Ben Widawsky
2013-11-08 5:40 ` [PATCH 13/21] drm/i915/bdw: Initialize BDW forcewake vfuncs Ben Widawsky
2013-11-08 5:40 ` [PATCH 14/21] drm/i915: Abstract backlight registers a bit Ben Widawsky
2013-11-08 19:04 ` Daniel Vetter
2013-11-11 9:41 ` Jani Nikula
2013-11-08 5:40 ` [PATCH 15/21] drm/i915/bdw: GEN8 backlight support Ben Widawsky
2013-11-08 5:40 ` [PATCH 16/21] drm/i915/bdw: Remove semaphore disabled DRM_INFO Ben Widawsky
2013-11-08 5:40 ` [PATCH 17/21] drm/i915/bdw: Do gen6 style reset for gen8 Ben Widawsky
2013-11-08 5:40 ` [PATCH 18/21] drm/i915/bdw: Free correct number of ppgtt pages Ben Widawsky
2013-11-08 5:40 ` [PATCH 19/21] drm/i915: Never allow VGA on LPT LP PCH Ben Widawsky
2013-11-08 13:37 ` Paulo Zanoni
2013-11-08 18:42 ` Ben Widawsky
2013-11-08 5:40 ` Ben Widawsky [this message]
2013-11-08 5:40 ` [PATCH 21/21] drm/i915/bdw: Limit GTT to 2GB Ben Widawsky
2013-11-11 22:58 ` Daniel Vetter
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