[PATCH v2 00/26] Add support for GuC-based SLPC

From: tom.orourke@intel.com
To: intel-gfx@lists.freedesktop.org
Cc: paulo.r.zanoni@intel.com, Tom O'Rourke <Tom.O'Rourke@intel.com>
Subject: [PATCH v2 00/26] Add support for GuC-based SLPC
Date: Tue,  8 Mar 2016 16:34:03 -0800	[thread overview]
Message-ID: <1457483669-155235-1-git-send-email-tom.orourke@intel.com> (raw)

From: Tom O'Rourke <Tom.O'Rourke@intel.com>

SLPC (Single Loop Power Controller) is a replacement for
some host-based power management features.  The SLPC
implemenation runs in firmware on GuC.

This series has been tested with SKL guc firmware
version 6.1 and BXT guc version 5.1.

The graphics power management features in SLPC in those
versions are called GTPERF, BALANCER, and DCC.

GTPERF is a combination of DFPS (Dynamic FPS) and Turbo.
DFPS adjusts requested graphics frequency to maintain
target framerate.  Turbo adjusts requested graphics
frequency to maintain target GT busyness; this includes
an adaptive boost turbo method.

BALANCER adjusts balance between power budgets for IA
and GT in power limited scenarios.  BALANCER is only
active when all display pipes are in "game" mode.

DCC (Duty Cycle Control) adjusts requested graphics
frequency and stalls guc-scheduler to maintain actual
graphics frequency in efficient range.

This series is a followup to the request for comments
"[Intel-gfx] [RFC 00/22] Add support for GuC-based SLPC"
https://lists.freedesktop.org/archives/intel-gfx/2016-January/085830.html

Thank you to Paulo for his valuable review of the RFC
series.  Thank you also to Ville, Daniel, Jesse, and
Martin for their helpful comments.

We (Tom and Sagar) have attempted to incorporate these
suggestions in this series.  We also adapted to a new
SLPC interface version that reflects an internal
reorganization within the firmware.  The biggest change
refactored the tasks.  The DFPS and Turbo tasks were
merged into the GTPERF task.  The IBC (Intelligent Bias
Control) feature that had been grouped with Turbo was
split out into the BALANCER task.

The requested frequency can be fixed by setting min and
max to the same value.  As before, the actual frequency
is controlled by the punit.

In addition to the debugfs files to enable/disable each
task, there is a module parameter to completely disable
SLPC. By default, SLPC will be disabled by module parameter.
Benchmarks showing power/performance results are expected
before enabling SLPC by default.

We anticipate DFPS and BALANCER will not be effective on
Linux systems due to difficulty determining frame rate
with a compositor and display not in "game" mode.
GTPERF (Turbo) and DCC should be effective.

Patches 22/26 to 26/26 are included for convenience in
testing this series and are not intended to be merged at
this time.  SLPC requires guc submission and should be
disabled if guc submission is not enabled.

VIZ-6773, VIZ-6889

Dave Gordon (1):
  DO NOT MERGE: drm/i915: Enable GuC submission, where supported

Peter Antoine (1):
  DO NOT MERGE: drm/i915: resize the GuC WOPCM for rc6

Sagar Arun Kamble (3):
  drm/i915/slpc: Add Display mode event related data structures
  drm/i915/slpc: Notification of Display mode change
  drm/i915/slpc: Notification of Refresh Rate change

Tom O'Rourke (21):
  drm/i915/slpc: Expose guc functions for use with SLPC
  drm/i915/slpc: Add has_slpc capability flag
  drm/i915/slpc: Add slpc_version_check
  drm/i915/slpc: Add enable_slpc module parameter
  drm/i915/slpc: Use intel_slpc_* functions if supported
  drm/i915/slpc: Enable SLPC in guc if supported
  drm/i915/slpc: If using SLPC, do not set frequency
  drm/i915/slpc: Allocate/Release/Initialize SLPC shared data
  drm/i915/slpc: Setup rps frequency values during SLPC init
  drm/i915/slpc: Update current requested frequency
  drm/i915/slpc: Send reset event
  drm/i915/slpc: Send shutdown event
  drm/i915/slpc: Add slpc_status enum values
  drm/i915/slpc: Add parameter unset/set/get functions
  drm/i915/slpc: Add slpc support for max/min freq
  drm/i915/slpc: Add enable/disable debugfs for slpc
  drm/i915/slpc: Add broxton support
  drm/i915/slpc: Add i915_slpc_info to debugfs
  DO NOT MERGE: drm/i915: Change SKL guc version wanted to 6.0
  DO NOT MERGE: drm/i915/bxt: Add Broxton to guc loader
  DO NOT MERGE: drm/i915: Enable SLPC, where supported

 drivers/gpu/drm/i915/Makefile              |   5 +-
 drivers/gpu/drm/i915/i915_debugfs.c        | 456 +++++++++++++++++++++++++++
 drivers/gpu/drm/i915/i915_drv.c            |   2 +
 drivers/gpu/drm/i915/i915_drv.h            |   2 +
 drivers/gpu/drm/i915/i915_guc_reg.h        |   3 +-
 drivers/gpu/drm/i915/i915_guc_submission.c |   6 +-
 drivers/gpu/drm/i915/i915_params.c         |  10 +-
 drivers/gpu/drm/i915/i915_params.h         |   1 +
 drivers/gpu/drm/i915/i915_sysfs.c          |  20 ++
 drivers/gpu/drm/i915/intel_display.c       |   2 +
 drivers/gpu/drm/i915/intel_dp.c            |   2 +
 drivers/gpu/drm/i915/intel_drv.h           |  12 +
 drivers/gpu/drm/i915/intel_guc.h           |  13 +
 drivers/gpu/drm/i915/intel_guc_loader.c    |  53 +++-
 drivers/gpu/drm/i915/intel_pm.c            |  41 ++-
 drivers/gpu/drm/i915/intel_slpc.c          | 484 +++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_slpc.h          | 209 +++++++++++++
 17 files changed, 1299 insertions(+), 22 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/intel_slpc.c
 create mode 100644 drivers/gpu/drm/i915/intel_slpc.h

-- 
1.9.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx