From: tom.orourke@intel.com
To: intel-gfx@lists.freedesktop.org
Cc: paulo.r.zanoni@intel.com, Tom O'Rourke <Tom.O'Rourke@intel.com>
Subject: [PATCH 19/26] drm/i915/slpc: Add enable/disable debugfs for slpc
Date: Tue, 8 Mar 2016 16:34:22 -0800 [thread overview]
Message-ID: <1457483669-155235-20-git-send-email-tom.orourke@intel.com> (raw)
In-Reply-To: <1457483669-155235-1-git-send-email-tom.orourke@intel.com>
From: Tom O'Rourke <Tom.O'Rourke@intel.com>
Adds debugfs hooks for each slpc task.
The enable/disable debugfs files are
i915_slpc_gtperf, i915_slpc_balancer, and i915_slpc_dcc.
Each of these can take the values:
"default", "enabled", or "disabled"
v2: update for SLPC v2015.2.4
dfps and turbo merged and renamed "gtperf"
ibc split out and renamed "balancer"
Signed-off-by: Tom O'Rourke <Tom.O'Rourke@intel.com>
---
drivers/gpu/drm/i915/i915_debugfs.c | 250 ++++++++++++++++++++++++++++++++++++
1 file changed, 250 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 0cc0e70..54e40f1 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1124,6 +1124,253 @@ DEFINE_SIMPLE_ATTRIBUTE(i915_next_seqno_fops,
i915_next_seqno_get, i915_next_seqno_set,
"0x%llx\n");
+static int slpc_enable_disable_get(struct drm_device *dev, u64 *val,
+ enum slpc_param_id enable_id,
+ enum slpc_param_id disable_id)
+{
+ int override_enable, override_disable;
+ u32 value_enable, value_disable;
+ int ret = 0;
+
+ if (!intel_slpc_active(dev)) {
+ ret = -ENODEV;
+ } else if (val) {
+ intel_slpc_get_param(dev, enable_id, &override_enable,
+ &value_enable);
+ intel_slpc_get_param(dev, disable_id, &override_disable,
+ &value_disable);
+
+ /* set the output value:
+ * 0: default
+ * 1: enabled
+ * 2: disabled
+ * 3: unknown (should not happen)
+ */
+ if (override_disable && (1 == value_disable))
+ *val = 2;
+ else if (override_enable && (1 == value_enable))
+ *val = 1;
+ else if (!override_enable && !override_disable)
+ *val = 0;
+ else
+ *val = 3;
+
+ } else {
+ ret = -EINVAL;
+ }
+
+ return ret;
+}
+
+static int slpc_enable_disable_set(struct drm_device *dev, u64 val,
+ enum slpc_param_id enable_id,
+ enum slpc_param_id disable_id)
+{
+ int ret = 0;
+
+ if (!intel_slpc_active(dev)) {
+ ret = -ENODEV;
+ } else if (0 == val) {
+ /* set default */
+ intel_slpc_unset_param(dev, enable_id);
+ intel_slpc_unset_param(dev, disable_id);
+ } else if (1 == val) {
+ /* set enable */
+ intel_slpc_set_param(dev, enable_id, 1);
+ intel_slpc_unset_param(dev, disable_id);
+ } else if (2 == val) {
+ /* set disable */
+ intel_slpc_set_param(dev, disable_id, 1);
+ intel_slpc_unset_param(dev, enable_id);
+ } else {
+ ret = -EINVAL;
+ }
+
+ return ret;
+}
+
+static void slpc_param_show(struct seq_file *m, enum slpc_param_id enable_id,
+ enum slpc_param_id disable_id)
+{
+ struct drm_device *dev = m->private;
+ const char *status;
+ u64 val;
+ int ret;
+
+ ret = slpc_enable_disable_get(dev, &val, enable_id, disable_id);
+
+ if (ret) {
+ seq_printf(m, "error %d\n", ret);
+ } else {
+ switch (val) {
+ case 0:
+ status = "default\n";
+ break;
+
+ case 1:
+ status = "enabled\n";
+ break;
+
+ case 2:
+ status = "disabled\n";
+ break;
+
+ default:
+ status = "unknown\n";
+ break;
+ }
+
+ seq_puts(m, status);
+ }
+}
+
+static int slpc_param_write(struct seq_file *m, const char __user *ubuf,
+ size_t len, enum slpc_param_id enable_id,
+ enum slpc_param_id disable_id)
+{
+ struct drm_device *dev = m->private;
+ u64 val;
+ int ret = 0;
+ char buf[10];
+
+ if (len >= sizeof(buf))
+ ret = -EINVAL;
+ else if (copy_from_user(buf, ubuf, len))
+ ret = -EFAULT;
+ else
+ buf[len] = '\0';
+
+ if (!ret) {
+ if (!strncmp(buf, "default", 7))
+ val = 0;
+ else if (!strncmp(buf, "enabled", 7))
+ val = 1;
+ else if (!strncmp(buf, "disabled", 8))
+ val = 2;
+ else
+ ret = -EINVAL;
+ }
+
+ if (!ret)
+ ret = slpc_enable_disable_set(dev, val, enable_id, disable_id);
+
+ return ret;
+}
+
+static int slpc_gtperf_show(struct seq_file *m, void *data)
+{
+ slpc_param_show(m, SLPC_PARAM_TASK_ENABLE_GTPERF,
+ SLPC_PARAM_TASK_DISABLE_GTPERF);
+
+ return 0;
+}
+
+static int slpc_gtperf_open(struct inode *inode, struct file *file)
+{
+ struct drm_connector *dev = inode->i_private;
+
+ return single_open(file, slpc_gtperf_show, dev);
+}
+
+static ssize_t slpc_gtperf_write(struct file *file, const char __user *ubuf,
+ size_t len, loff_t *offp)
+{
+ struct seq_file *m = file->private_data;
+ int ret = 0;
+
+ ret = slpc_param_write(m, ubuf, len, SLPC_PARAM_TASK_ENABLE_GTPERF,
+ SLPC_PARAM_TASK_DISABLE_GTPERF);
+ if (ret)
+ return (size_t) ret;
+
+ return len;
+}
+
+static const struct file_operations i915_slpc_gtperf_fops = {
+ .owner = THIS_MODULE,
+ .open = slpc_gtperf_open,
+ .release = single_release,
+ .read = seq_read,
+ .write = slpc_gtperf_write,
+ .llseek = seq_lseek
+};
+
+static int slpc_balancer_show(struct seq_file *m, void *data)
+{
+ slpc_param_show(m, SLPC_PARAM_TASK_ENABLE_BALANCER,
+ SLPC_PARAM_TASK_DISABLE_BALANCER);
+
+ return 0;
+}
+
+static int slpc_balancer_open(struct inode *inode, struct file *file)
+{
+ struct drm_connector *dev = inode->i_private;
+
+ return single_open(file, slpc_balancer_show, dev);
+}
+
+static ssize_t slpc_balancer_write(struct file *file, const char __user *ubuf,
+ size_t len, loff_t *offp)
+{
+ struct seq_file *m = file->private_data;
+ int ret = 0;
+
+ ret = slpc_param_write(m, ubuf, len, SLPC_PARAM_TASK_ENABLE_BALANCER,
+ SLPC_PARAM_TASK_DISABLE_BALANCER);
+ if (ret)
+ return (size_t) ret;
+
+ return len;
+}
+
+static const struct file_operations i915_slpc_balancer_fops = {
+ .owner = THIS_MODULE,
+ .open = slpc_balancer_open,
+ .release = single_release,
+ .read = seq_read,
+ .write = slpc_balancer_write,
+ .llseek = seq_lseek
+};
+
+static int slpc_dcc_show(struct seq_file *m, void *data)
+{
+ slpc_param_show(m, SLPC_PARAM_TASK_ENABLE_DCC,
+ SLPC_PARAM_TASK_DISABLE_DCC);
+
+ return 0;
+}
+
+static int slpc_dcc_open(struct inode *inode, struct file *file)
+{
+ struct drm_connector *dev = inode->i_private;
+
+ return single_open(file, slpc_dcc_show, dev);
+}
+
+static ssize_t slpc_dcc_write(struct file *file, const char __user *ubuf,
+ size_t len, loff_t *offp)
+{
+ struct seq_file *m = file->private_data;
+ int ret = 0;
+
+ ret = slpc_param_write(m, ubuf, len, SLPC_PARAM_TASK_ENABLE_DCC,
+ SLPC_PARAM_TASK_DISABLE_DCC);
+ if (ret)
+ return (size_t) ret;
+
+ return len;
+}
+
+static const struct file_operations i915_slpc_dcc_fops = {
+ .owner = THIS_MODULE,
+ .open = slpc_dcc_open,
+ .release = single_release,
+ .read = seq_read,
+ .write = slpc_dcc_write,
+ .llseek = seq_lseek
+};
+
static int i915_frequency_info(struct seq_file *m, void *unused)
{
struct drm_info_node *node = m->private;
@@ -5421,6 +5668,9 @@ static const struct i915_debugfs_files {
const struct file_operations *fops;
} i915_debugfs_files[] = {
{"i915_wedged", &i915_wedged_fops},
+ {"i915_slpc_gtperf", &i915_slpc_gtperf_fops},
+ {"i915_slpc_balancer", &i915_slpc_balancer_fops},
+ {"i915_slpc_dcc", &i915_slpc_dcc_fops},
{"i915_max_freq", &i915_max_freq_fops},
{"i915_min_freq", &i915_min_freq_fops},
{"i915_cache_sharing", &i915_cache_sharing_fops},
--
1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2016-03-09 0:35 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-09 0:34 [PATCH v2 00/26] Add support for GuC-based SLPC tom.orourke
2016-03-09 0:34 ` [PATCH 01/26] drm/i915/slpc: Expose guc functions for use with SLPC tom.orourke
2016-03-09 0:34 ` [PATCH 02/26] drm/i915/slpc: Add has_slpc capability flag tom.orourke
2016-03-09 0:34 ` [PATCH 03/26] drm/i915/slpc: Add slpc_version_check tom.orourke
2016-03-09 0:34 ` [PATCH 04/26] drm/i915/slpc: Add enable_slpc module parameter tom.orourke
2016-03-09 0:34 ` [PATCH 05/26] drm/i915/slpc: Use intel_slpc_* functions if supported tom.orourke
2016-03-09 0:34 ` [PATCH 06/26] drm/i915/slpc: Enable SLPC in guc " tom.orourke
2016-03-09 0:34 ` [PATCH 07/26] drm/i915/slpc: If using SLPC, do not set frequency tom.orourke
2016-03-09 0:34 ` [PATCH 08/26] drm/i915/slpc: Allocate/Release/Initialize SLPC shared data tom.orourke
2016-03-09 0:34 ` [PATCH 09/26] drm/i915/slpc: Setup rps frequency values during SLPC init tom.orourke
2016-03-09 0:34 ` [PATCH 10/26] drm/i915/slpc: Update current requested frequency tom.orourke
2016-03-09 0:34 ` [PATCH 11/26] drm/i915/slpc: Send reset event tom.orourke
2016-03-09 0:34 ` [PATCH 12/26] drm/i915/slpc: Send shutdown event tom.orourke
2016-03-09 0:34 ` [PATCH 13/26] drm/i915/slpc: Add Display mode event related data structures tom.orourke
2016-03-09 0:34 ` [PATCH 14/26] drm/i915/slpc: Notification of Display mode change tom.orourke
2016-03-09 0:34 ` [PATCH 15/26] drm/i915/slpc: Notification of Refresh Rate change tom.orourke
2016-03-09 0:34 ` [PATCH 16/26] drm/i915/slpc: Add slpc_status enum values tom.orourke
2016-03-09 0:34 ` [PATCH 17/26] drm/i915/slpc: Add parameter unset/set/get functions tom.orourke
2016-03-09 0:34 ` [PATCH 18/26] drm/i915/slpc: Add slpc support for max/min freq tom.orourke
2016-03-09 0:34 ` tom.orourke [this message]
2016-03-09 0:34 ` [PATCH 20/26] drm/i915/slpc: Add broxton support tom.orourke
2016-03-09 0:34 ` [PATCH 21/26] drm/i915/slpc: Add i915_slpc_info to debugfs tom.orourke
2016-03-09 0:34 ` [PATCH 22/26] DO NOT MERGE: drm/i915: Change SKL guc version wanted to 6.0 tom.orourke
2016-03-09 0:34 ` [PATCH 23/26] DO NOT MERGE: drm/i915/bxt: Add Broxton to guc loader tom.orourke
2016-03-09 0:34 ` [PATCH 24/26] DO NOT MERGE: drm/i915: resize the GuC WOPCM for rc6 tom.orourke
2016-03-09 0:34 ` [PATCH 25/26] DO NOT MERGE: drm/i915: Enable GuC submission, where supported tom.orourke
2016-03-09 0:34 ` [PATCH 26/26] DO NOT MERGE: drm/i915: Enable SLPC, " tom.orourke
2016-03-09 8:03 ` ✗ Fi.CI.BAT: failure for Add support for GuC-based SLPC (rev2) Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1457483669-155235-20-git-send-email-tom.orourke@intel.com \
--to=tom.orourke@intel.com \
--cc=Tom.O'Rourke@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=paulo.r.zanoni@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox