From: tom.orourke@intel.com
To: intel-gfx@lists.freedesktop.org
Cc: paulo.r.zanoni@intel.com, Tom O'Rourke <Tom.O'Rourke@intel.com>
Subject: [PATCH 17/26] drm/i915/slpc: Add parameter unset/set/get functions
Date: Tue, 8 Mar 2016 16:34:20 -0800 [thread overview]
Message-ID: <1457483669-155235-18-git-send-email-tom.orourke@intel.com> (raw)
In-Reply-To: <1457483669-155235-1-git-send-email-tom.orourke@intel.com>
From: Tom O'Rourke <Tom.O'Rourke@intel.com>
Add slpc_param_id enum values.
Add events for setting/unsetting parameters.
v2: use host2guc_slpc
update slcp_param_id enum values for SLPC 2015.2.4
return void instead of ignored error code (Paulo)
Signed-off-by: Tom O'Rourke <Tom.O'Rourke@intel.com>
---
drivers/gpu/drm/i915/intel_slpc.c | 104 ++++++++++++++++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_slpc.h | 26 +++++++++-
2 files changed, 129 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_slpc.c b/drivers/gpu/drm/i915/intel_slpc.c
index 524ad63..e7f49db 100644
--- a/drivers/gpu/drm/i915/intel_slpc.c
+++ b/drivers/gpu/drm/i915/intel_slpc.c
@@ -88,6 +88,33 @@ static void host2guc_slpc_display_mode_change(struct drm_device *dev)
host2guc_slpc(dev_priv, data, 7);
}
+static void host2guc_slpc_set_param(struct drm_device *dev,
+ enum slpc_param_id id, u32 value)
+{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+ u32 data[4];
+
+ data[0] = HOST2GUC_ACTION_SLPC_REQUEST;
+ data[1] = SLPC_EVENT(SLPC_EVENT_PARAMETER_SET, 2);
+ data[2] = (u32) id;
+ data[3] = value;
+
+ host2guc_slpc(dev_priv, data, 4);
+}
+
+static void host2guc_slpc_unset_param(struct drm_device *dev,
+ enum slpc_param_id id)
+{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+ u32 data[3];
+
+ data[0] = HOST2GUC_ACTION_SLPC_REQUEST;
+ data[1] = SLPC_EVENT(SLPC_EVENT_PARAMETER_UNSET, 1);
+ data[2] = (u32) id;
+
+ host2guc_slpc(dev_priv, data, 3);
+}
+
static u8 slpc_get_platform_sku(struct drm_i915_gem_object *obj)
{
struct drm_device *dev = obj->base.dev;
@@ -355,3 +382,80 @@ void intel_slpc_update_display_rr_info(struct drm_device *dev, u32 refresh_rate)
host2guc_slpc_display_mode_change(dev);
}
+
+void intel_slpc_unset_param(struct drm_device *dev, enum slpc_param_id id)
+{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+ struct drm_i915_gem_object *obj;
+ struct page *page;
+ struct slpc_shared_data *data = NULL;
+
+ obj = dev_priv->guc.slpc.shared_data_obj;
+ if (obj) {
+ page = i915_gem_object_get_page(obj, 0);
+ if (page)
+ data = kmap_atomic(page);
+ }
+
+ if (data) {
+ data->override_parameters_set_bits[id >> 5]
+ &= (~(1 << (id % 32)));
+ data->override_parameters_values[id] = 0;
+ kunmap_atomic(data);
+
+ host2guc_slpc_unset_param(dev, id);
+ }
+}
+
+void intel_slpc_set_param(struct drm_device *dev, enum slpc_param_id id,
+ u32 value)
+{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+ struct drm_i915_gem_object *obj;
+ struct page *page;
+ struct slpc_shared_data *data = NULL;
+
+ obj = dev_priv->guc.slpc.shared_data_obj;
+ if (obj) {
+ page = i915_gem_object_get_page(obj, 0);
+ if (page)
+ data = kmap_atomic(page);
+ }
+
+ if (data) {
+ data->override_parameters_set_bits[id >> 5]
+ |= (1 << (id % 32));
+ data->override_parameters_values[id] = value;
+ kunmap_atomic(data);
+
+ host2guc_slpc_set_param(dev, id, value);
+ }
+}
+
+void intel_slpc_get_param(struct drm_device *dev, enum slpc_param_id id,
+ int *overriding, u32 *value)
+{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+ struct drm_i915_gem_object *obj;
+ struct page *page;
+ struct slpc_shared_data *data = NULL;
+ u32 bits;
+
+ obj = dev_priv->guc.slpc.shared_data_obj;
+ if (obj) {
+ page = i915_gem_object_get_page(obj, 0);
+ if (page)
+ data = kmap_atomic(page);
+ }
+
+ if (data) {
+ if (overriding) {
+ bits = data->override_parameters_set_bits[id >> 5];
+ *overriding = (0 != (bits & (1 << (id % 32))));
+ }
+ if (value)
+ *value = data->override_parameters_values[id];
+
+ kunmap_atomic(data);
+ }
+}
diff --git a/drivers/gpu/drm/i915/intel_slpc.h b/drivers/gpu/drm/i915/intel_slpc.h
index de2df0c..b7ad440 100644
--- a/drivers/gpu/drm/i915/intel_slpc.h
+++ b/drivers/gpu/drm/i915/intel_slpc.h
@@ -69,6 +69,26 @@ enum slpc_event_id {
#define SLPC_EVENT(id, argc) ((u32) (id) << 8 | (argc))
#define SLPC_EVENT_STATUS_MASK 0xFF
+enum slpc_param_id {
+ SLPC_PARAM_TASK_ENABLE_GTPERF = 0,
+ SLPC_PARAM_TASK_DISABLE_GTPERF = 1,
+ SLPC_PARAM_TASK_ENABLE_BALANCER = 2,
+ SLPC_PARAM_TASK_DISABLE_BALANCER = 3,
+ SLPC_PARAM_TASK_ENABLE_DCC = 4,
+ SLPC_PARAM_TASK_DISABLE_DCC = 5,
+ SLPC_PARAM_GLOBAL_MIN_GT_UNSLICE_FREQ_MHZ = 6,
+ SLPC_PARAM_GLOBAL_MAX_GT_UNSLICE_FREQ_MHZ = 7,
+ SLPC_PARAM_GLOBAL_MIN_GT_SLICE_FREQ_MHZ = 8,
+ SLPC_PARAM_GLOBAL_MAX_GT_SLICE_FREQ_MHZ = 9,
+ SLPC_PARAM_DFPS_THRESHOLD_MAX_FPS = 10,
+ SLPC_PARAM_GLOBAL_DISABLE_GT_FREQ_MANAGEMENT = 11,
+ SLPC_PARAM_DFPS_DISABLE_FRAMERATE_STALLING = 12,
+ SLPC_PARAM_GLOBAL_DISABLE_RC6_MODE_CHANGE = 13,
+ SLPC_PARAM_GLOBAL_OC_UNSLICE_FREQ_MHZ = 14,
+ SLPC_PARAM_GLOBAL_OC_SLICE_FREQ_MHZ = 15,
+ SLPC_PARAM_GLOBAL_DISABE_IA_GT_BALANCING = 16,
+};
+
enum slpc_global_state {
SLPC_GLOBAL_STATE_NOT_RUNNING = 0,
SLPC_GLOBAL_STATE_INITIALIZING = 1,
@@ -180,5 +200,9 @@ void intel_slpc_update_display_mode_info(struct drm_device *dev);
void intel_slpc_update_atomic_commit_info(struct drm_device *dev,
struct drm_atomic_state *state);
void intel_slpc_update_display_rr_info(struct drm_device *dev, u32 refresh_rate);
-
+void intel_slpc_unset_param(struct drm_device *dev, enum slpc_param_id id);
+void intel_slpc_set_param(struct drm_device *dev, enum slpc_param_id id,
+ u32 value);
+void intel_slpc_get_param(struct drm_device *dev, enum slpc_param_id id,
+ int *overriding, u32 *value);
#endif
--
1.9.1
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next prev parent reply other threads:[~2016-03-09 0:35 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-09 0:34 [PATCH v2 00/26] Add support for GuC-based SLPC tom.orourke
2016-03-09 0:34 ` [PATCH 01/26] drm/i915/slpc: Expose guc functions for use with SLPC tom.orourke
2016-03-09 0:34 ` [PATCH 02/26] drm/i915/slpc: Add has_slpc capability flag tom.orourke
2016-03-09 0:34 ` [PATCH 03/26] drm/i915/slpc: Add slpc_version_check tom.orourke
2016-03-09 0:34 ` [PATCH 04/26] drm/i915/slpc: Add enable_slpc module parameter tom.orourke
2016-03-09 0:34 ` [PATCH 05/26] drm/i915/slpc: Use intel_slpc_* functions if supported tom.orourke
2016-03-09 0:34 ` [PATCH 06/26] drm/i915/slpc: Enable SLPC in guc " tom.orourke
2016-03-09 0:34 ` [PATCH 07/26] drm/i915/slpc: If using SLPC, do not set frequency tom.orourke
2016-03-09 0:34 ` [PATCH 08/26] drm/i915/slpc: Allocate/Release/Initialize SLPC shared data tom.orourke
2016-03-09 0:34 ` [PATCH 09/26] drm/i915/slpc: Setup rps frequency values during SLPC init tom.orourke
2016-03-09 0:34 ` [PATCH 10/26] drm/i915/slpc: Update current requested frequency tom.orourke
2016-03-09 0:34 ` [PATCH 11/26] drm/i915/slpc: Send reset event tom.orourke
2016-03-09 0:34 ` [PATCH 12/26] drm/i915/slpc: Send shutdown event tom.orourke
2016-03-09 0:34 ` [PATCH 13/26] drm/i915/slpc: Add Display mode event related data structures tom.orourke
2016-03-09 0:34 ` [PATCH 14/26] drm/i915/slpc: Notification of Display mode change tom.orourke
2016-03-09 0:34 ` [PATCH 15/26] drm/i915/slpc: Notification of Refresh Rate change tom.orourke
2016-03-09 0:34 ` [PATCH 16/26] drm/i915/slpc: Add slpc_status enum values tom.orourke
2016-03-09 0:34 ` tom.orourke [this message]
2016-03-09 0:34 ` [PATCH 18/26] drm/i915/slpc: Add slpc support for max/min freq tom.orourke
2016-03-09 0:34 ` [PATCH 19/26] drm/i915/slpc: Add enable/disable debugfs for slpc tom.orourke
2016-03-09 0:34 ` [PATCH 20/26] drm/i915/slpc: Add broxton support tom.orourke
2016-03-09 0:34 ` [PATCH 21/26] drm/i915/slpc: Add i915_slpc_info to debugfs tom.orourke
2016-03-09 0:34 ` [PATCH 22/26] DO NOT MERGE: drm/i915: Change SKL guc version wanted to 6.0 tom.orourke
2016-03-09 0:34 ` [PATCH 23/26] DO NOT MERGE: drm/i915/bxt: Add Broxton to guc loader tom.orourke
2016-03-09 0:34 ` [PATCH 24/26] DO NOT MERGE: drm/i915: resize the GuC WOPCM for rc6 tom.orourke
2016-03-09 0:34 ` [PATCH 25/26] DO NOT MERGE: drm/i915: Enable GuC submission, where supported tom.orourke
2016-03-09 0:34 ` [PATCH 26/26] DO NOT MERGE: drm/i915: Enable SLPC, " tom.orourke
2016-03-09 8:03 ` ✗ Fi.CI.BAT: failure for Add support for GuC-based SLPC (rev2) Patchwork
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