From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 9/9] drm/i915: Eliminate redundancy in intel_primary_plane_create()
Date: Tue, 8 Oct 2019 19:14:41 +0300 [thread overview]
Message-ID: <20191008161441.12721-9-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20191008161441.12721-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Lots of redundant assignments inside intel_primary_plane_create().
Get rid of them.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 43 +++++++-------------
1 file changed, 14 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index c553a3417891..2acec838fb8e 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -14873,7 +14873,6 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
const struct drm_plane_funcs *plane_funcs;
unsigned int supported_rotations;
unsigned int possible_crtcs;
- const u64 *modifiers;
const u32 *formats;
int num_formats;
int ret, zpos;
@@ -14908,53 +14907,39 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
formats = vlv_primary_formats;
num_formats = ARRAY_SIZE(vlv_primary_formats);
- modifiers = i9xx_format_modifiers;
-
- plane->max_stride = i9xx_plane_max_stride;
- plane->update_plane = i9xx_update_plane;
- plane->disable_plane = i9xx_disable_plane;
- plane->get_hw_state = i9xx_plane_get_hw_state;
- plane->check_plane = i9xx_plane_check;
-
- plane_funcs = &i965_plane_funcs;
} else if (INTEL_GEN(dev_priv) >= 4) {
formats = i965_primary_formats;
num_formats = ARRAY_SIZE(i965_primary_formats);
- modifiers = i9xx_format_modifiers;
-
- plane->max_stride = i9xx_plane_max_stride;
- plane->update_plane = i9xx_update_plane;
- plane->disable_plane = i9xx_disable_plane;
- plane->get_hw_state = i9xx_plane_get_hw_state;
- plane->check_plane = i9xx_plane_check;
-
- plane_funcs = &i965_plane_funcs;
} else {
formats = i8xx_primary_formats;
num_formats = ARRAY_SIZE(i8xx_primary_formats);
- modifiers = i9xx_format_modifiers;
-
- plane->max_stride = i9xx_plane_max_stride;
- plane->update_plane = i9xx_update_plane;
- plane->disable_plane = i9xx_disable_plane;
- plane->get_hw_state = i9xx_plane_get_hw_state;
- plane->check_plane = i9xx_plane_check;
+ }
+ if (INTEL_GEN(dev_priv) >= 4)
+ plane_funcs = &i965_plane_funcs;
+ else
plane_funcs = &i8xx_plane_funcs;
- }
+
+ plane->max_stride = i9xx_plane_max_stride;
+ plane->update_plane = i9xx_update_plane;
+ plane->disable_plane = i9xx_disable_plane;
+ plane->get_hw_state = i9xx_plane_get_hw_state;
+ plane->check_plane = i9xx_plane_check;
possible_crtcs = BIT(pipe);
if (INTEL_GEN(dev_priv) >= 5 || IS_G4X(dev_priv))
ret = drm_universal_plane_init(&dev_priv->drm, &plane->base,
possible_crtcs, plane_funcs,
- formats, num_formats, modifiers,
+ formats, num_formats,
+ i9xx_format_modifiers,
DRM_PLANE_TYPE_PRIMARY,
"primary %c", pipe_name(pipe));
else
ret = drm_universal_plane_init(&dev_priv->drm, &plane->base,
possible_crtcs, plane_funcs,
- formats, num_formats, modifiers,
+ formats, num_formats,
+ i9xx_format_modifiers,
DRM_PLANE_TYPE_PRIMARY,
"plane %c",
plane_name(plane->i9xx_plane));
--
2.21.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2019-10-08 16:15 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-08 16:14 [PATCH 1/9] drm/i915: Expose 10:10:10 XRGB formats on SNB-BDW sprites Ville Syrjala
2019-10-08 16:14 ` [PATCH 2/9] drm/i915: Expose alpha formats on VLV/CHV primary planes Ville Syrjala
2019-10-29 10:01 ` Shankar, Uma
2019-10-29 10:01 ` [Intel-gfx] " Shankar, Uma
2019-10-08 16:14 ` [PATCH 3/9] drm/i915: Add missing 10bpc formats for pipe B sprites on CHV Ville Syrjala
2019-10-29 11:53 ` Shankar, Uma
2019-10-29 11:53 ` [Intel-gfx] " Shankar, Uma
2019-10-08 16:14 ` [PATCH 4/9] drm/i915: Expose C8 on VLV/CHV sprite planes Ville Syrjala
2019-10-29 10:29 ` Shankar, Uma
2019-10-29 10:29 ` [Intel-gfx] " Shankar, Uma
2019-10-08 16:14 ` [PATCH 5/9] drm/i915: Add 10bpc formats with alpha for icl+ Ville Syrjala
2019-10-09 10:43 ` [PATCH v2 " Ville Syrjala
2019-10-29 12:08 ` Shankar, Uma
2019-10-29 12:08 ` [Intel-gfx] " Shankar, Uma
2019-10-29 20:07 ` [PATCH " Juha-Pekka Heikkila
2019-10-29 20:07 ` [Intel-gfx] " Juha-Pekka Heikkila
2019-10-08 16:14 ` [PATCH 6/9] drm/i915: Sort format arrays consistently Ville Syrjala
2019-10-27 20:53 ` Juha-Pekka Heikkila
2019-10-27 20:53 ` [Intel-gfx] " Juha-Pekka Heikkila
2019-10-29 12:10 ` Shankar, Uma
2019-10-29 12:10 ` [Intel-gfx] " Shankar, Uma
2019-10-08 16:14 ` [PATCH 7/9] drm/i915: Reject ckey+fp16 on skl+ Ville Syrjala
2019-10-29 13:07 ` Shankar, Uma
2019-10-29 13:07 ` [Intel-gfx] " Shankar, Uma
2019-10-29 13:35 ` Shankar, Uma
2019-10-29 13:35 ` [Intel-gfx] " Shankar, Uma
2019-10-29 15:22 ` Ville Syrjälä
2019-10-29 15:22 ` [Intel-gfx] " Ville Syrjälä
2019-10-30 15:26 ` Shankar, Uma
2019-10-30 15:26 ` [Intel-gfx] " Shankar, Uma
2019-10-08 16:14 ` [PATCH 8/9] drm/i915: Do not enable HDR mode when color keying is active Ville Syrjala
2019-10-29 13:22 ` Shankar, Uma
2019-10-29 13:22 ` [Intel-gfx] " Shankar, Uma
2019-10-08 16:14 ` Ville Syrjala [this message]
2019-10-27 20:53 ` [PATCH 9/9] drm/i915: Eliminate redundancy in intel_primary_plane_create() Juha-Pekka Heikkila
2019-10-27 20:53 ` [Intel-gfx] " Juha-Pekka Heikkila
2019-10-29 13:24 ` Shankar, Uma
2019-10-29 13:24 ` [Intel-gfx] " Shankar, Uma
2019-10-08 18:24 ` ✓ Fi.CI.BAT: success for series starting with [1/9] drm/i915: Expose 10:10:10 XRGB formats on SNB-BDW sprites Patchwork
2019-10-09 0:55 ` ✗ Fi.CI.IGT: failure " Patchwork
2019-10-09 15:45 ` ✓ Fi.CI.BAT: success for series starting with [1/9] drm/i915: Expose 10:10:10 XRGB formats on SNB-BDW sprites (rev2) Patchwork
2019-10-09 21:12 ` ✗ Fi.CI.IGT: failure " Patchwork
2019-10-14 19:23 ` Ville Syrjälä
2019-10-14 20:23 ` Chris Wilson
2019-10-15 6:41 ` Arkadiusz Hiler
2019-10-15 9:25 ` Petri Latvala
2019-10-15 11:51 ` Ville Syrjälä
2019-10-15 12:08 ` Arkadiusz Hiler
2019-10-29 9:08 ` [PATCH 1/9] drm/i915: Expose 10:10:10 XRGB formats on SNB-BDW sprites Shankar, Uma
2019-10-29 9:08 ` [Intel-gfx] " Shankar, Uma
2019-10-29 20:15 ` Juha-Pekka Heikkila
2019-10-29 20:15 ` [Intel-gfx] " Juha-Pekka Heikkila
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20191008161441.12721-9-ville.syrjala@linux.intel.com \
--to=ville.syrjala@linux.intel.com \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox