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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH v2 5/9] drm/i915: Add 10bpc formats with alpha for icl+
Date: Wed,  9 Oct 2019 13:43:52 +0300	[thread overview]
Message-ID: <20191009104352.15619-1-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20191008161441.12721-5-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

ICL+ again supports alpha blending with 10bpc pixel formats.
Expose them.

v2: Add all the stuff I missed earlier!

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 19 +++++++++++++++----
 drivers/gpu/drm/i915/display/intel_sprite.c  | 10 ++++++++++
 2 files changed, 25 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 1cdcd0ea0564..19a0c8cfb151 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -3031,10 +3031,17 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool alpha)
 				return DRM_FORMAT_XRGB8888;
 		}
 	case PLANE_CTL_FORMAT_XRGB_2101010:
-		if (rgb_order)
-			return DRM_FORMAT_XBGR2101010;
-		else
-			return DRM_FORMAT_XRGB2101010;
+		if (rgb_order) {
+			if (alpha)
+				return DRM_FORMAT_ABGR2101010;
+			else
+				return DRM_FORMAT_XBGR2101010;
+		} else {
+			if (alpha)
+				return DRM_FORMAT_ARGB2101010;
+			else
+				return DRM_FORMAT_XRGB2101010;
+		}
 	case PLANE_CTL_FORMAT_XRGB_16161616F:
 		if (rgb_order) {
 			if (alpha)
@@ -4024,8 +4031,10 @@ static u32 skl_plane_ctl_format(u32 pixel_format)
 	case DRM_FORMAT_ARGB8888:
 		return PLANE_CTL_FORMAT_XRGB_8888;
 	case DRM_FORMAT_XBGR2101010:
+	case DRM_FORMAT_ABGR2101010:
 		return PLANE_CTL_FORMAT_XRGB_2101010 | PLANE_CTL_ORDER_RGBX;
 	case DRM_FORMAT_XRGB2101010:
+	case DRM_FORMAT_ARGB2101010:
 		return PLANE_CTL_FORMAT_XRGB_2101010;
 	case DRM_FORMAT_XBGR16161616F:
 	case DRM_FORMAT_ABGR16161616F:
@@ -5617,6 +5626,8 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
 	case DRM_FORMAT_ARGB8888:
 	case DRM_FORMAT_XRGB2101010:
 	case DRM_FORMAT_XBGR2101010:
+	case DRM_FORMAT_ARGB2101010:
+	case DRM_FORMAT_ABGR2101010:
 	case DRM_FORMAT_XBGR16161616F:
 	case DRM_FORMAT_ABGR16161616F:
 	case DRM_FORMAT_XRGB16161616F:
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index 4cd0982dc8a2..df3ca75580d7 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -2103,6 +2103,8 @@ static const u32 icl_sdr_y_plane_formats[] = {
 	DRM_FORMAT_ABGR8888,
 	DRM_FORMAT_XRGB2101010,
 	DRM_FORMAT_XBGR2101010,
+	DRM_FORMAT_ARGB2101010,
+	DRM_FORMAT_ABGR2101010,
 	DRM_FORMAT_YUYV,
 	DRM_FORMAT_YVYU,
 	DRM_FORMAT_UYVY,
@@ -2124,6 +2126,8 @@ static const u32 icl_sdr_uv_plane_formats[] = {
 	DRM_FORMAT_ABGR8888,
 	DRM_FORMAT_XRGB2101010,
 	DRM_FORMAT_XBGR2101010,
+	DRM_FORMAT_ARGB2101010,
+	DRM_FORMAT_ABGR2101010,
 	DRM_FORMAT_YUYV,
 	DRM_FORMAT_YVYU,
 	DRM_FORMAT_UYVY,
@@ -2149,6 +2153,8 @@ static const u32 icl_hdr_plane_formats[] = {
 	DRM_FORMAT_ABGR8888,
 	DRM_FORMAT_XRGB2101010,
 	DRM_FORMAT_XBGR2101010,
+	DRM_FORMAT_ARGB2101010,
+	DRM_FORMAT_ABGR2101010,
 	DRM_FORMAT_XRGB16161616F,
 	DRM_FORMAT_XBGR16161616F,
 	DRM_FORMAT_ARGB16161616F,
@@ -2315,6 +2321,8 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane,
 	case DRM_FORMAT_RGB565:
 	case DRM_FORMAT_XRGB2101010:
 	case DRM_FORMAT_XBGR2101010:
+	case DRM_FORMAT_ARGB2101010:
+	case DRM_FORMAT_ABGR2101010:
 	case DRM_FORMAT_YUYV:
 	case DRM_FORMAT_YVYU:
 	case DRM_FORMAT_UYVY:
@@ -2367,6 +2375,8 @@ static bool gen12_plane_format_mod_supported(struct drm_plane *_plane,
 	case DRM_FORMAT_RGB565:
 	case DRM_FORMAT_XRGB2101010:
 	case DRM_FORMAT_XBGR2101010:
+	case DRM_FORMAT_ARGB2101010:
+	case DRM_FORMAT_ABGR2101010:
 	case DRM_FORMAT_YUYV:
 	case DRM_FORMAT_YVYU:
 	case DRM_FORMAT_UYVY:
-- 
2.21.0

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  reply	other threads:[~2019-10-09 10:43 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-08 16:14 [PATCH 1/9] drm/i915: Expose 10:10:10 XRGB formats on SNB-BDW sprites Ville Syrjala
2019-10-08 16:14 ` [PATCH 2/9] drm/i915: Expose alpha formats on VLV/CHV primary planes Ville Syrjala
2019-10-29 10:01   ` Shankar, Uma
2019-10-29 10:01     ` [Intel-gfx] " Shankar, Uma
2019-10-08 16:14 ` [PATCH 3/9] drm/i915: Add missing 10bpc formats for pipe B sprites on CHV Ville Syrjala
2019-10-29 11:53   ` Shankar, Uma
2019-10-29 11:53     ` [Intel-gfx] " Shankar, Uma
2019-10-08 16:14 ` [PATCH 4/9] drm/i915: Expose C8 on VLV/CHV sprite planes Ville Syrjala
2019-10-29 10:29   ` Shankar, Uma
2019-10-29 10:29     ` [Intel-gfx] " Shankar, Uma
2019-10-08 16:14 ` [PATCH 5/9] drm/i915: Add 10bpc formats with alpha for icl+ Ville Syrjala
2019-10-09 10:43   ` Ville Syrjala [this message]
2019-10-29 12:08     ` [PATCH v2 " Shankar, Uma
2019-10-29 12:08       ` [Intel-gfx] " Shankar, Uma
2019-10-29 20:07   ` [PATCH " Juha-Pekka Heikkila
2019-10-29 20:07     ` [Intel-gfx] " Juha-Pekka Heikkila
2019-10-08 16:14 ` [PATCH 6/9] drm/i915: Sort format arrays consistently Ville Syrjala
2019-10-27 20:53   ` Juha-Pekka Heikkila
2019-10-27 20:53     ` [Intel-gfx] " Juha-Pekka Heikkila
2019-10-29 12:10   ` Shankar, Uma
2019-10-29 12:10     ` [Intel-gfx] " Shankar, Uma
2019-10-08 16:14 ` [PATCH 7/9] drm/i915: Reject ckey+fp16 on skl+ Ville Syrjala
2019-10-29 13:07   ` Shankar, Uma
2019-10-29 13:07     ` [Intel-gfx] " Shankar, Uma
2019-10-29 13:35     ` Shankar, Uma
2019-10-29 13:35       ` [Intel-gfx] " Shankar, Uma
2019-10-29 15:22       ` Ville Syrjälä
2019-10-29 15:22         ` [Intel-gfx] " Ville Syrjälä
2019-10-30 15:26         ` Shankar, Uma
2019-10-30 15:26           ` [Intel-gfx] " Shankar, Uma
2019-10-08 16:14 ` [PATCH 8/9] drm/i915: Do not enable HDR mode when color keying is active Ville Syrjala
2019-10-29 13:22   ` Shankar, Uma
2019-10-29 13:22     ` [Intel-gfx] " Shankar, Uma
2019-10-08 16:14 ` [PATCH 9/9] drm/i915: Eliminate redundancy in intel_primary_plane_create() Ville Syrjala
2019-10-27 20:53   ` Juha-Pekka Heikkila
2019-10-27 20:53     ` [Intel-gfx] " Juha-Pekka Heikkila
2019-10-29 13:24   ` Shankar, Uma
2019-10-29 13:24     ` [Intel-gfx] " Shankar, Uma
2019-10-08 18:24 ` ✓ Fi.CI.BAT: success for series starting with [1/9] drm/i915: Expose 10:10:10 XRGB formats on SNB-BDW sprites Patchwork
2019-10-09  0:55 ` ✗ Fi.CI.IGT: failure " Patchwork
2019-10-09 15:45 ` ✓ Fi.CI.BAT: success for series starting with [1/9] drm/i915: Expose 10:10:10 XRGB formats on SNB-BDW sprites (rev2) Patchwork
2019-10-09 21:12 ` ✗ Fi.CI.IGT: failure " Patchwork
2019-10-14 19:23   ` Ville Syrjälä
2019-10-14 20:23     ` Chris Wilson
2019-10-15  6:41     ` Arkadiusz Hiler
2019-10-15  9:25       ` Petri Latvala
2019-10-15 11:51         ` Ville Syrjälä
2019-10-15 12:08         ` Arkadiusz Hiler
2019-10-29  9:08 ` [PATCH 1/9] drm/i915: Expose 10:10:10 XRGB formats on SNB-BDW sprites Shankar, Uma
2019-10-29  9:08   ` [Intel-gfx] " Shankar, Uma
2019-10-29 20:15 ` Juha-Pekka Heikkila
2019-10-29 20:15   ` [Intel-gfx] " Juha-Pekka Heikkila

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