[Intel-gfx] [PATCH v4 00/23] Alder Lake-P Support

[Matt Roper <matthew.d.roper@intel.com>]

Many of the ALD-P patches have received review and landed on drm-tip
now.  Let's rebase and resend the remaining patches that still need
review (or have prereq patches that need review).

Previous version of the series was
        https://patchwork.freedesktop.org/series/89899/#rev2

Aside from general rebasing, this version also updates the DP
translation tables in since the bspec was just updated with new values.

Cc: Clinton Taylor <clinton.a.taylor@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>

Anusha Srivatsa (4):
  drm/i915/adl_p: Setup ports/phys
  drm/i915/adl_p: Add PLL Support
  drm/i915/adlp: Add PIPE_MISC2 programming
  drm/i915/adl_p: Update memory bandwidth parameters

Gwan-gyeong Mun (4):
  drm/i915/display: Replace dc3co_enabled with dc3co_exitline on
    intel_psr struct
  drm/i915/display: Remove a redundant function argument from
    intel_psr_enable_source()
  drm/i915/display: Add PSR interrupt error check function
  drm/i915/display: Introduce new intel_psr_pause/resume function

Imre Deak (1):
  drm/i915/adl_p: Program DP/HDMI link rate to DDI_BUF_CTL

José Roberto de Souza (3):
  drm/i915/adl_p: Handle TC cold
  drm/i915/adl_p: Implement TC sequences
  drm/i915/adl_p: Don't config MBUS and DBUF during display
    initialization

Manasi Navare (1):
  drm/i915/xelpd: Add VRR guardband for VRR CTL

Matt Roper (2):
  drm/i915/xelpd: Enhanced pipe underrun reporting
  drm/i915/adl_p: Add dedicated SAGV watermarks

Mika Kahola (2):
  drm/i915/adl_p: Tx escape clock with DSI
  drm/i915/adl_p: Define and use ADL-P specific DP translation tables

Vandita Kulkarni (5):
  drm/i915/xelpd: Support DP1.4 compression BPPs
  drm/i915/xelpd: Calculate VDSC RC parameters
  drm/i915/xelpd: Add rc_qp_table for rcparams calculation
  drm/i915/adl_p: Add ddb allocation support
  drm/i915/adl_p: MBUS programming

Ville Syrjälä (1):
  drm/i915: Introduce MBUS relative dbuf offsets

 drivers/gpu/drm/i915/Makefile                 |   1 +
 drivers/gpu/drm/i915/display/icl_dsi.c        |  21 +-
 drivers/gpu/drm/i915/display/intel_atomic.c   |  20 ++
 drivers/gpu/drm/i915/display/intel_atomic.h   |   1 +
 drivers/gpu/drm/i915/display/intel_bw.c       |   2 +-
 drivers/gpu/drm/i915/display/intel_ddi.c      |  43 ++-
 .../drm/i915/display/intel_ddi_buf_trans.c    |  53 +++
 .../drm/i915/display/intel_ddi_buf_trans.h    |   4 +
 drivers/gpu/drm/i915/display/intel_display.c  |  77 ++++-
 .../drm/i915/display/intel_display_power.c    |   9 +-
 .../drm/i915/display/intel_display_types.h    |   5 +-
 drivers/gpu/drm/i915/display/intel_dp.c       |   1 +
 drivers/gpu/drm/i915/display/intel_dpll_mgr.c |  69 +++-
 .../drm/i915/display/intel_fifo_underrun.c    |  57 +++-
 drivers/gpu/drm/i915/display/intel_psr.c      | 131 ++++++--
 drivers/gpu/drm/i915/display/intel_psr.h      |   2 +
 .../gpu/drm/i915/display/intel_qp_tables.c    | 311 ++++++++++++++++++
 .../gpu/drm/i915/display/intel_qp_tables.h    |  14 +
 drivers/gpu/drm/i915/display/intel_tc.c       | 134 +++++++-
 drivers/gpu/drm/i915/display/intel_vdsc.c     | 105 +++++-
 drivers/gpu/drm/i915/display/intel_vrr.c      |  58 +++-
 drivers/gpu/drm/i915/i915_drv.h               |   5 +
 drivers/gpu/drm/i915/i915_irq.c               |  19 +-
 drivers/gpu/drm/i915/i915_irq.h               |   1 +
 drivers/gpu/drm/i915/i915_reg.h               | 135 ++++++--
 drivers/gpu/drm/i915/intel_pm.c               | 303 ++++++++++++++++-
 drivers/gpu/drm/i915/intel_pm.h               |   2 +-
 27 files changed, 1440 insertions(+), 143 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/display/intel_qp_tables.c
 create mode 100644 drivers/gpu/drm/i915/display/intel_qp_tables.h

-- 
2.25.4

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