From: Matt Roper <matthew.d.roper@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org,
"Michal Wajdeczko" <michal.wajdeczko@intel.com>,
"Michał Winiarski" <michal.winiarski@intel.com>,
"Matt Roper" <matthew.d.roper@intel.com>
Subject: [Intel-gfx] [PATCH 09/11] drm/i915/guc: Update CT debug macro for multi-tile
Date: Fri, 8 Oct 2021 14:56:33 -0700 [thread overview]
Message-ID: <20211008215635.2026385-10-matthew.d.roper@intel.com> (raw)
In-Reply-To: <20211008215635.2026385-1-matthew.d.roper@intel.com>
From: Michal Wajdeczko <michal.wajdeczko@intel.com>
Update CT debug macros by including tile ID in all messages.
Cc: Michał Winiarski <michal.winiarski@intel.com>
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
index 0a3504bc0b61..013ad85cc7f6 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
@@ -33,15 +33,15 @@ static inline struct drm_device *ct_to_drm(struct intel_guc_ct *ct)
}
#define CT_ERROR(_ct, _fmt, ...) \
- drm_err(ct_to_drm(_ct), "CT: " _fmt, ##__VA_ARGS__)
+ drm_err(ct_to_drm(_ct), "CT%u: " _fmt, ct_to_gt(_ct)->info.id, ##__VA_ARGS__)
#ifdef CONFIG_DRM_I915_DEBUG_GUC
#define CT_DEBUG(_ct, _fmt, ...) \
- drm_dbg(ct_to_drm(_ct), "CT: " _fmt, ##__VA_ARGS__)
+ drm_dbg(ct_to_drm(_ct), "CT%u: " _fmt, ct_to_gt(_ct)->info.id, ##__VA_ARGS__)
#else
#define CT_DEBUG(...) do { } while (0)
#endif
#define CT_PROBE_ERROR(_ct, _fmt, ...) \
- i915_probe_error(ct_to_i915(ct), "CT: " _fmt, ##__VA_ARGS__)
+ i915_probe_error(ct_to_i915(ct), "CT%u: " _fmt, ct_to_gt(_ct)->info.id, ##__VA_ARGS__)
/**
* DOC: CTB Blob
--
2.33.0
next prev parent reply other threads:[~2021-10-08 21:57 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-08 21:56 [Intel-gfx] [PATCH 00/11] i915: Initial multi-tile support Matt Roper
2021-10-08 21:56 ` [Intel-gfx] [PATCH 01/11] drm/i915: rework some irq functions to take intel_gt as argument Matt Roper
2021-10-27 6:22 ` Lucas De Marchi
2021-10-28 14:13 ` Andi Shyti
2021-10-08 21:56 ` [Intel-gfx] [PATCH 02/11] drm/i915: split general MMIO setup from per-GT uncore init Matt Roper
2021-10-27 6:26 ` Lucas De Marchi
2021-10-28 14:17 ` Andi Shyti
2021-10-08 21:56 ` [Intel-gfx] [PATCH 03/11] drm/i915: Restructure probe to handle multi-tile platforms Matt Roper
2021-10-13 12:12 ` Jani Nikula
2021-10-27 6:57 ` Lucas De Marchi
2021-10-27 7:58 ` Jani Nikula
2021-10-08 21:56 ` [Intel-gfx] [PATCH 04/11] drm/i915: Store backpointer to GT in uncore Matt Roper
2021-10-28 14:26 ` Andi Shyti
2021-10-08 21:56 ` [Intel-gfx] [PATCH 05/11] drm/i915: Prepare for multiple gts Matt Roper
2021-10-27 7:01 ` Lucas De Marchi
2021-10-08 21:56 ` [Intel-gfx] [PATCH 06/11] drm/i915: Initial support for per-tile uncore Matt Roper
2021-10-28 15:41 ` Andi Shyti
2021-10-08 21:56 ` [Intel-gfx] [PATCH 07/11] drm/i915/xehp: Determine which tile raised an interrupt Matt Roper
2021-10-08 23:48 ` Matt Roper
2021-10-13 0:55 ` Andi Shyti
2021-10-27 7:13 ` Lucas De Marchi
2021-10-08 21:56 ` [Intel-gfx] [PATCH 08/11] drm/i915/xehp: Make IRQ reset and postinstall multi-tile aware Matt Roper
2021-10-28 16:30 ` Andi Shyti
2021-10-28 23:20 ` Matt Roper
2021-10-29 0:16 ` Andi Shyti
2021-10-08 21:56 ` Matt Roper [this message]
2021-10-08 21:56 ` [Intel-gfx] [PATCH 10/11] drm/i915: Release per-gt resources allocated Matt Roper
2021-10-28 16:33 ` Andi Shyti
2021-10-08 21:56 ` [Intel-gfx] [PATCH 11/11] drm/i915/xehpsdv: Initialize multi-tiles Matt Roper
2021-10-08 23:33 ` [Intel-gfx] [PATCH v2 " Matt Roper
2021-10-11 7:51 ` Tvrtko Ursulin
2021-10-12 23:11 ` Andi Shyti
2021-10-08 22:30 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915: Initial multi-tile support Patchwork
2021-10-08 23:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-10-09 0:05 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915: Initial multi-tile support (rev2) Patchwork
2021-10-09 0:36 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-10-09 2:54 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for i915: Initial multi-tile support Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20211008215635.2026385-10-matthew.d.roper@intel.com \
--to=matthew.d.roper@intel.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=intel-gfx@lists.freedesktop.org \
--cc=michal.wajdeczko@intel.com \
--cc=michal.winiarski@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox