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From: Matt Roper <matthew.d.roper@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org,
	Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>,
	Matt Roper <matthew.d.roper@intel.com>
Subject: [Intel-gfx] [PATCH 02/11] drm/i915: split general MMIO setup from per-GT uncore init
Date: Fri,  8 Oct 2021 14:56:26 -0700	[thread overview]
Message-ID: <20211008215635.2026385-3-matthew.d.roper@intel.com> (raw)
In-Reply-To: <20211008215635.2026385-1-matthew.d.roper@intel.com>

From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

In coming patches we'll be doing the actual tile initialization between
these two uncore init phases.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.c     |  9 ++++++++-
 drivers/gpu/drm/i915/intel_uncore.c | 17 +++--------------
 drivers/gpu/drm/i915/intel_uncore.h |  2 ++
 3 files changed, 13 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index c65c3742887a..7f96d26c012a 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -415,10 +415,14 @@ static int i915_driver_mmio_probe(struct drm_i915_private *dev_priv)
 	if (ret < 0)
 		return ret;
 
-	ret = intel_uncore_init_mmio(&dev_priv->uncore);
+	ret = intel_uncore_setup_mmio(&dev_priv->uncore);
 	if (ret < 0)
 		goto err_bridge;
 
+	ret = intel_uncore_init_mmio(&dev_priv->uncore);
+	if (ret)
+		goto err_mmio;
+
 	/* Try to make sure MCHBAR is enabled before poking at it */
 	intel_setup_mchbar(dev_priv);
 	intel_device_info_runtime_init(dev_priv);
@@ -435,6 +439,8 @@ static int i915_driver_mmio_probe(struct drm_i915_private *dev_priv)
 err_uncore:
 	intel_teardown_mchbar(dev_priv);
 	intel_uncore_fini_mmio(&dev_priv->uncore);
+err_mmio:
+	intel_uncore_cleanup_mmio(&dev_priv->uncore);
 err_bridge:
 	pci_dev_put(dev_priv->bridge_dev);
 
@@ -449,6 +455,7 @@ static void i915_driver_mmio_release(struct drm_i915_private *dev_priv)
 {
 	intel_teardown_mchbar(dev_priv);
 	intel_uncore_fini_mmio(&dev_priv->uncore);
+	intel_uncore_cleanup_mmio(&dev_priv->uncore);
 	pci_dev_put(dev_priv->bridge_dev);
 }
 
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index e072054adac5..a308e86c9d9f 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -2020,7 +2020,7 @@ static int i915_pmic_bus_access_notifier(struct notifier_block *nb,
 	return NOTIFY_OK;
 }
 
-static int uncore_mmio_setup(struct intel_uncore *uncore)
+int intel_uncore_setup_mmio(struct intel_uncore *uncore)
 {
 	struct drm_i915_private *i915 = uncore->i915;
 	struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
@@ -2053,7 +2053,7 @@ static int uncore_mmio_setup(struct intel_uncore *uncore)
 	return 0;
 }
 
-static void uncore_mmio_cleanup(struct intel_uncore *uncore)
+void intel_uncore_cleanup_mmio(struct intel_uncore *uncore)
 {
 	struct pci_dev *pdev = to_pci_dev(uncore->i915->drm.dev);
 
@@ -2146,10 +2146,6 @@ int intel_uncore_init_mmio(struct intel_uncore *uncore)
 	struct drm_i915_private *i915 = uncore->i915;
 	int ret;
 
-	ret = uncore_mmio_setup(uncore);
-	if (ret)
-		return ret;
-
 	/*
 	 * The boot firmware initializes local memory and assesses its health.
 	 * If memory training fails, the punit will have been instructed to
@@ -2170,7 +2166,7 @@ int intel_uncore_init_mmio(struct intel_uncore *uncore)
 	} else {
 		ret = uncore_forcewake_init(uncore);
 		if (ret)
-			goto out_mmio_cleanup;
+			return ret;
 	}
 
 	/* make sure fw funcs are set if and only if we have fw*/
@@ -2192,11 +2188,6 @@ int intel_uncore_init_mmio(struct intel_uncore *uncore)
 		drm_dbg(&i915->drm, "unclaimed mmio detected on uncore init, clearing\n");
 
 	return 0;
-
-out_mmio_cleanup:
-	uncore_mmio_cleanup(uncore);
-
-	return ret;
 }
 
 /*
@@ -2261,8 +2252,6 @@ void intel_uncore_fini_mmio(struct intel_uncore *uncore)
 		intel_uncore_fw_domains_fini(uncore);
 		iosf_mbi_punit_release();
 	}
-
-	uncore_mmio_cleanup(uncore);
 }
 
 static const struct reg_whitelist {
diff --git a/drivers/gpu/drm/i915/intel_uncore.h b/drivers/gpu/drm/i915/intel_uncore.h
index 3248e4e2c540..d1d17b04e29f 100644
--- a/drivers/gpu/drm/i915/intel_uncore.h
+++ b/drivers/gpu/drm/i915/intel_uncore.h
@@ -218,11 +218,13 @@ void
 intel_uncore_mmio_debug_init_early(struct intel_uncore_mmio_debug *mmio_debug);
 void intel_uncore_init_early(struct intel_uncore *uncore,
 			     struct drm_i915_private *i915);
+int intel_uncore_setup_mmio(struct intel_uncore *uncore);
 int intel_uncore_init_mmio(struct intel_uncore *uncore);
 void intel_uncore_prune_engine_fw_domains(struct intel_uncore *uncore,
 					  struct intel_gt *gt);
 bool intel_uncore_unclaimed_mmio(struct intel_uncore *uncore);
 bool intel_uncore_arm_unclaimed_mmio_detection(struct intel_uncore *uncore);
+void intel_uncore_cleanup_mmio(struct intel_uncore *uncore);
 void intel_uncore_fini_mmio(struct intel_uncore *uncore);
 void intel_uncore_suspend(struct intel_uncore *uncore);
 void intel_uncore_resume_early(struct intel_uncore *uncore);
-- 
2.33.0


  parent reply	other threads:[~2021-10-08 21:57 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-08 21:56 [Intel-gfx] [PATCH 00/11] i915: Initial multi-tile support Matt Roper
2021-10-08 21:56 ` [Intel-gfx] [PATCH 01/11] drm/i915: rework some irq functions to take intel_gt as argument Matt Roper
2021-10-27  6:22   ` Lucas De Marchi
2021-10-28 14:13   ` Andi Shyti
2021-10-08 21:56 ` Matt Roper [this message]
2021-10-27  6:26   ` [Intel-gfx] [PATCH 02/11] drm/i915: split general MMIO setup from per-GT uncore init Lucas De Marchi
2021-10-28 14:17   ` Andi Shyti
2021-10-08 21:56 ` [Intel-gfx] [PATCH 03/11] drm/i915: Restructure probe to handle multi-tile platforms Matt Roper
2021-10-13 12:12   ` Jani Nikula
2021-10-27  6:57     ` Lucas De Marchi
2021-10-27  7:58       ` Jani Nikula
2021-10-08 21:56 ` [Intel-gfx] [PATCH 04/11] drm/i915: Store backpointer to GT in uncore Matt Roper
2021-10-28 14:26   ` Andi Shyti
2021-10-08 21:56 ` [Intel-gfx] [PATCH 05/11] drm/i915: Prepare for multiple gts Matt Roper
2021-10-27  7:01   ` Lucas De Marchi
2021-10-08 21:56 ` [Intel-gfx] [PATCH 06/11] drm/i915: Initial support for per-tile uncore Matt Roper
2021-10-28 15:41   ` Andi Shyti
2021-10-08 21:56 ` [Intel-gfx] [PATCH 07/11] drm/i915/xehp: Determine which tile raised an interrupt Matt Roper
2021-10-08 23:48   ` Matt Roper
2021-10-13  0:55   ` Andi Shyti
2021-10-27  7:13   ` Lucas De Marchi
2021-10-08 21:56 ` [Intel-gfx] [PATCH 08/11] drm/i915/xehp: Make IRQ reset and postinstall multi-tile aware Matt Roper
2021-10-28 16:30   ` Andi Shyti
2021-10-28 23:20     ` Matt Roper
2021-10-29  0:16       ` Andi Shyti
2021-10-08 21:56 ` [Intel-gfx] [PATCH 09/11] drm/i915/guc: Update CT debug macro for multi-tile Matt Roper
2021-10-08 21:56 ` [Intel-gfx] [PATCH 10/11] drm/i915: Release per-gt resources allocated Matt Roper
2021-10-28 16:33   ` Andi Shyti
2021-10-08 21:56 ` [Intel-gfx] [PATCH 11/11] drm/i915/xehpsdv: Initialize multi-tiles Matt Roper
2021-10-08 23:33   ` [Intel-gfx] [PATCH v2 " Matt Roper
2021-10-11  7:51     ` Tvrtko Ursulin
2021-10-12 23:11     ` Andi Shyti
2021-10-08 22:30 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915: Initial multi-tile support Patchwork
2021-10-08 23:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-10-09  0:05 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915: Initial multi-tile support (rev2) Patchwork
2021-10-09  0:36 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-10-09  2:54 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for i915: Initial multi-tile support Patchwork

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