From: Matt Roper <matthew.d.roper@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org,
Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>,
Tvrtko Ursulin <tvrtko.ursulin@intel.com>,
Matt Roper <matthew.d.roper@intel.com>
Subject: [Intel-gfx] [PATCH 06/11] drm/i915: Initial support for per-tile uncore
Date: Fri, 8 Oct 2021 14:56:30 -0700 [thread overview]
Message-ID: <20211008215635.2026385-7-matthew.d.roper@intel.com> (raw)
In-Reply-To: <20211008215635.2026385-1-matthew.d.roper@intel.com>
From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Initialization and suspend/resume is replicated per-tile.
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
drivers/gpu/drm/i915/gt/intel_gt.c | 1 +
drivers/gpu/drm/i915/i915_debugfs.c | 5 ++-
drivers/gpu/drm/i915/i915_drv.c | 61 ++++++++++++++++++++++-------
3 files changed, 51 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index 736725411f51..6528d21e68eb 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -1008,6 +1008,7 @@ void intel_gts_release(struct drm_i915_private *i915)
void intel_gt_info_print(const struct intel_gt_info *info,
struct drm_printer *p)
{
+ drm_printf(p, "GT %u info:\n", info->id);
drm_printf(p, "available engines: %x\n", info->engine_mask);
intel_sseu_dump(&info->sseu, p);
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index fdbd46ff59e0..34fefdfb6661 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -60,12 +60,15 @@ static int i915_capabilities(struct seq_file *m, void *data)
{
struct drm_i915_private *i915 = node_to_i915(m->private);
struct drm_printer p = drm_seq_file_printer(m);
+ struct intel_gt *gt;
+ unsigned int id;
seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(i915));
intel_device_info_print_static(INTEL_INFO(i915), &p);
intel_device_info_print_runtime(RUNTIME_INFO(i915), &p);
- intel_gt_info_print(&i915->gt.info, &p);
+ for_each_gt(i915, id, gt)
+ intel_gt_info_print(>->info, &p);
intel_driver_caps_print(&i915->caps, &p);
kernel_param_lock(THIS_MODULE);
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 44ccf0078ac4..36b6e6f2cebf 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -406,6 +406,8 @@ static void i915_driver_late_release(struct drm_i915_private *dev_priv)
*/
static int i915_driver_mmio_probe(struct drm_i915_private *dev_priv)
{
+ struct intel_gt *gt;
+ unsigned int i, j;
int ret;
if (i915_inject_probe_failure(dev_priv))
@@ -415,26 +417,35 @@ static int i915_driver_mmio_probe(struct drm_i915_private *dev_priv)
if (ret < 0)
return ret;
- ret = intel_uncore_init_mmio(&dev_priv->uncore);
- if (ret)
- return ret;
+ for_each_gt(dev_priv, i, gt) {
+ ret = intel_uncore_init_mmio(gt->uncore);
+ if (ret)
+ goto err_uncore;
+ }
/* Try to make sure MCHBAR is enabled before poking at it */
intel_setup_mchbar(dev_priv);
intel_device_info_runtime_init(dev_priv);
- ret = intel_gt_init_mmio(&dev_priv->gt);
- if (ret)
- goto err_uncore;
+ for_each_gt(dev_priv, j, gt) {
+ ret = intel_gt_init_mmio(gt);
+ if (ret)
+ goto err_mchbar;
+ }
/* As early as possible, scrub existing GPU state before clobbering */
sanitize_gpu(dev_priv);
return 0;
-err_uncore:
+err_mchbar:
intel_teardown_mchbar(dev_priv);
- intel_uncore_fini_mmio(&dev_priv->uncore);
+err_uncore:
+ for_each_gt(dev_priv, j, gt) {
+ if (j >= i)
+ break;
+ intel_uncore_fini_mmio(gt->uncore);
+ }
pci_dev_put(dev_priv->bridge_dev);
return ret;
@@ -446,8 +457,12 @@ static int i915_driver_mmio_probe(struct drm_i915_private *dev_priv)
*/
static void i915_driver_mmio_release(struct drm_i915_private *dev_priv)
{
+ struct intel_gt *gt;
+ unsigned int i;
+
intel_teardown_mchbar(dev_priv);
- intel_uncore_fini_mmio(&dev_priv->uncore);
+ for_each_gt(dev_priv, i, gt)
+ intel_uncore_fini_mmio(gt->uncore);
pci_dev_put(dev_priv->bridge_dev);
}
@@ -734,6 +749,8 @@ static void i915_welcome_messages(struct drm_i915_private *dev_priv)
{
if (drm_debug_enabled(DRM_UT_DRIVER)) {
struct drm_printer p = drm_debug_printer("i915 device info:");
+ struct intel_gt *gt;
+ unsigned int id;
drm_printf(&p, "pciid=0x%04x rev=0x%02x platform=%s (subplatform=0x%x) gen=%i\n",
INTEL_DEVID(dev_priv),
@@ -745,7 +762,8 @@ static void i915_welcome_messages(struct drm_i915_private *dev_priv)
intel_device_info_print_static(INTEL_INFO(dev_priv), &p);
intel_device_info_print_runtime(RUNTIME_INFO(dev_priv), &p);
- intel_gt_info_print(&dev_priv->gt.info, &p);
+ for_each_gt(dev_priv, id, gt)
+ intel_gt_info_print(>->info, &p);
}
if (IS_ENABLED(CONFIG_DRM_I915_DEBUG))
@@ -1167,13 +1185,16 @@ static int i915_drm_suspend_late(struct drm_device *dev, bool hibernation)
struct drm_i915_private *dev_priv = to_i915(dev);
struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
struct intel_runtime_pm *rpm = &dev_priv->runtime_pm;
+ struct intel_gt *gt;
+ unsigned int i;
int ret;
disable_rpm_wakeref_asserts(rpm);
i915_gem_suspend_late(dev_priv);
- intel_uncore_suspend(&dev_priv->uncore);
+ for_each_gt(dev_priv, i, gt)
+ intel_uncore_suspend(gt->uncore);
intel_power_domains_suspend(dev_priv,
get_suspend_mode(dev_priv, hibernation));
@@ -1302,6 +1323,8 @@ static int i915_drm_resume_early(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = to_i915(dev);
struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
+ struct intel_gt *gt;
+ unsigned int i;
int ret;
/*
@@ -1356,7 +1379,8 @@ static int i915_drm_resume_early(struct drm_device *dev)
drm_err(&dev_priv->drm,
"Resume prepare failed: %d, continuing anyway\n", ret);
- intel_uncore_resume_early(&dev_priv->uncore);
+ for_each_gt(dev_priv, i, gt)
+ intel_uncore_resume_early(gt->uncore);
intel_gt_check_and_clear_faults(&dev_priv->gt);
@@ -1525,6 +1549,8 @@ static int intel_runtime_suspend(struct device *kdev)
{
struct drm_i915_private *dev_priv = kdev_to_i915(kdev);
struct intel_runtime_pm *rpm = &dev_priv->runtime_pm;
+ struct intel_gt *gt;
+ unsigned int i;
int ret;
if (drm_WARN_ON_ONCE(&dev_priv->drm, !HAS_RUNTIME_PM(dev_priv)))
@@ -1544,7 +1570,8 @@ static int intel_runtime_suspend(struct device *kdev)
intel_runtime_pm_disable_interrupts(dev_priv);
- intel_uncore_suspend(&dev_priv->uncore);
+ for_each_gt(dev_priv, i, gt)
+ intel_uncore_suspend(gt->uncore);
intel_display_power_suspend(dev_priv);
@@ -1552,7 +1579,8 @@ static int intel_runtime_suspend(struct device *kdev)
if (ret) {
drm_err(&dev_priv->drm,
"Runtime suspend failed, disabling it (%d)\n", ret);
- intel_uncore_runtime_resume(&dev_priv->uncore);
+ for_each_gt(dev_priv, i, gt)
+ intel_uncore_runtime_resume(gt->uncore);
intel_runtime_pm_enable_interrupts(dev_priv);
@@ -1608,6 +1636,8 @@ static int intel_runtime_resume(struct device *kdev)
{
struct drm_i915_private *dev_priv = kdev_to_i915(kdev);
struct intel_runtime_pm *rpm = &dev_priv->runtime_pm;
+ struct intel_gt *gt;
+ unsigned int i;
int ret;
if (drm_WARN_ON_ONCE(&dev_priv->drm, !HAS_RUNTIME_PM(dev_priv)))
@@ -1628,7 +1658,8 @@ static int intel_runtime_resume(struct device *kdev)
ret = vlv_resume_prepare(dev_priv, true);
- intel_uncore_runtime_resume(&dev_priv->uncore);
+ for_each_gt(dev_priv, i, gt)
+ intel_uncore_runtime_resume(gt->uncore);
intel_runtime_pm_enable_interrupts(dev_priv);
--
2.33.0
next prev parent reply other threads:[~2021-10-08 21:57 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-08 21:56 [Intel-gfx] [PATCH 00/11] i915: Initial multi-tile support Matt Roper
2021-10-08 21:56 ` [Intel-gfx] [PATCH 01/11] drm/i915: rework some irq functions to take intel_gt as argument Matt Roper
2021-10-27 6:22 ` Lucas De Marchi
2021-10-28 14:13 ` Andi Shyti
2021-10-08 21:56 ` [Intel-gfx] [PATCH 02/11] drm/i915: split general MMIO setup from per-GT uncore init Matt Roper
2021-10-27 6:26 ` Lucas De Marchi
2021-10-28 14:17 ` Andi Shyti
2021-10-08 21:56 ` [Intel-gfx] [PATCH 03/11] drm/i915: Restructure probe to handle multi-tile platforms Matt Roper
2021-10-13 12:12 ` Jani Nikula
2021-10-27 6:57 ` Lucas De Marchi
2021-10-27 7:58 ` Jani Nikula
2021-10-08 21:56 ` [Intel-gfx] [PATCH 04/11] drm/i915: Store backpointer to GT in uncore Matt Roper
2021-10-28 14:26 ` Andi Shyti
2021-10-08 21:56 ` [Intel-gfx] [PATCH 05/11] drm/i915: Prepare for multiple gts Matt Roper
2021-10-27 7:01 ` Lucas De Marchi
2021-10-08 21:56 ` Matt Roper [this message]
2021-10-28 15:41 ` [Intel-gfx] [PATCH 06/11] drm/i915: Initial support for per-tile uncore Andi Shyti
2021-10-08 21:56 ` [Intel-gfx] [PATCH 07/11] drm/i915/xehp: Determine which tile raised an interrupt Matt Roper
2021-10-08 23:48 ` Matt Roper
2021-10-13 0:55 ` Andi Shyti
2021-10-27 7:13 ` Lucas De Marchi
2021-10-08 21:56 ` [Intel-gfx] [PATCH 08/11] drm/i915/xehp: Make IRQ reset and postinstall multi-tile aware Matt Roper
2021-10-28 16:30 ` Andi Shyti
2021-10-28 23:20 ` Matt Roper
2021-10-29 0:16 ` Andi Shyti
2021-10-08 21:56 ` [Intel-gfx] [PATCH 09/11] drm/i915/guc: Update CT debug macro for multi-tile Matt Roper
2021-10-08 21:56 ` [Intel-gfx] [PATCH 10/11] drm/i915: Release per-gt resources allocated Matt Roper
2021-10-28 16:33 ` Andi Shyti
2021-10-08 21:56 ` [Intel-gfx] [PATCH 11/11] drm/i915/xehpsdv: Initialize multi-tiles Matt Roper
2021-10-08 23:33 ` [Intel-gfx] [PATCH v2 " Matt Roper
2021-10-11 7:51 ` Tvrtko Ursulin
2021-10-12 23:11 ` Andi Shyti
2021-10-08 22:30 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915: Initial multi-tile support Patchwork
2021-10-08 23:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-10-09 0:05 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915: Initial multi-tile support (rev2) Patchwork
2021-10-09 0:36 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-10-09 2:54 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for i915: Initial multi-tile support Patchwork
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