* [Intel-gfx] [PATCH v4 01/23] drm/i915/display: Add framework to add parameters specific to display
2023-10-24 12:40 [Intel-gfx] [PATCH v4 00/23] Framework for display parameters Jouni Högander
@ 2023-10-24 12:40 ` Jouni Högander
2023-10-24 12:40 ` [Intel-gfx] [PATCH v4 02/23] drm/i915/display: Dump also display parameters Jouni Högander
` (26 subsequent siblings)
27 siblings, 0 replies; 30+ messages in thread
From: Jouni Högander @ 2023-10-24 12:40 UTC (permalink / raw)
To: intel-gfx; +Cc: Luca Coelho
Currently all module parameters are handled by i915_param.c/h. This
is a problem for display parameters when Xe driver is used. Add
a mechanism to add parameters specific to the display. This is mainly
copied from i915_[debugfs]_params.[ch]. Parameters are not yet moved. This
is done by subsequent patches.
v2:
- Drop unused predefinition (dentry)
- Clarify need for empty INTEL_DISPLAY_PARAMS_FOR_EACH in comment
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
---
drivers/gpu/drm/i915/Makefile | 2 +
.../gpu/drm/i915/display/intel_display_core.h | 2 +
.../drm/i915/display/intel_display_debugfs.c | 2 +
.../display/intel_display_debugfs_params.c | 176 ++++++++++++++++++
.../display/intel_display_debugfs_params.h | 13 ++
.../drm/i915/display/intel_display_device.c | 8 +
.../drm/i915/display/intel_display_device.h | 1 +
.../drm/i915/display/intel_display_params.c | 71 +++++++
.../drm/i915/display/intel_display_params.h | 34 ++++
drivers/gpu/drm/i915/i915_driver.c | 2 +
10 files changed, 311 insertions(+)
create mode 100644 drivers/gpu/drm/i915/display/intel_display_debugfs_params.c
create mode 100644 drivers/gpu/drm/i915/display/intel_display_debugfs_params.h
create mode 100644 drivers/gpu/drm/i915/display/intel_display_params.c
create mode 100644 drivers/gpu/drm/i915/display/intel_display_params.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 88b2bb005014..3b9dcb606fc1 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -95,6 +95,7 @@ i915-$(CONFIG_DEBUG_FS) += \
i915_debugfs.o \
i915_debugfs_params.o \
display/intel_display_debugfs.o \
+ display/intel_display_debugfs_params.o \
display/intel_pipe_crc.o
i915-$(CONFIG_PERF_EVENTS) += i915_pmu.o
@@ -257,6 +258,7 @@ i915-y += \
display/intel_display.o \
display/intel_display_driver.o \
display/intel_display_irq.o \
+ display/intel_display_params.o \
display/intel_display_power.o \
display/intel_display_power_map.o \
display/intel_display_power_well.o \
diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index ccfe27630fb6..aa8be02c9e54 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -19,6 +19,7 @@
#include "intel_cdclk.h"
#include "intel_display_device.h"
#include "intel_display_limits.h"
+#include "intel_display_params.h"
#include "intel_display_power.h"
#include "intel_dpll_mgr.h"
#include "intel_fbc.h"
@@ -520,6 +521,7 @@ struct intel_display {
struct intel_hotplug hotplug;
struct intel_opregion opregion;
struct intel_overlay *overlay;
+ struct intel_display_params params;
struct intel_vbt_data vbt;
struct intel_wm wm;
};
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index 2836826f8c05..10a482f746c3 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -17,6 +17,7 @@
#include "intel_de.h"
#include "intel_crtc_state_dump.h"
#include "intel_display_debugfs.h"
+#include "intel_display_debugfs_params.h"
#include "intel_display_power.h"
#include "intel_display_power_well.h"
#include "intel_display_types.h"
@@ -1098,6 +1099,7 @@ void intel_display_debugfs_register(struct drm_i915_private *i915)
intel_hpd_debugfs_register(i915);
intel_psr_debugfs_register(i915);
intel_wm_debugfs_register(i915);
+ intel_display_debugfs_params(i915);
}
static int i915_panel_show(struct seq_file *m, void *data)
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs_params.c b/drivers/gpu/drm/i915/display/intel_display_debugfs_params.c
new file mode 100644
index 000000000000..b7e68eb62452
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs_params.c
@@ -0,0 +1,176 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2023 Intel Corporation
+ */
+
+#include <linux/kernel.h>
+
+#include <drm/drm_drv.h>
+
+#include "intel_display_debugfs_params.h"
+#include "i915_drv.h"
+#include "intel_display_params.h"
+
+/* int param */
+static int intel_display_param_int_show(struct seq_file *m, void *data)
+{
+ int *value = m->private;
+
+ seq_printf(m, "%d\n", *value);
+
+ return 0;
+}
+
+static int intel_display_param_int_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, intel_display_param_int_show, inode->i_private);
+}
+
+static ssize_t intel_display_param_int_write(struct file *file,
+ const char __user *ubuf, size_t len,
+ loff_t *offp)
+{
+ struct seq_file *m = file->private_data;
+ int *value = m->private;
+ int ret;
+
+ ret = kstrtoint_from_user(ubuf, len, 0, value);
+ if (ret) {
+ /* support boolean values too */
+ bool b;
+
+ ret = kstrtobool_from_user(ubuf, len, &b);
+ if (!ret)
+ *value = b;
+ }
+
+ return ret ?: len;
+}
+
+static const struct file_operations intel_display_param_int_fops = {
+ .owner = THIS_MODULE,
+ .open = intel_display_param_int_open,
+ .read = seq_read,
+ .write = intel_display_param_int_write,
+ .llseek = default_llseek,
+ .release = single_release,
+};
+
+static const struct file_operations intel_display_param_int_fops_ro = {
+ .owner = THIS_MODULE,
+ .open = intel_display_param_int_open,
+ .read = seq_read,
+ .llseek = default_llseek,
+ .release = single_release,
+};
+
+/* unsigned int param */
+static int intel_display_param_uint_show(struct seq_file *m, void *data)
+{
+ unsigned int *value = m->private;
+
+ seq_printf(m, "%u\n", *value);
+
+ return 0;
+}
+
+static int intel_display_param_uint_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, intel_display_param_uint_show, inode->i_private);
+}
+
+static ssize_t intel_display_param_uint_write(struct file *file,
+ const char __user *ubuf, size_t len,
+ loff_t *offp)
+{
+ struct seq_file *m = file->private_data;
+ unsigned int *value = m->private;
+ int ret;
+
+ ret = kstrtouint_from_user(ubuf, len, 0, value);
+ if (ret) {
+ /* support boolean values too */
+ bool b;
+
+ ret = kstrtobool_from_user(ubuf, len, &b);
+ if (!ret)
+ *value = b;
+ }
+
+ return ret ?: len;
+}
+
+static const struct file_operations intel_display_param_uint_fops = {
+ .owner = THIS_MODULE,
+ .open = intel_display_param_uint_open,
+ .read = seq_read,
+ .write = intel_display_param_uint_write,
+ .llseek = default_llseek,
+ .release = single_release,
+};
+
+static const struct file_operations intel_display_param_uint_fops_ro = {
+ .owner = THIS_MODULE,
+ .open = intel_display_param_uint_open,
+ .read = seq_read,
+ .llseek = default_llseek,
+ .release = single_release,
+};
+
+#define RO(mode) (((mode) & 0222) == 0)
+
+__maybe_unused static struct dentry *
+intel_display_debugfs_create_int(const char *name, umode_t mode,
+ struct dentry *parent, int *value)
+{
+ return debugfs_create_file_unsafe(name, mode, parent, value,
+ RO(mode) ? &intel_display_param_int_fops_ro :
+ &intel_display_param_int_fops);
+}
+
+__maybe_unused static struct dentry *
+intel_display_debugfs_create_uint(const char *name, umode_t mode,
+ struct dentry *parent, unsigned int *value)
+{
+ return debugfs_create_file_unsafe(name, mode, parent, value,
+ RO(mode) ? &intel_display_param_uint_fops_ro :
+ &intel_display_param_uint_fops);
+}
+
+#define _intel_display_param_create_file(parent, name, mode, valp) \
+ do { \
+ if (mode) \
+ _Generic(valp, \
+ bool * : debugfs_create_bool, \
+ int * : intel_display_debugfs_create_int, \
+ unsigned int * : intel_display_debugfs_create_uint, \
+ unsigned long * : debugfs_create_ulong, \
+ char ** : debugfs_create_str) \
+ (name, mode, parent, valp); \
+ } while (0)
+
+/* add a subdirectory with files for each intel display param */
+void intel_display_debugfs_params(struct drm_i915_private *i915)
+{
+ struct drm_minor *minor = i915->drm.primary;
+ struct dentry *dir;
+ char dirname[16];
+
+ snprintf(dirname, sizeof(dirname), "%s_params", i915->drm.driver->name);
+ dir = debugfs_lookup(dirname, minor->debugfs_root);
+ if (!dir)
+ dir = debugfs_create_dir(dirname, minor->debugfs_root);
+ if (IS_ERR(dir))
+ return;
+
+ /*
+ * Note: We could create files for params needing special handling
+ * here. Set mode in params to 0 to skip the generic create file, or
+ * just let the generic create file fail silently with -EEXIST.
+ */
+
+#define REGISTER(T, x, unused, mode, ...) _intel_display_param_create_file( \
+ dir, #x, mode, &i915->display.params.x);
+ INTEL_DISPLAY_PARAMS_FOR_EACH(REGISTER);
+#undef REGISTER
+}
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs_params.h b/drivers/gpu/drm/i915/display/intel_display_debugfs_params.h
new file mode 100644
index 000000000000..1e9945a4044c
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs_params.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2023 Intel Corporation
+ */
+
+#ifndef __INTEL_DISPLAY_DEBUGFS_PARAMS__
+#define __INTEL_DISPLAY_DEBUGFS_PARAMS__
+
+struct drm_i915_private;
+
+void intel_display_debugfs_params(struct drm_i915_private *i915);
+
+#endif /* __INTEL_DISPLAY_DEBUGFS_PARAMS__ */
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index 2b1ec23ba9c3..e80842d1e7c7 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -12,6 +12,7 @@
#include "intel_de.h"
#include "intel_display.h"
#include "intel_display_device.h"
+#include "intel_display_params.h"
#include "intel_display_power.h"
#include "intel_display_reg_defs.h"
#include "intel_fbc.h"
@@ -937,6 +938,13 @@ void intel_display_device_probe(struct drm_i915_private *i915)
DISPLAY_RUNTIME_INFO(i915)->ip.rel = rel;
DISPLAY_RUNTIME_INFO(i915)->ip.step = step;
}
+
+ intel_display_params_copy(&i915->display.params);
+}
+
+void intel_display_device_remove(struct drm_i915_private *i915)
+{
+ intel_display_params_free(&i915->display.params);
}
static void __intel_display_device_info_runtime_init(struct drm_i915_private *i915)
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index 5b5c0e53307f..4299cc452e05 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -161,6 +161,7 @@ struct intel_display_device_info {
bool intel_display_device_enabled(struct drm_i915_private *i915);
void intel_display_device_probe(struct drm_i915_private *i915);
+void intel_display_device_remove(struct drm_i915_private *i915);
void intel_display_device_info_runtime_init(struct drm_i915_private *i915);
void intel_display_device_info_print(const struct intel_display_device_info *info,
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
new file mode 100644
index 000000000000..91953ae27144
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -0,0 +1,71 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2023 Intel Corporation
+ */
+
+#include "intel_display_params.h"
+#include "i915_drv.h"
+
+#define intel_display_param_named(name, T, perm, desc) \
+ module_param_named(name, intel_display_modparams.name, T, perm); \
+ MODULE_PARM_DESC(name, desc)
+#define intel_display_param_named_unsafe(name, T, perm, desc) \
+ module_param_named_unsafe(name, intel_display_modparams.name, T, perm); \
+ MODULE_PARM_DESC(name, desc)
+
+static struct intel_display_params intel_display_modparams __read_mostly = {
+#define MEMBER(T, member, value, ...) .member = (value),
+ INTEL_DISPLAY_PARAMS_FOR_EACH(MEMBER)
+#undef MEMBER
+};
+/*
+ * Note: As a rule, keep module parameter sysfs permissions read-only
+ * 0400. Runtime changes are only supported through i915 debugfs.
+ *
+ * For any exceptions requiring write access and runtime changes through module
+ * parameter sysfs, prevent debugfs file creation by setting the parameter's
+ * debugfs mode to 0.
+ */
+
+__maybe_unused static void _param_dup_charp(char **valp)
+{
+ *valp = kstrdup(*valp ? *valp : "", GFP_ATOMIC);
+}
+
+__maybe_unused static void _param_nop(void *valp)
+{
+}
+
+#define _param_dup(valp) \
+ _Generic(valp, \
+ char ** : _param_dup_charp, \
+ default : _param_nop) \
+ (valp)
+
+void intel_display_params_copy(struct intel_display_params *dest)
+{
+ *dest = intel_display_modparams;
+#define DUP(T, x, ...) _param_dup(&dest->x);
+ INTEL_DISPLAY_PARAMS_FOR_EACH(DUP);
+#undef DUP
+}
+
+__maybe_unused static void _param_free_charp(char **valp)
+{
+ kfree(*valp);
+ *valp = NULL;
+}
+
+#define _param_free(valp) \
+ _Generic(valp, \
+ char ** : _param_free_charp, \
+ default : _param_nop) \
+ (valp)
+
+/* free the allocated members, *not* the passed in params itself */
+void intel_display_params_free(struct intel_display_params *params)
+{
+#define FREE(T, x, ...) _param_free(¶ms->x);
+ INTEL_DISPLAY_PARAMS_FOR_EACH(FREE);
+#undef FREE
+}
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
new file mode 100644
index 000000000000..9f4f45d410a3
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -0,0 +1,34 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2023 Intel Corporation
+ */
+
+#ifndef _INTEL_DISPLAY_PARAMS_H_
+#define _INTEL_DISPLAY_PARAMS_H_
+
+struct drm_printer;
+
+/*
+ * Invoke param, a function-like macro, for each intel display param, with
+ * arguments:
+ *
+ * param(type, name, value, mode)
+ *
+ * type: parameter type, one of {bool, int, unsigned int, unsigned long, char *}
+ * name: name of the parameter
+ * value: initial/default value of the parameter
+ * mode: debugfs file permissions, one of {0400, 0600, 0}, use 0 to not create
+ * debugfs file
+ */
+#define INTEL_DISPLAY_PARAMS_FOR_EACH(param) /* empty define to avoid build failure */
+
+#define MEMBER(T, member, ...) T member;
+struct intel_display_params {
+ INTEL_DISPLAY_PARAMS_FOR_EACH(MEMBER);
+};
+#undef MEMBER
+
+void intel_display_params_copy(struct intel_display_params *dest);
+void intel_display_params_free(struct intel_display_params *params);
+
+#endif
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index 8a0e2c745e1f..80e85cadb9a2 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -909,6 +909,8 @@ static void i915_driver_release(struct drm_device *dev)
intel_runtime_pm_driver_release(rpm);
i915_driver_late_release(dev_priv);
+
+ intel_display_device_remove(dev_priv);
}
static int i915_driver_open(struct drm_device *dev, struct drm_file *file)
--
2.34.1
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Intel-gfx] [PATCH v4 02/23] drm/i915/display: Dump also display parameters
2023-10-24 12:40 [Intel-gfx] [PATCH v4 00/23] Framework for display parameters Jouni Högander
2023-10-24 12:40 ` [Intel-gfx] [PATCH v4 01/23] drm/i915/display: Add framework to add parameters specific to display Jouni Högander
@ 2023-10-24 12:40 ` Jouni Högander
2023-10-24 12:40 ` [Intel-gfx] [PATCH v4 03/23] drm/i915/display: Move enable_fbc module parameter under display Jouni Högander
` (25 subsequent siblings)
27 siblings, 0 replies; 30+ messages in thread
From: Jouni Högander @ 2023-10-24 12:40 UTC (permalink / raw)
To: intel-gfx; +Cc: Luca Coelho
GPU error dump contained all module parameters. If we are moving
display parameters to intel_display_params.[ch] they are not dumped
into GPU error dump. This patch is adding moved display parameters
back to GPU error dump. Display parameters are also included in
i915_capabilities
v2: Add parameters to i915_capabilities as well
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
---
.../drm/i915/display/intel_display_params.c | 57 +++++++++++++++++++
.../drm/i915/display/intel_display_params.h | 3 +
drivers/gpu/drm/i915/i915_debugfs.c | 3 +
drivers/gpu/drm/i915/i915_gpu_error.c | 3 +
drivers/gpu/drm/i915/i915_gpu_error.h | 2 +
5 files changed, 68 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index 91953ae27144..11ee73a98b5b 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -27,6 +27,63 @@ static struct intel_display_params intel_display_modparams __read_mostly = {
* debugfs mode to 0.
*/
+__maybe_unused
+static void _param_print_bool(struct drm_printer *p, const char *driver_name,
+ const char *name, bool val)
+{
+ drm_printf(p, "%s.%s=%s\n", driver_name, name, str_yes_no(val));
+}
+
+__maybe_unused
+static void _param_print_int(struct drm_printer *p, const char *driver_name,
+ const char *name, int val)
+{
+ drm_printf(p, "%s.%s=%d\n", driver_name, name, val);
+}
+
+__maybe_unused
+static void _param_print_uint(struct drm_printer *p, const char *driver_name,
+ const char *name, unsigned int val)
+{
+ drm_printf(p, "%s.%s=%u\n", driver_name, name, val);
+}
+
+__maybe_unused
+static void _param_print_ulong(struct drm_printer *p, const char *driver_name,
+ const char *name, unsigned long val)
+{
+ drm_printf(p, "%s.%s=%lu\n", driver_name, name, val);
+}
+
+__maybe_unused
+static void _param_print_charp(struct drm_printer *p, const char *driver_name,
+ const char *name, const char *val)
+{
+ drm_printf(p, "%s.%s=%s\n", driver_name, name, val);
+}
+
+#define _param_print(p, driver_name, name, val) \
+ _Generic(val, \
+ bool : _param_print_bool, \
+ int : _param_print_int, \
+ unsigned int : _param_print_uint, \
+ unsigned long : _param_print_ulong, \
+ char * : _param_print_charp)(p, driver_name, name, val)
+
+/**
+ * intel_display_params_dump - dump intel display modparams
+ * @i915: i915 device
+ * @p: the &drm_printer
+ *
+ * Pretty printer for i915 modparams.
+ */
+void intel_display_params_dump(struct drm_i915_private *i915, struct drm_printer *p)
+{
+#define PRINT(T, x, ...) _param_print(p, i915->drm.driver->name, #x, i915->display.params.x);
+ INTEL_DISPLAY_PARAMS_FOR_EACH(PRINT);
+#undef PRINT
+}
+
__maybe_unused static void _param_dup_charp(char **valp)
{
*valp = kstrdup(*valp ? *valp : "", GFP_ATOMIC);
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index 9f4f45d410a3..eac66042da4d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -7,6 +7,7 @@
#define _INTEL_DISPLAY_PARAMS_H_
struct drm_printer;
+struct drm_i915_private;
/*
* Invoke param, a function-like macro, for each intel display param, with
@@ -28,6 +29,8 @@ struct intel_display_params {
};
#undef MEMBER
+void intel_display_params_dump(struct drm_i915_private *i915,
+ struct drm_printer *p);
void intel_display_params_copy(struct intel_display_params *dest);
void intel_display_params_free(struct intel_display_params *params);
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index e9b79c2c37d8..af0077f6a6d0 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -32,6 +32,8 @@
#include <drm/drm_debugfs.h>
+#include "display/intel_display_params.h"
+
#include "gem/i915_gem_context.h"
#include "gt/intel_gt.h"
#include "gt/intel_gt_buffer_pool.h"
@@ -74,6 +76,7 @@ static int i915_capabilities(struct seq_file *m, void *data)
kernel_param_lock(THIS_MODULE);
i915_params_dump(&i915->params, &p);
+ intel_display_params_dump(i915, &p);
kernel_param_unlock(THIS_MODULE);
return 0;
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index b4e31e59c799..8275f9b6a47d 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -660,6 +660,7 @@ static void err_print_params(struct drm_i915_error_state_buf *m,
struct drm_printer p = i915_error_printer(m);
i915_params_dump(params, &p);
+ intel_display_params_dump(m->i915, &p);
}
static void err_print_pciid(struct drm_i915_error_state_buf *m,
@@ -1027,6 +1028,7 @@ static void i915_vma_coredump_free(struct i915_vma_coredump *vma)
static void cleanup_params(struct i915_gpu_coredump *error)
{
i915_params_free(&error->params);
+ intel_display_params_free(&error->display_params);
}
static void cleanup_uc(struct intel_uc_coredump *uc)
@@ -1988,6 +1990,7 @@ static void capture_gen(struct i915_gpu_coredump *error)
error->suspend_count = i915->suspend_count;
i915_params_copy(&error->params, &i915->params);
+ intel_display_params_copy(&error->display_params);
memcpy(&error->device_info,
INTEL_INFO(i915),
sizeof(error->device_info));
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.h b/drivers/gpu/drm/i915/i915_gpu_error.h
index 9f5971f5e980..4ce227f7e1e1 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.h
+++ b/drivers/gpu/drm/i915/i915_gpu_error.h
@@ -15,6 +15,7 @@
#include <drm/drm_mm.h>
#include "display/intel_display_device.h"
+#include "display/intel_display_params.h"
#include "gt/intel_engine.h"
#include "gt/intel_gt_types.h"
#include "gt/uc/intel_uc_fw.h"
@@ -214,6 +215,7 @@ struct i915_gpu_coredump {
struct intel_display_runtime_info display_runtime_info;
struct intel_driver_caps driver_caps;
struct i915_params params;
+ struct intel_display_params display_params;
struct intel_overlay_error_state *overlay;
--
2.34.1
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Intel-gfx] [PATCH v4 03/23] drm/i915/display: Move enable_fbc module parameter under display
2023-10-24 12:40 [Intel-gfx] [PATCH v4 00/23] Framework for display parameters Jouni Högander
2023-10-24 12:40 ` [Intel-gfx] [PATCH v4 01/23] drm/i915/display: Add framework to add parameters specific to display Jouni Högander
2023-10-24 12:40 ` [Intel-gfx] [PATCH v4 02/23] drm/i915/display: Dump also display parameters Jouni Högander
@ 2023-10-24 12:40 ` Jouni Högander
2023-10-24 12:40 ` [Intel-gfx] [PATCH v4 04/23] drm/i915/display: Move psr related module parameters " Jouni Högander
` (24 subsequent siblings)
27 siblings, 0 replies; 30+ messages in thread
From: Jouni Högander @ 2023-10-24 12:40 UTC (permalink / raw)
To: intel-gfx; +Cc: Luca Coelho
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
---
drivers/gpu/drm/i915/display/i9xx_wm.c | 2 +-
drivers/gpu/drm/i915/display/intel_display_params.c | 4 ++++
drivers/gpu/drm/i915/display/intel_display_params.h | 3 ++-
drivers/gpu/drm/i915/display/intel_fbc.c | 10 +++++-----
drivers/gpu/drm/i915/i915_params.c | 4 ----
drivers/gpu/drm/i915/i915_params.h | 1 -
6 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
index af0c79a4c9a4..b37c0d02d500 100644
--- a/drivers/gpu/drm/i915/display/i9xx_wm.c
+++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
@@ -2993,7 +2993,7 @@ static void ilk_wm_merge(struct drm_i915_private *dev_priv,
/* ILK: LP2+ must be disabled when FBC WM is disabled but FBC enabled */
if (DISPLAY_VER(dev_priv) == 5 && HAS_FBC(dev_priv) &&
- dev_priv->params.enable_fbc && !merged->fbc_wm_enabled) {
+ dev_priv->display.params.enable_fbc && !merged->fbc_wm_enabled) {
for (level = 2; level < num_levels; level++) {
struct intel_wm_level *wm = &merged->wm[level];
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index 11ee73a98b5b..330613cd64db 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -27,6 +27,10 @@ static struct intel_display_params intel_display_modparams __read_mostly = {
* debugfs mode to 0.
*/
+intel_display_param_named_unsafe(enable_fbc, int, 0400,
+ "Enable frame buffer compression for power savings "
+ "(default: -1 (use per-chip default))");
+
__maybe_unused
static void _param_print_bool(struct drm_printer *p, const char *driver_name,
const char *name, bool val)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index eac66042da4d..198b03da8055 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -21,7 +21,8 @@ struct drm_i915_private;
* mode: debugfs file permissions, one of {0400, 0600, 0}, use 0 to not create
* debugfs file
*/
-#define INTEL_DISPLAY_PARAMS_FOR_EACH(param) /* empty define to avoid build failure */
+#define INTEL_DISPLAY_PARAMS_FOR_EACH(param) \
+ param(int, enable_fbc, -1, 0600) \
#define MEMBER(T, member, ...) T member;
struct intel_display_params {
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 4820d21cc942..bde12fe62275 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1174,7 +1174,7 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
return 0;
}
- if (!i915->params.enable_fbc) {
+ if (!i915->display.params.enable_fbc) {
plane_state->no_fbc_reason = "disabled per module param or by default";
return 0;
}
@@ -1751,8 +1751,8 @@ void intel_fbc_handle_fifo_underrun_irq(struct drm_i915_private *i915)
*/
static int intel_sanitize_fbc_option(struct drm_i915_private *i915)
{
- if (i915->params.enable_fbc >= 0)
- return !!i915->params.enable_fbc;
+ if (i915->display.params.enable_fbc >= 0)
+ return !!i915->display.params.enable_fbc;
if (!HAS_FBC(i915))
return 0;
@@ -1824,9 +1824,9 @@ void intel_fbc_init(struct drm_i915_private *i915)
if (need_fbc_vtd_wa(i915))
DISPLAY_RUNTIME_INFO(i915)->fbc_mask = 0;
- i915->params.enable_fbc = intel_sanitize_fbc_option(i915);
+ i915->display.params.enable_fbc = intel_sanitize_fbc_option(i915);
drm_dbg_kms(&i915->drm, "Sanitized enable_fbc value: %d\n",
- i915->params.enable_fbc);
+ i915->display.params.enable_fbc);
for_each_fbc_id(i915, fbc_id)
i915->display.fbc[fbc_id] = intel_fbc_create(i915, fbc_id);
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 036c4c3ed6ed..42700b854b79 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -72,10 +72,6 @@ i915_param_named_unsafe(enable_dc, int, 0400,
"(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6; "
"3=up to DC5 with DC3CO; 4=up to DC6 with DC3CO)");
-i915_param_named_unsafe(enable_fbc, int, 0400,
- "Enable frame buffer compression for power savings "
- "(default: -1 (use per-chip default))");
-
i915_param_named_unsafe(lvds_channel_mode, int, 0400,
"Specify LVDS channel mode "
"(0=probe BIOS [default], 1=single-channel, 2=dual-channel)");
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index d5194b039aab..e674de29f92c 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -52,7 +52,6 @@ struct drm_printer;
param(int, panel_use_ssc, -1, 0600) \
param(int, vbt_sdvo_panel_type, -1, 0400) \
param(int, enable_dc, -1, 0400) \
- param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, enable_dpt, true, 0400) \
param(bool, psr_safest_params, false, 0400) \
--
2.34.1
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Intel-gfx] [PATCH v4 04/23] drm/i915/display: Move psr related module parameters under display
2023-10-24 12:40 [Intel-gfx] [PATCH v4 00/23] Framework for display parameters Jouni Högander
` (2 preceding siblings ...)
2023-10-24 12:40 ` [Intel-gfx] [PATCH v4 03/23] drm/i915/display: Move enable_fbc module parameter under display Jouni Högander
@ 2023-10-24 12:40 ` Jouni Högander
2023-10-24 12:40 ` [Intel-gfx] [PATCH v4 05/23] drm/i915/display: Move vbt_firmware module parameter " Jouni Högander
` (23 subsequent siblings)
27 siblings, 0 replies; 30+ messages in thread
From: Jouni Högander @ 2023-10-24 12:40 UTC (permalink / raw)
To: intel-gfx; +Cc: Luca Coelho
Move psr related module parameters under display. Also fix error in
enable_psr2_sel_fetch module parameter descrtiption. It was saying disabled
by default while it's vice versa. Also psr_safest_params was missing
default value in description. This is now added.
v2:
- Fix enable_psr2_sel_fetch description.
- Add default value into psr_safest_params description.
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
---
.../gpu/drm/i915/display/intel_display_params.c | 16 ++++++++++++++++
.../gpu/drm/i915/display/intel_display_params.h | 5 +++++
drivers/gpu/drm/i915/display/intel_psr.c | 14 +++++++-------
drivers/gpu/drm/i915/i915_params.c | 15 ---------------
drivers/gpu/drm/i915/i915_params.h | 3 ---
5 files changed, 28 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index 330613cd64db..0e86d0d10bfa 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -31,6 +31,22 @@ intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
+intel_display_param_named_unsafe(enable_psr, int, 0400,
+ "Enable PSR "
+ "(0=disabled, 1=enable up to PSR1, 2=enable up to PSR2) "
+ "Default: -1 (use per-chip default)");
+
+intel_display_param_named(psr_safest_params, bool, 0400,
+ "Replace PSR VBT parameters by the safest and not optimal ones. This "
+ "is helpful to detect if PSR issues are related to bad values set in "
+ " VBT. (0=use VBT parameters, 1=use safest parameters)"
+ "Default: 0");
+
+intel_display_param_named_unsafe(enable_psr2_sel_fetch, bool, 0400,
+ "Enable PSR2 selective fetch "
+ "(0=disabled, 1=enabled) "
+ "Default: 1");
+
__maybe_unused
static void _param_print_bool(struct drm_printer *p, const char *driver_name,
const char *name, bool val)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index 198b03da8055..45a4d38d13e7 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -6,6 +6,8 @@
#ifndef _INTEL_DISPLAY_PARAMS_H_
#define _INTEL_DISPLAY_PARAMS_H_
+#include <linux/types.h>
+
struct drm_printer;
struct drm_i915_private;
@@ -23,6 +25,9 @@ struct drm_i915_private;
*/
#define INTEL_DISPLAY_PARAMS_FOR_EACH(param) \
param(int, enable_fbc, -1, 0600) \
+ param(int, enable_psr, -1, 0600) \
+ param(bool, psr_safest_params, false, 0400) \
+ param(bool, enable_psr2_sel_fetch, true, 0400) \
#define MEMBER(T, member, ...) T member;
struct intel_display_params {
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 4f1f31fc9529..ecd24a0b86cb 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -179,9 +179,9 @@ static bool psr_global_enabled(struct intel_dp *intel_dp)
switch (intel_dp->psr.debug & I915_PSR_DEBUG_MODE_MASK) {
case I915_PSR_DEBUG_DEFAULT:
- if (i915->params.enable_psr == -1)
+ if (i915->display.params.enable_psr == -1)
return connector->panel.vbt.psr.enable;
- return i915->params.enable_psr;
+ return i915->display.params.enable_psr;
case I915_PSR_DEBUG_DISABLE:
return false;
default:
@@ -198,7 +198,7 @@ static bool psr2_global_enabled(struct intel_dp *intel_dp)
case I915_PSR_DEBUG_FORCE_PSR1:
return false;
default:
- if (i915->params.enable_psr == 1)
+ if (i915->display.params.enable_psr == 1)
return false;
return true;
}
@@ -606,7 +606,7 @@ static u32 intel_psr1_get_tp_time(struct intel_dp *intel_dp)
if (DISPLAY_VER(dev_priv) >= 11)
val |= EDP_PSR_TP4_TIME_0us;
- if (dev_priv->params.psr_safest_params) {
+ if (dev_priv->display.params.psr_safest_params) {
val |= EDP_PSR_TP1_TIME_2500us;
val |= EDP_PSR_TP2_TP3_TIME_2500us;
goto check_tp3_sel;
@@ -700,7 +700,7 @@ static u32 intel_psr2_get_tp_time(struct intel_dp *intel_dp)
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
u32 val = 0;
- if (dev_priv->params.psr_safest_params)
+ if (dev_priv->display.params.psr_safest_params)
return EDP_PSR2_TP2_TIME_2500us;
if (connector->panel.vbt.psr.psr2_tp2_tp3_wakeup_time_us >= 0 &&
@@ -943,7 +943,7 @@ static bool intel_psr2_sel_fetch_config_valid(struct intel_dp *intel_dp,
{
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
- if (!dev_priv->params.enable_psr2_sel_fetch &&
+ if (!dev_priv->display.params.enable_psr2_sel_fetch &&
intel_dp->psr.debug != I915_PSR_DEBUG_ENABLE_SEL_FETCH) {
drm_dbg_kms(&dev_priv->drm,
"PSR2 sel fetch not enabled, disabled by parameter\n");
@@ -1056,7 +1056,7 @@ static bool _compute_psr2_wake_times(struct intel_dp *intel_dp,
fast_wake_lines > max_wake_lines)
return false;
- if (i915->params.psr_safest_params)
+ if (i915->display.params.psr_safest_params)
io_wake_lines = fast_wake_lines = max_wake_lines;
/* According to Bspec lower limit should be set as 7 lines. */
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 42700b854b79..c65e3314ae48 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -102,21 +102,6 @@ i915_param_named_unsafe(enable_hangcheck, bool, 0400,
"WARNING: Disabling this can cause system wide hangs. "
"(default: true)");
-i915_param_named_unsafe(enable_psr, int, 0400,
- "Enable PSR "
- "(0=disabled, 1=enable up to PSR1, 2=enable up to PSR2) "
- "Default: -1 (use per-chip default)");
-
-i915_param_named(psr_safest_params, bool, 0400,
- "Replace PSR VBT parameters by the safest and not optimal ones. This "
- "is helpful to detect if PSR issues are related to bad values set in "
- " VBT. (0=use VBT parameters, 1=use safest parameters)");
-
-i915_param_named_unsafe(enable_psr2_sel_fetch, bool, 0400,
- "Enable PSR2 selective fetch "
- "(0=disabled, 1=enabled) "
- "Default: 0");
-
i915_param_named_unsafe(enable_sagv, bool, 0600,
"Enable system agent voltage/frequency scaling (SAGV) (default: true)");
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index e674de29f92c..47a05c4a8e89 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -52,10 +52,7 @@ struct drm_printer;
param(int, panel_use_ssc, -1, 0600) \
param(int, vbt_sdvo_panel_type, -1, 0400) \
param(int, enable_dc, -1, 0400) \
- param(int, enable_psr, -1, 0600) \
param(bool, enable_dpt, true, 0400) \
- param(bool, psr_safest_params, false, 0400) \
- param(bool, enable_psr2_sel_fetch, true, 0400) \
param(bool, enable_sagv, true, 0600) \
param(int, disable_power_well, -1, 0400) \
param(int, enable_ips, 1, 0600) \
--
2.34.1
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Intel-gfx] [PATCH v4 05/23] drm/i915/display: Move vbt_firmware module parameter under display
2023-10-24 12:40 [Intel-gfx] [PATCH v4 00/23] Framework for display parameters Jouni Högander
` (3 preceding siblings ...)
2023-10-24 12:40 ` [Intel-gfx] [PATCH v4 04/23] drm/i915/display: Move psr related module parameters " Jouni Högander
@ 2023-10-24 12:40 ` Jouni Högander
2023-10-24 12:40 ` [Intel-gfx] [PATCH v4 06/23] drm/i915/display: Move lvds_channel_mode " Jouni Högander
` (22 subsequent siblings)
27 siblings, 0 replies; 30+ messages in thread
From: Jouni Högander @ 2023-10-24 12:40 UTC (permalink / raw)
To: intel-gfx; +Cc: Luca Coelho
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/display/intel_opregion.c | 2 +-
drivers/gpu/drm/i915/i915_params.c | 3 ---
drivers/gpu/drm/i915/i915_params.h | 1 -
5 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index 0e86d0d10bfa..d00ea5cda432 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -27,6 +27,9 @@ static struct intel_display_params intel_display_modparams __read_mostly = {
* debugfs mode to 0.
*/
+intel_display_param_named_unsafe(vbt_firmware, charp, 0400,
+ "Load VBT from specified file under /lib/firmware");
+
intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index 45a4d38d13e7..e51e8a1960eb 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -24,6 +24,7 @@ struct drm_i915_private;
* debugfs file
*/
#define INTEL_DISPLAY_PARAMS_FOR_EACH(param) \
+ param(char *, vbt_firmware, NULL, 0400) \
param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c
index 84078fb82b2f..1ce785db6a5e 100644
--- a/drivers/gpu/drm/i915/display/intel_opregion.c
+++ b/drivers/gpu/drm/i915/display/intel_opregion.c
@@ -841,7 +841,7 @@ static int intel_load_vbt_firmware(struct drm_i915_private *dev_priv)
{
struct intel_opregion *opregion = &dev_priv->display.opregion;
const struct firmware *fw = NULL;
- const char *name = dev_priv->params.vbt_firmware;
+ const char *name = dev_priv->display.params.vbt_firmware;
int ret;
if (!name || !*name)
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index c65e3314ae48..9d0535d774c9 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -87,9 +87,6 @@ i915_param_named_unsafe(vbt_sdvo_panel_type, int, 0400,
i915_param_named_unsafe(reset, uint, 0400,
"Attempt GPU resets (0=disabled, 1=full gpu reset, 2=engine reset [default])");
-i915_param_named_unsafe(vbt_firmware, charp, 0400,
- "Load VBT from specified file under /lib/firmware");
-
#if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
i915_param_named(error_capture, bool, 0400,
"Record the GPU state following a hang. "
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index 47a05c4a8e89..37a1d31a233c 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -46,7 +46,6 @@ struct drm_printer;
* debugfs file
*/
#define I915_PARAMS_FOR_EACH(param) \
- param(char *, vbt_firmware, NULL, 0400) \
param(int, modeset, -1, 0400) \
param(int, lvds_channel_mode, 0, 0400) \
param(int, panel_use_ssc, -1, 0600) \
--
2.34.1
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Intel-gfx] [PATCH v4 06/23] drm/i915/display: Move lvds_channel_mode module parameter under display
2023-10-24 12:40 [Intel-gfx] [PATCH v4 00/23] Framework for display parameters Jouni Högander
` (4 preceding siblings ...)
2023-10-24 12:40 ` [Intel-gfx] [PATCH v4 05/23] drm/i915/display: Move vbt_firmware module parameter " Jouni Högander
@ 2023-10-24 12:40 ` Jouni Högander
2023-10-24 12:40 ` [Intel-gfx] [PATCH v4 07/23] drm/i915/display: Move panel_use_ssc " Jouni Högander
` (21 subsequent siblings)
27 siblings, 0 replies; 30+ messages in thread
From: Jouni Högander @ 2023-10-24 12:40 UTC (permalink / raw)
To: intel-gfx; +Cc: Luca Coelho
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_params.c | 4 ++++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/display/intel_lvds.c | 4 ++--
drivers/gpu/drm/i915/i915_params.c | 4 ----
drivers/gpu/drm/i915/i915_params.h | 1 -
5 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index d00ea5cda432..91e2b5056d63 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -30,6 +30,10 @@ static struct intel_display_params intel_display_modparams __read_mostly = {
intel_display_param_named_unsafe(vbt_firmware, charp, 0400,
"Load VBT from specified file under /lib/firmware");
+intel_display_param_named_unsafe(lvds_channel_mode, int, 0400,
+ "Specify LVDS channel mode "
+ "(0=probe BIOS [default], 1=single-channel, 2=dual-channel)");
+
intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index e51e8a1960eb..09bd6614b813 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -25,6 +25,7 @@ struct drm_i915_private;
*/
#define INTEL_DISPLAY_PARAMS_FOR_EACH(param) \
param(char *, vbt_firmware, NULL, 0400) \
+ param(int, lvds_channel_mode, 0, 0400) \
param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c b/drivers/gpu/drm/i915/display/intel_lvds.c
index 2a4ca7e65775..4b114fde57b1 100644
--- a/drivers/gpu/drm/i915/display/intel_lvds.c
+++ b/drivers/gpu/drm/i915/display/intel_lvds.c
@@ -794,8 +794,8 @@ static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
unsigned int val;
/* use the module option value if specified */
- if (i915->params.lvds_channel_mode > 0)
- return i915->params.lvds_channel_mode == 2;
+ if (i915->display.params.lvds_channel_mode > 0)
+ return i915->display.params.lvds_channel_mode == 2;
/* single channel LVDS is limited to 112 MHz */
if (fixed_mode->clock > 112999)
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 9d0535d774c9..ea55cc2c4854 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -72,10 +72,6 @@ i915_param_named_unsafe(enable_dc, int, 0400,
"(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6; "
"3=up to DC5 with DC3CO; 4=up to DC6 with DC3CO)");
-i915_param_named_unsafe(lvds_channel_mode, int, 0400,
- "Specify LVDS channel mode "
- "(0=probe BIOS [default], 1=single-channel, 2=dual-channel)");
-
i915_param_named_unsafe(panel_use_ssc, int, 0400,
"Use Spread Spectrum Clock with panels [LVDS/eDP] "
"(default: auto from VBT)");
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index 37a1d31a233c..03ec2c2b589d 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -47,7 +47,6 @@ struct drm_printer;
*/
#define I915_PARAMS_FOR_EACH(param) \
param(int, modeset, -1, 0400) \
- param(int, lvds_channel_mode, 0, 0400) \
param(int, panel_use_ssc, -1, 0600) \
param(int, vbt_sdvo_panel_type, -1, 0400) \
param(int, enable_dc, -1, 0400) \
--
2.34.1
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Intel-gfx] [PATCH v4 07/23] drm/i915/display: Move panel_use_ssc module parameter under display
2023-10-24 12:40 [Intel-gfx] [PATCH v4 00/23] Framework for display parameters Jouni Högander
` (5 preceding siblings ...)
2023-10-24 12:40 ` [Intel-gfx] [PATCH v4 06/23] drm/i915/display: Move lvds_channel_mode " Jouni Högander
@ 2023-10-24 12:40 ` Jouni Högander
2023-10-24 12:40 ` [Intel-gfx] [PATCH v4 08/23] drm/i915/display: Move vbt_sdvo_panel_type " Jouni Högander
` (20 subsequent siblings)
27 siblings, 0 replies; 30+ messages in thread
From: Jouni Högander @ 2023-10-24 12:40 UTC (permalink / raw)
To: intel-gfx; +Cc: Luca Coelho
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_params.c | 4 ++++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/display/intel_panel.c | 4 ++--
drivers/gpu/drm/i915/i915_params.c | 4 ----
drivers/gpu/drm/i915/i915_params.h | 1 -
5 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index 91e2b5056d63..0813adfa5651 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -34,6 +34,10 @@ intel_display_param_named_unsafe(lvds_channel_mode, int, 0400,
"Specify LVDS channel mode "
"(0=probe BIOS [default], 1=single-channel, 2=dual-channel)");
+intel_display_param_named_unsafe(panel_use_ssc, int, 0400,
+ "Use Spread Spectrum Clock with panels [LVDS/eDP] "
+ "(default: auto from VBT)");
+
intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index 09bd6614b813..ceed4af192c9 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -26,6 +26,7 @@ struct drm_i915_private;
#define INTEL_DISPLAY_PARAMS_FOR_EACH(param) \
param(char *, vbt_firmware, NULL, 0400) \
param(int, lvds_channel_mode, 0, 0400) \
+ param(int, panel_use_ssc, -1, 0600) \
param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
index 483beedac5b8..0d8e5320a4f8 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.c
+++ b/drivers/gpu/drm/i915/display/intel_panel.c
@@ -46,8 +46,8 @@
bool intel_panel_use_ssc(struct drm_i915_private *i915)
{
- if (i915->params.panel_use_ssc >= 0)
- return i915->params.panel_use_ssc != 0;
+ if (i915->display.params.panel_use_ssc >= 0)
+ return i915->display.params.panel_use_ssc != 0;
return i915->display.vbt.lvds_use_ssc &&
!intel_has_quirk(i915, QUIRK_LVDS_SSC_DISABLE);
}
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index ea55cc2c4854..4123424b2c2e 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -72,10 +72,6 @@ i915_param_named_unsafe(enable_dc, int, 0400,
"(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6; "
"3=up to DC5 with DC3CO; 4=up to DC6 with DC3CO)");
-i915_param_named_unsafe(panel_use_ssc, int, 0400,
- "Use Spread Spectrum Clock with panels [LVDS/eDP] "
- "(default: auto from VBT)");
-
i915_param_named_unsafe(vbt_sdvo_panel_type, int, 0400,
"Override/Ignore selection of SDVO panel mode in the VBT "
"(-2=ignore, -1=auto [default], index in VBT BIOS table)");
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index 03ec2c2b589d..0bd365889e73 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -47,7 +47,6 @@ struct drm_printer;
*/
#define I915_PARAMS_FOR_EACH(param) \
param(int, modeset, -1, 0400) \
- param(int, panel_use_ssc, -1, 0600) \
param(int, vbt_sdvo_panel_type, -1, 0400) \
param(int, enable_dc, -1, 0400) \
param(bool, enable_dpt, true, 0400) \
--
2.34.1
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Intel-gfx] [PATCH v4 08/23] drm/i915/display: Move vbt_sdvo_panel_type module parameter under display
2023-10-24 12:40 [Intel-gfx] [PATCH v4 00/23] Framework for display parameters Jouni Högander
` (6 preceding siblings ...)
2023-10-24 12:40 ` [Intel-gfx] [PATCH v4 07/23] drm/i915/display: Move panel_use_ssc " Jouni Högander
@ 2023-10-24 12:40 ` Jouni Högander
2023-10-24 12:40 ` [Intel-gfx] [PATCH v4 09/23] drm/i915/display: Move enable_dc " Jouni Högander
` (19 subsequent siblings)
27 siblings, 0 replies; 30+ messages in thread
From: Jouni Högander @ 2023-10-24 12:40 UTC (permalink / raw)
To: intel-gfx; +Cc: Luca Coelho
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
---
drivers/gpu/drm/i915/display/intel_bios.c | 2 +-
drivers/gpu/drm/i915/display/intel_display_params.c | 4 ++++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/i915_params.c | 4 ----
drivers/gpu/drm/i915/i915_params.h | 1 -
5 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 4e8f1e91bb08..70c0491aac42 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -1116,7 +1116,7 @@ parse_sdvo_panel_data(struct drm_i915_private *i915,
struct drm_display_mode *panel_fixed_mode;
int index;
- index = i915->params.vbt_sdvo_panel_type;
+ index = i915->display.params.vbt_sdvo_panel_type;
if (index == -2) {
drm_dbg_kms(&i915->drm,
"Ignore SDVO panel mode from BIOS VBT tables.\n");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index 0813adfa5651..d11c74ba001e 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -38,6 +38,10 @@ intel_display_param_named_unsafe(panel_use_ssc, int, 0400,
"Use Spread Spectrum Clock with panels [LVDS/eDP] "
"(default: auto from VBT)");
+intel_display_param_named_unsafe(vbt_sdvo_panel_type, int, 0400,
+ "Override/Ignore selection of SDVO panel mode in the VBT "
+ "(-2=ignore, -1=auto [default], index in VBT BIOS table)");
+
intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index ceed4af192c9..03dea0ba81d1 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -27,6 +27,7 @@ struct drm_i915_private;
param(char *, vbt_firmware, NULL, 0400) \
param(int, lvds_channel_mode, 0, 0400) \
param(int, panel_use_ssc, -1, 0600) \
+ param(int, vbt_sdvo_panel_type, -1, 0400) \
param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 4123424b2c2e..d0abcbd526a7 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -72,10 +72,6 @@ i915_param_named_unsafe(enable_dc, int, 0400,
"(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6; "
"3=up to DC5 with DC3CO; 4=up to DC6 with DC3CO)");
-i915_param_named_unsafe(vbt_sdvo_panel_type, int, 0400,
- "Override/Ignore selection of SDVO panel mode in the VBT "
- "(-2=ignore, -1=auto [default], index in VBT BIOS table)");
-
i915_param_named_unsafe(reset, uint, 0400,
"Attempt GPU resets (0=disabled, 1=full gpu reset, 2=engine reset [default])");
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index 0bd365889e73..1ea332dfbb5d 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -47,7 +47,6 @@ struct drm_printer;
*/
#define I915_PARAMS_FOR_EACH(param) \
param(int, modeset, -1, 0400) \
- param(int, vbt_sdvo_panel_type, -1, 0400) \
param(int, enable_dc, -1, 0400) \
param(bool, enable_dpt, true, 0400) \
param(bool, enable_sagv, true, 0600) \
--
2.34.1
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Intel-gfx] [PATCH v4 09/23] drm/i915/display: Move enable_dc module parameter under display
2023-10-24 12:40 [Intel-gfx] [PATCH v4 00/23] Framework for display parameters Jouni Högander
` (7 preceding siblings ...)
2023-10-24 12:40 ` [Intel-gfx] [PATCH v4 08/23] drm/i915/display: Move vbt_sdvo_panel_type " Jouni Högander
@ 2023-10-24 12:40 ` Jouni Högander
2023-10-24 12:40 ` [Intel-gfx] [PATCH v4 10/23] drm/i915/display: Move enable_dpt " Jouni Högander
` (18 subsequent siblings)
27 siblings, 0 replies; 30+ messages in thread
From: Jouni Högander @ 2023-10-24 12:40 UTC (permalink / raw)
To: intel-gfx; +Cc: Luca Coelho
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_params.c | 5 +++++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/display/intel_display_power.c | 2 +-
drivers/gpu/drm/i915/i915_params.c | 5 -----
drivers/gpu/drm/i915/i915_params.h | 1 -
5 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index d11c74ba001e..60fa0bbce77d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -42,6 +42,11 @@ intel_display_param_named_unsafe(vbt_sdvo_panel_type, int, 0400,
"Override/Ignore selection of SDVO panel mode in the VBT "
"(-2=ignore, -1=auto [default], index in VBT BIOS table)");
+intel_display_param_named_unsafe(enable_dc, int, 0400,
+ "Enable power-saving display C-states. "
+ "(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6; "
+ "3=up to DC5 with DC3CO; 4=up to DC6 with DC3CO)");
+
intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index 03dea0ba81d1..2cca06ad7d71 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -28,6 +28,7 @@ struct drm_i915_private;
param(int, lvds_channel_mode, 0, 0400) \
param(int, panel_use_ssc, -1, 0600) \
param(int, vbt_sdvo_panel_type, -1, 0400) \
+ param(int, enable_dc, -1, 0400) \
param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index e25785ae1c20..4832eb8da080 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -1020,7 +1020,7 @@ int intel_power_domains_init(struct drm_i915_private *dev_priv)
sanitize_disable_power_well_option(dev_priv,
dev_priv->params.disable_power_well);
power_domains->allowed_dc_mask =
- get_allowed_dc_mask(dev_priv, dev_priv->params.enable_dc);
+ get_allowed_dc_mask(dev_priv, dev_priv->display.params.enable_dc);
power_domains->target_dc_state =
sanitize_target_dc_state(dev_priv, DC_STATE_EN_UPTO_DC6);
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index d0abcbd526a7..3d370e43df3c 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -67,11 +67,6 @@ i915_param_named(modeset, int, 0400,
"Use kernel modesetting [KMS] (0=disable, "
"1=on, -1=force vga console preference [default])");
-i915_param_named_unsafe(enable_dc, int, 0400,
- "Enable power-saving display C-states. "
- "(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6; "
- "3=up to DC5 with DC3CO; 4=up to DC6 with DC3CO)");
-
i915_param_named_unsafe(reset, uint, 0400,
"Attempt GPU resets (0=disabled, 1=full gpu reset, 2=engine reset [default])");
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index 1ea332dfbb5d..c3487b9d6937 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -47,7 +47,6 @@ struct drm_printer;
*/
#define I915_PARAMS_FOR_EACH(param) \
param(int, modeset, -1, 0400) \
- param(int, enable_dc, -1, 0400) \
param(bool, enable_dpt, true, 0400) \
param(bool, enable_sagv, true, 0600) \
param(int, disable_power_well, -1, 0400) \
--
2.34.1
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Intel-gfx] [PATCH v4 10/23] drm/i915/display: Move enable_dpt module parameter under display
2023-10-24 12:40 [Intel-gfx] [PATCH v4 00/23] Framework for display parameters Jouni Högander
` (8 preceding siblings ...)
2023-10-24 12:40 ` [Intel-gfx] [PATCH v4 09/23] drm/i915/display: Move enable_dc " Jouni Högander
@ 2023-10-24 12:40 ` Jouni Högander
2023-10-24 12:40 ` [Intel-gfx] [PATCH v4 11/23] drm/i915/display: Move enable_sagv " Jouni Högander
` (17 subsequent siblings)
27 siblings, 0 replies; 30+ messages in thread
From: Jouni Högander @ 2023-10-24 12:40 UTC (permalink / raw)
To: intel-gfx; +Cc: Luca Coelho
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/display/intel_dpt.c | 6 ++++--
drivers/gpu/drm/i915/display/intel_fb.c | 2 +-
drivers/gpu/drm/i915/display/skl_universal_plane.c | 2 +-
drivers/gpu/drm/i915/i915_params.c | 3 ---
drivers/gpu/drm/i915/i915_params.h | 1 -
7 files changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index 60fa0bbce77d..9067ffd6d2a9 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -47,6 +47,9 @@ intel_display_param_named_unsafe(enable_dc, int, 0400,
"(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6; "
"3=up to DC5 with DC3CO; 4=up to DC6 with DC3CO)");
+intel_display_param_named_unsafe(enable_dpt, bool, 0400,
+ "Enable display page table (DPT) (default: true)");
+
intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index 2cca06ad7d71..e5f139239f23 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -29,6 +29,7 @@ struct drm_i915_private;
param(int, panel_use_ssc, -1, 0600) \
param(int, vbt_sdvo_panel_type, -1, 0400) \
param(int, enable_dc, -1, 0400) \
+ param(bool, enable_dpt, true, 0400) \
param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
diff --git a/drivers/gpu/drm/i915/display/intel_dpt.c b/drivers/gpu/drm/i915/display/intel_dpt.c
index 48582b31b7f7..2b067cb952f0 100644
--- a/drivers/gpu/drm/i915/display/intel_dpt.c
+++ b/drivers/gpu/drm/i915/display/intel_dpt.c
@@ -332,11 +332,13 @@ void intel_dpt_configure(struct intel_crtc *crtc)
intel_de_rmw(i915, PLANE_CHICKEN(pipe, plane_id),
PLANE_CHICKEN_DISABLE_DPT,
- i915->params.enable_dpt ? 0 : PLANE_CHICKEN_DISABLE_DPT);
+ i915->display.params.enable_dpt ? 0 :
+ PLANE_CHICKEN_DISABLE_DPT);
}
} else if (DISPLAY_VER(i915) == 13) {
intel_de_rmw(i915, CHICKEN_MISC_2,
CHICKEN_MISC_DISABLE_DPT,
- i915->params.enable_dpt ? 0 : CHICKEN_MISC_DISABLE_DPT);
+ i915->display.params.enable_dpt ? 0 :
+ CHICKEN_MISC_DISABLE_DPT);
}
}
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index 93b2260d7005..c1777ea35761 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -764,7 +764,7 @@ bool intel_fb_modifier_uses_dpt(struct drm_i915_private *i915, u64 modifier)
bool intel_fb_uses_dpt(const struct drm_framebuffer *fb)
{
- return fb && to_i915(fb->dev)->params.enable_dpt &&
+ return fb && to_i915(fb->dev)->display.params.enable_dpt &&
intel_fb_modifier_uses_dpt(to_i915(fb->dev), fb->modifier);
}
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 49e9d40d5e67..68035675ae3c 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -2488,7 +2488,7 @@ skl_get_initial_plane_config(struct intel_crtc *crtc,
goto error;
}
- if (!dev_priv->params.enable_dpt &&
+ if (!dev_priv->display.params.enable_dpt &&
intel_fb_modifier_uses_dpt(dev_priv, fb->modifier)) {
drm_dbg_kms(&dev_priv->drm, "DPT disabled, skipping initial FB\n");
goto error;
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 3d370e43df3c..773a0a709fc6 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -95,9 +95,6 @@ i915_param_named_unsafe(disable_power_well, int, 0400,
i915_param_named_unsafe(enable_ips, int, 0400, "Enable IPS (default: true)");
-i915_param_named_unsafe(enable_dpt, bool, 0400,
- "Enable display page table (DPT) (default: true)");
-
i915_param_named_unsafe(load_detect_test, bool, 0400,
"Force-enable the VGA load detect code for testing (default:false). "
"For developers only.");
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index c3487b9d6937..b8728990cb8b 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -47,7 +47,6 @@ struct drm_printer;
*/
#define I915_PARAMS_FOR_EACH(param) \
param(int, modeset, -1, 0400) \
- param(bool, enable_dpt, true, 0400) \
param(bool, enable_sagv, true, 0600) \
param(int, disable_power_well, -1, 0400) \
param(int, enable_ips, 1, 0600) \
--
2.34.1
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Intel-gfx] [PATCH v4 11/23] drm/i915/display: Move enable_sagv module parameter under display
2023-10-24 12:40 [Intel-gfx] [PATCH v4 00/23] Framework for display parameters Jouni Högander
` (9 preceding siblings ...)
2023-10-24 12:40 ` [Intel-gfx] [PATCH v4 10/23] drm/i915/display: Move enable_dpt " Jouni Högander
@ 2023-10-24 12:40 ` Jouni Högander
2023-10-24 12:40 ` [Intel-gfx] [PATCH v4 12/23] drm/i915/display: Move disable_power_well " Jouni Högander
` (16 subsequent siblings)
27 siblings, 0 replies; 30+ messages in thread
From: Jouni Högander @ 2023-10-24 12:40 UTC (permalink / raw)
To: intel-gfx; +Cc: Luca Coelho
Move enable_sagv module parameter under display and change the parameter
permissions to non-writblase (0400)
v2: Change permissions to 0400
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/display/skl_watermark.c | 5 +++--
drivers/gpu/drm/i915/i915_params.c | 3 ---
drivers/gpu/drm/i915/i915_params.h | 1 -
5 files changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index 9067ffd6d2a9..a98df2afc996 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -50,6 +50,9 @@ intel_display_param_named_unsafe(enable_dc, int, 0400,
intel_display_param_named_unsafe(enable_dpt, bool, 0400,
"Enable display page table (DPT) (default: true)");
+intel_display_param_named_unsafe(enable_sagv, bool, 0400,
+ "Enable system agent voltage/frequency scaling (SAGV) (default: true)");
+
intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index e5f139239f23..0a7ac416403a 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -30,6 +30,7 @@ struct drm_i915_private;
param(int, vbt_sdvo_panel_type, -1, 0400) \
param(int, enable_dc, -1, 0400) \
param(bool, enable_dpt, true, 0400) \
+ param(bool, enable_sagv, true, 0600) \
param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 99b8ccdc3dfa..56588d6e24ae 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -412,7 +412,7 @@ static bool intel_crtc_can_enable_sagv(const struct intel_crtc_state *crtc_state
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *i915 = to_i915(crtc->base.dev);
- if (!i915->params.enable_sagv)
+ if (!i915->display.params.enable_sagv)
return false;
if (DISPLAY_VER(i915) >= 12)
@@ -3702,7 +3702,8 @@ static int intel_sagv_status_show(struct seq_file *m, void *unused)
};
seq_printf(m, "SAGV available: %s\n", str_yes_no(intel_has_sagv(i915)));
- seq_printf(m, "SAGV modparam: %s\n", str_enabled_disabled(i915->params.enable_sagv));
+ seq_printf(m, "SAGV modparam: %s\n",
+ str_enabled_disabled(i915->display.params.enable_sagv));
seq_printf(m, "SAGV status: %s\n", sagv_status[i915->display.sagv.status]);
seq_printf(m, "SAGV block time: %d usec\n", i915->display.sagv.block_time_us);
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 773a0a709fc6..51e706f6e57e 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -82,9 +82,6 @@ i915_param_named_unsafe(enable_hangcheck, bool, 0400,
"WARNING: Disabling this can cause system wide hangs. "
"(default: true)");
-i915_param_named_unsafe(enable_sagv, bool, 0600,
- "Enable system agent voltage/frequency scaling (SAGV) (default: true)");
-
i915_param_named_unsafe(force_probe, charp, 0400,
"Force probe options for specified supported devices. "
"See CONFIG_DRM_I915_FORCE_PROBE for details.");
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index b8728990cb8b..066f15783580 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -47,7 +47,6 @@ struct drm_printer;
*/
#define I915_PARAMS_FOR_EACH(param) \
param(int, modeset, -1, 0400) \
- param(bool, enable_sagv, true, 0600) \
param(int, disable_power_well, -1, 0400) \
param(int, enable_ips, 1, 0600) \
param(int, invert_brightness, 0, 0600) \
--
2.34.1
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Intel-gfx] [PATCH v4 12/23] drm/i915/display: Move disable_power_well module parameter under display
2023-10-24 12:40 [Intel-gfx] [PATCH v4 00/23] Framework for display parameters Jouni Högander
` (10 preceding siblings ...)
2023-10-24 12:40 ` [Intel-gfx] [PATCH v4 11/23] drm/i915/display: Move enable_sagv " Jouni Högander
@ 2023-10-24 12:40 ` Jouni Högander
2023-10-24 12:40 ` [Intel-gfx] [PATCH v4 13/23] drm/i915/display: Move enable_ips " Jouni Högander
` (15 subsequent siblings)
27 siblings, 0 replies; 30+ messages in thread
From: Jouni Högander @ 2023-10-24 12:40 UTC (permalink / raw)
To: intel-gfx; +Cc: Luca Coelho
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_params.c | 4 ++++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/display/intel_display_power.c | 12 ++++++------
drivers/gpu/drm/i915/i915_params.c | 4 ----
drivers/gpu/drm/i915/i915_params.h | 1 -
5 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index a98df2afc996..79a212dded80 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -53,6 +53,10 @@ intel_display_param_named_unsafe(enable_dpt, bool, 0400,
intel_display_param_named_unsafe(enable_sagv, bool, 0400,
"Enable system agent voltage/frequency scaling (SAGV) (default: true)");
+intel_display_param_named_unsafe(disable_power_well, int, 0400,
+ "Disable display power wells when possible "
+ "(-1=auto [default], 0=power wells always on, 1=power wells disabled when possible)");
+
intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index 0a7ac416403a..aadbef664965 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -31,6 +31,7 @@ struct drm_i915_private;
param(int, enable_dc, -1, 0400) \
param(bool, enable_dpt, true, 0400) \
param(bool, enable_sagv, true, 0600) \
+ param(int, disable_power_well, -1, 0400) \
param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 4832eb8da080..e390595d7341 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -967,7 +967,7 @@ static u32 get_allowed_dc_mask(const struct drm_i915_private *dev_priv,
DISPLAY_VER(dev_priv) >= 11 ?
DC_STATE_EN_DC9 : 0;
- if (!dev_priv->params.disable_power_well)
+ if (!dev_priv->display.params.disable_power_well)
max_dc = 0;
if (enable_dc >= 0 && enable_dc <= max_dc) {
@@ -1016,9 +1016,9 @@ int intel_power_domains_init(struct drm_i915_private *dev_priv)
{
struct i915_power_domains *power_domains = &dev_priv->display.power.domains;
- dev_priv->params.disable_power_well =
+ dev_priv->display.params.disable_power_well =
sanitize_disable_power_well_option(dev_priv,
- dev_priv->params.disable_power_well);
+ dev_priv->display.params.disable_power_well);
power_domains->allowed_dc_mask =
get_allowed_dc_mask(dev_priv, dev_priv->display.params.enable_dc);
@@ -1950,7 +1950,7 @@ void intel_power_domains_init_hw(struct drm_i915_private *i915, bool resume)
intel_display_power_get(i915, POWER_DOMAIN_INIT);
/* Disable power support if the user asked so. */
- if (!i915->params.disable_power_well) {
+ if (!i915->display.params.disable_power_well) {
drm_WARN_ON(&i915->drm, power_domains->disable_wakeref);
i915->display.power.domains.disable_wakeref = intel_display_power_get(i915,
POWER_DOMAIN_INIT);
@@ -1977,7 +1977,7 @@ void intel_power_domains_driver_remove(struct drm_i915_private *i915)
fetch_and_zero(&i915->display.power.domains.init_wakeref);
/* Remove the refcount we took to keep power well support disabled. */
- if (!i915->params.disable_power_well)
+ if (!i915->display.params.disable_power_well)
intel_display_power_put(i915, POWER_DOMAIN_INIT,
fetch_and_zero(&i915->display.power.domains.disable_wakeref));
@@ -2096,7 +2096,7 @@ void intel_power_domains_suspend(struct drm_i915_private *i915, bool s2idle)
* Even if power well support was disabled we still want to disable
* power wells if power domains must be deinitialized for suspend.
*/
- if (!i915->params.disable_power_well)
+ if (!i915->display.params.disable_power_well)
intel_display_power_put(i915, POWER_DOMAIN_INIT,
fetch_and_zero(&i915->display.power.domains.disable_wakeref));
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 51e706f6e57e..eab02f71a4e5 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -86,10 +86,6 @@ i915_param_named_unsafe(force_probe, charp, 0400,
"Force probe options for specified supported devices. "
"See CONFIG_DRM_I915_FORCE_PROBE for details.");
-i915_param_named_unsafe(disable_power_well, int, 0400,
- "Disable display power wells when possible "
- "(-1=auto [default], 0=power wells always on, 1=power wells disabled when possible)");
-
i915_param_named_unsafe(enable_ips, int, 0400, "Enable IPS (default: true)");
i915_param_named_unsafe(load_detect_test, bool, 0400,
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index 066f15783580..060464df03c2 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -47,7 +47,6 @@ struct drm_printer;
*/
#define I915_PARAMS_FOR_EACH(param) \
param(int, modeset, -1, 0400) \
- param(int, disable_power_well, -1, 0400) \
param(int, enable_ips, 1, 0600) \
param(int, invert_brightness, 0, 0600) \
param(int, enable_guc, -1, 0400) \
--
2.34.1
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Intel-gfx] [PATCH v4 13/23] drm/i915/display: Move enable_ips module parameter under display
2023-10-24 12:40 [Intel-gfx] [PATCH v4 00/23] Framework for display parameters Jouni Högander
` (11 preceding siblings ...)
2023-10-24 12:40 ` [Intel-gfx] [PATCH v4 12/23] drm/i915/display: Move disable_power_well " Jouni Högander
@ 2023-10-24 12:40 ` Jouni Högander
2023-10-24 12:41 ` [Intel-gfx] [PATCH v4 14/23] drm/i915/display: Move invert_brightness " Jouni Högander
` (14 subsequent siblings)
27 siblings, 0 replies; 30+ messages in thread
From: Jouni Högander @ 2023-10-24 12:40 UTC (permalink / raw)
To: intel-gfx; +Cc: Luca Coelho
Move enable_ips module parameter under display and change it as boolean.
v2:
- Change enable_ip as boolean
- Fix copy paste error (i915_param -> intel_display_param)
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
---
drivers/gpu/drm/i915/display/hsw_ips.c | 4 ++--
drivers/gpu/drm/i915/display/intel_display_params.c | 2 ++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/i915_params.c | 2 --
drivers/gpu/drm/i915/i915_params.h | 1 -
5 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/hsw_ips.c b/drivers/gpu/drm/i915/display/hsw_ips.c
index 7dc38ac02092..611a7d6ef80c 100644
--- a/drivers/gpu/drm/i915/display/hsw_ips.c
+++ b/drivers/gpu/drm/i915/display/hsw_ips.c
@@ -193,7 +193,7 @@ bool hsw_crtc_state_ips_capable(const struct intel_crtc_state *crtc_state)
if (!hsw_crtc_supports_ips(crtc))
return false;
- if (!i915->params.enable_ips)
+ if (!i915->display.params.enable_ips)
return false;
if (crtc_state->pipe_bpp > 24)
@@ -329,7 +329,7 @@ static int hsw_ips_debugfs_status_show(struct seq_file *m, void *unused)
wakeref = intel_runtime_pm_get(&i915->runtime_pm);
seq_printf(m, "Enabled by kernel parameter: %s\n",
- str_yes_no(i915->params.enable_ips));
+ str_yes_no(i915->display.params.enable_ips));
if (DISPLAY_VER(i915) >= 8) {
seq_puts(m, "Currently: unknown\n");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index 79a212dded80..ce991ad20006 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -57,6 +57,8 @@ intel_display_param_named_unsafe(disable_power_well, int, 0400,
"Disable display power wells when possible "
"(-1=auto [default], 0=power wells always on, 1=power wells disabled when possible)");
+intel_display_param_named_unsafe(enable_ips, bool, 0400, "Enable IPS (default: true)");
+
intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index aadbef664965..8d51488e3b3e 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -32,6 +32,7 @@ struct drm_i915_private;
param(bool, enable_dpt, true, 0400) \
param(bool, enable_sagv, true, 0600) \
param(int, disable_power_well, -1, 0400) \
+ param(bool, enable_ips, true, 0600) \
param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index eab02f71a4e5..54dcce97da2a 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -86,8 +86,6 @@ i915_param_named_unsafe(force_probe, charp, 0400,
"Force probe options for specified supported devices. "
"See CONFIG_DRM_I915_FORCE_PROBE for details.");
-i915_param_named_unsafe(enable_ips, int, 0400, "Enable IPS (default: true)");
-
i915_param_named_unsafe(load_detect_test, bool, 0400,
"Force-enable the VGA load detect code for testing (default:false). "
"For developers only.");
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index 060464df03c2..18bb8a93e0e8 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -47,7 +47,6 @@ struct drm_printer;
*/
#define I915_PARAMS_FOR_EACH(param) \
param(int, modeset, -1, 0400) \
- param(int, enable_ips, 1, 0600) \
param(int, invert_brightness, 0, 0600) \
param(int, enable_guc, -1, 0400) \
param(int, guc_log_level, -1, 0400) \
--
2.34.1
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Intel-gfx] [PATCH v4 14/23] drm/i915/display: Move invert_brightness module parameter under display
2023-10-24 12:40 [Intel-gfx] [PATCH v4 00/23] Framework for display parameters Jouni Högander
` (12 preceding siblings ...)
2023-10-24 12:40 ` [Intel-gfx] [PATCH v4 13/23] drm/i915/display: Move enable_ips " Jouni Högander
@ 2023-10-24 12:41 ` Jouni Högander
2023-10-24 12:41 ` [Intel-gfx] [PATCH v4 15/23] drm/i915/display: Move edp_vswing " Jouni Högander
` (13 subsequent siblings)
27 siblings, 0 replies; 30+ messages in thread
From: Jouni Högander @ 2023-10-24 12:41 UTC (permalink / raw)
To: intel-gfx; +Cc: Luca Coelho
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
---
drivers/gpu/drm/i915/display/intel_backlight.c | 9 +++++----
drivers/gpu/drm/i915/display/intel_display_params.c | 7 +++++++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/i915_params.c | 7 -------
drivers/gpu/drm/i915/i915_params.h | 1 -
5 files changed, 13 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_backlight.c b/drivers/gpu/drm/i915/display/intel_backlight.c
index 2e8f17c04522..612d4cd9dacb 100644
--- a/drivers/gpu/drm/i915/display/intel_backlight.c
+++ b/drivers/gpu/drm/i915/display/intel_backlight.c
@@ -88,10 +88,10 @@ u32 intel_backlight_invert_pwm_level(struct intel_connector *connector, u32 val)
drm_WARN_ON(&i915->drm, panel->backlight.pwm_level_max == 0);
- if (i915->params.invert_brightness < 0)
+ if (i915->display.params.invert_brightness < 0)
return val;
- if (i915->params.invert_brightness > 0 ||
+ if (i915->display.params.invert_brightness > 0 ||
intel_has_quirk(i915, QUIRK_INVERT_BRIGHTNESS)) {
return panel->backlight.pwm_level_max - val + panel->backlight.pwm_level_min;
}
@@ -132,8 +132,9 @@ u32 intel_backlight_level_from_pwm(struct intel_connector *connector, u32 val)
drm_WARN_ON_ONCE(&i915->drm,
panel->backlight.max == 0 || panel->backlight.pwm_level_max == 0);
- if (i915->params.invert_brightness > 0 ||
- (i915->params.invert_brightness == 0 && intel_has_quirk(i915, QUIRK_INVERT_BRIGHTNESS)))
+ if (i915->display.params.invert_brightness > 0 ||
+ (i915->display.params.invert_brightness == 0 &&
+ intel_has_quirk(i915, QUIRK_INVERT_BRIGHTNESS)))
val = panel->backlight.pwm_level_max - (val - panel->backlight.pwm_level_min);
return scale(val, panel->backlight.pwm_level_min, panel->backlight.pwm_level_max,
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index ce991ad20006..2d721afaba30 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -59,6 +59,13 @@ intel_display_param_named_unsafe(disable_power_well, int, 0400,
intel_display_param_named_unsafe(enable_ips, bool, 0400, "Enable IPS (default: true)");
+intel_display_param_named_unsafe(invert_brightness, int, 0400,
+ "Invert backlight brightness "
+ "(-1 force normal, 0 machine defaults, 1 force inversion), please "
+ "report PCI device ID, subsystem vendor and subsystem device ID "
+ "to dri-devel@lists.freedesktop.org, if your machine needs it. "
+ "It will then be included in an upcoming module version.");
+
intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index 8d51488e3b3e..4723b4522413 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -33,6 +33,7 @@ struct drm_i915_private;
param(bool, enable_sagv, true, 0600) \
param(int, disable_power_well, -1, 0400) \
param(bool, enable_ips, true, 0600) \
+ param(int, invert_brightness, 0, 0600) \
param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 54dcce97da2a..423fe54484e1 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -94,13 +94,6 @@ i915_param_named_unsafe(force_reset_modeset_test, bool, 0400,
"Force a modeset during gpu reset for testing (default:false). "
"For developers only.");
-i915_param_named_unsafe(invert_brightness, int, 0400,
- "Invert backlight brightness "
- "(-1 force normal, 0 machine defaults, 1 force inversion), please "
- "report PCI device ID, subsystem vendor and subsystem device ID "
- "to dri-devel@lists.freedesktop.org, if your machine needs it. "
- "It will then be included in an upcoming module version.");
-
i915_param_named(disable_display, bool, 0400,
"Disable display (default: false)");
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index 18bb8a93e0e8..ae0873443a65 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -47,7 +47,6 @@ struct drm_printer;
*/
#define I915_PARAMS_FOR_EACH(param) \
param(int, modeset, -1, 0400) \
- param(int, invert_brightness, 0, 0600) \
param(int, enable_guc, -1, 0400) \
param(int, guc_log_level, -1, 0400) \
param(char *, guc_firmware_path, NULL, 0400) \
--
2.34.1
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Intel-gfx] [PATCH v4 15/23] drm/i915/display: Move edp_vswing module parameter under display
2023-10-24 12:40 [Intel-gfx] [PATCH v4 00/23] Framework for display parameters Jouni Högander
` (13 preceding siblings ...)
2023-10-24 12:41 ` [Intel-gfx] [PATCH v4 14/23] drm/i915/display: Move invert_brightness " Jouni Högander
@ 2023-10-24 12:41 ` Jouni Högander
2023-10-24 12:41 ` [Intel-gfx] [PATCH v4 16/23] drm/i915/display: Move enable_dpcd_backlight " Jouni Högander
` (12 subsequent siblings)
27 siblings, 0 replies; 30+ messages in thread
From: Jouni Högander @ 2023-10-24 12:41 UTC (permalink / raw)
To: intel-gfx; +Cc: Luca Coelho
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
---
drivers/gpu/drm/i915/display/intel_bios.c | 4 ++--
drivers/gpu/drm/i915/display/intel_display_params.c | 6 ++++++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/i915_params.c | 6 ------
drivers/gpu/drm/i915/i915_params.h | 1 -
5 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 70c0491aac42..69db1a3a1499 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -1514,9 +1514,9 @@ parse_edp(struct drm_i915_private *i915,
u8 vswing;
/* Don't read from VBT if module parameter has valid value*/
- if (i915->params.edp_vswing) {
+ if (i915->display.params.edp_vswing) {
panel->vbt.edp.low_vswing =
- i915->params.edp_vswing == 1;
+ i915->display.params.edp_vswing == 1;
} else {
vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
panel->vbt.edp.low_vswing = vswing == 0;
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index 2d721afaba30..70a475223512 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -66,6 +66,12 @@ intel_display_param_named_unsafe(invert_brightness, int, 0400,
"to dri-devel@lists.freedesktop.org, if your machine needs it. "
"It will then be included in an upcoming module version.");
+/* WA to get away with the default setting in VBT for early platforms.Will be removed */
+intel_display_param_named_unsafe(edp_vswing, int, 0400,
+ "Ignore/Override vswing pre-emph table selection from VBT "
+ "(0=use value from vbt [default], 1=low power swing(200mV),"
+ "2=default swing(400mV))");
+
intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index 4723b4522413..10c79ce23063 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -34,6 +34,7 @@ struct drm_i915_private;
param(int, disable_power_well, -1, 0400) \
param(bool, enable_ips, true, 0600) \
param(int, invert_brightness, 0, 0600) \
+ param(int, edp_vswing, 0, 0400) \
param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 423fe54484e1..6b9df9f9d842 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -111,12 +111,6 @@ i915_param_named(verbose_state_checks, bool, 0600,
i915_param_named_unsafe(nuclear_pageflip, bool, 0400,
"Force enable atomic functionality on platforms that don't have full support yet.");
-/* WA to get away with the default setting in VBT for early platforms.Will be removed */
-i915_param_named_unsafe(edp_vswing, int, 0400,
- "Ignore/Override vswing pre-emph table selection from VBT "
- "(0=use value from vbt [default], 1=low power swing(200mV),"
- "2=default swing(400mV))");
-
i915_param_named_unsafe(enable_guc, int, 0400,
"Enable GuC load for GuC submission and/or HuC load. "
"Required functionality can be selected using bitmask values. "
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index ae0873443a65..c33edaee5032 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -55,7 +55,6 @@ struct drm_printer;
param(char *, gsc_firmware_path, NULL, 0400) \
param(bool, memtest, false, 0400) \
param(int, mmio_debug, -IS_ENABLED(CONFIG_DRM_I915_DEBUG_MMIO), 0600) \
- param(int, edp_vswing, 0, 0400) \
param(unsigned int, reset, 3, 0600) \
param(unsigned int, inject_probe_failure, 0, 0) \
param(int, enable_dpcd_backlight, -1, 0600) \
--
2.34.1
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Intel-gfx] [PATCH v4 16/23] drm/i915/display: Move enable_dpcd_backlight module parameter under display
2023-10-24 12:40 [Intel-gfx] [PATCH v4 00/23] Framework for display parameters Jouni Högander
` (14 preceding siblings ...)
2023-10-24 12:41 ` [Intel-gfx] [PATCH v4 15/23] drm/i915/display: Move edp_vswing " Jouni Högander
@ 2023-10-24 12:41 ` Jouni Högander
2023-10-24 12:41 ` [Intel-gfx] [PATCH v4 17/23] drm/i915/display: Move load_detect_test " Jouni Högander
` (11 subsequent siblings)
27 siblings, 0 replies; 30+ messages in thread
From: Jouni Högander @ 2023-10-24 12:41 UTC (permalink / raw)
To: intel-gfx; +Cc: Luca Coelho
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_params.c | 4 ++++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 4 ++--
drivers/gpu/drm/i915/i915_params.c | 4 ----
drivers/gpu/drm/i915/i915_params.h | 1 -
5 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index 70a475223512..190ca12ce64b 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -72,6 +72,10 @@ intel_display_param_named_unsafe(edp_vswing, int, 0400,
"(0=use value from vbt [default], 1=low power swing(200mV),"
"2=default swing(400mV))");
+intel_display_param_named(enable_dpcd_backlight, int, 0400,
+ "Enable support for DPCD backlight control"
+ "(-1=use per-VBT LFP backlight type setting [default], 0=disabled, 1=enable, 2=force VESA interface, 3=force Intel interface)");
+
intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index 10c79ce23063..85d1128954e9 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -35,6 +35,7 @@ struct drm_i915_private;
param(bool, enable_ips, true, 0600) \
param(int, invert_brightness, 0, 0600) \
param(int, edp_vswing, 0, 0400) \
+ param(int, enable_dpcd_backlight, -1, 0600) \
param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
index 26ea7e9f1b89..4f58efdc688a 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
@@ -146,7 +146,7 @@ intel_dp_aux_supports_hdr_backlight(struct intel_connector *connector)
* HDR static metadata we need to start maintaining table of
* ranges for such panels.
*/
- if (i915->params.enable_dpcd_backlight != INTEL_DP_AUX_BACKLIGHT_FORCE_INTEL &&
+ if (i915->display.params.enable_dpcd_backlight != INTEL_DP_AUX_BACKLIGHT_FORCE_INTEL &&
!(connector->base.hdr_sink_metadata.hdmi_type1.metadata_type &
BIT(HDMI_STATIC_METADATA_TYPE1))) {
drm_info(&i915->drm,
@@ -489,7 +489,7 @@ int intel_dp_aux_init_backlight_funcs(struct intel_connector *connector)
/* Check the VBT and user's module parameters to figure out which
* interfaces to probe
*/
- switch (i915->params.enable_dpcd_backlight) {
+ switch (i915->display.params.enable_dpcd_backlight) {
case INTEL_DP_AUX_BACKLIGHT_OFF:
return -ENODEV;
case INTEL_DP_AUX_BACKLIGHT_AUTO:
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 6b9df9f9d842..e15cd8491c7f 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -140,10 +140,6 @@ i915_param_named_unsafe(inject_probe_failure, uint, 0400,
"Force an error after a number of failure check points (0:disabled (default), N:force failure at the Nth failure check point)");
#endif
-i915_param_named(enable_dpcd_backlight, int, 0400,
- "Enable support for DPCD backlight control"
- "(-1=use per-VBT LFP backlight type setting [default], 0=disabled, 1=enable, 2=force VESA interface, 3=force Intel interface)");
-
#if IS_ENABLED(CONFIG_DRM_I915_GVT)
i915_param_named(enable_gvt, bool, 0400,
"Enable support for Intel GVT-g graphics virtualization host support(default:false)");
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index c33edaee5032..8169234338b1 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -57,7 +57,6 @@ struct drm_printer;
param(int, mmio_debug, -IS_ENABLED(CONFIG_DRM_I915_DEBUG_MMIO), 0600) \
param(unsigned int, reset, 3, 0600) \
param(unsigned int, inject_probe_failure, 0, 0) \
- param(int, enable_dpcd_backlight, -1, 0600) \
param(char *, force_probe, CONFIG_DRM_I915_FORCE_PROBE, 0400) \
param(unsigned int, request_timeout_ms, CONFIG_DRM_I915_REQUEST_TIMEOUT, CONFIG_DRM_I915_REQUEST_TIMEOUT ? 0600 : 0) \
param(unsigned int, lmem_size, 0, 0400) \
--
2.34.1
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Intel-gfx] [PATCH v4 17/23] drm/i915/display: Move load_detect_test parameter under display
2023-10-24 12:40 [Intel-gfx] [PATCH v4 00/23] Framework for display parameters Jouni Högander
` (15 preceding siblings ...)
2023-10-24 12:41 ` [Intel-gfx] [PATCH v4 16/23] drm/i915/display: Move enable_dpcd_backlight " Jouni Högander
@ 2023-10-24 12:41 ` Jouni Högander
2023-10-24 12:41 ` [Intel-gfx] [PATCH v4 18/23] drm/i915/display: Move force_reset_modeset_test " Jouni Högander
` (10 subsequent siblings)
27 siblings, 0 replies; 30+ messages in thread
From: Jouni Högander @ 2023-10-24 12:41 UTC (permalink / raw)
To: intel-gfx; +Cc: Luca Coelho
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
---
drivers/gpu/drm/i915/display/intel_crt.c | 4 ++--
drivers/gpu/drm/i915/display/intel_display_params.c | 4 ++++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/i915_params.c | 4 ----
drivers/gpu/drm/i915/i915_params.h | 1 -
5 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c
index 913e5d230a4d..0e33a0523a75 100644
--- a/drivers/gpu/drm/i915/display/intel_crt.c
+++ b/drivers/gpu/drm/i915/display/intel_crt.c
@@ -841,7 +841,7 @@ intel_crt_detect(struct drm_connector *connector,
if (!intel_display_device_enabled(dev_priv))
return connector_status_disconnected;
- if (dev_priv->params.load_detect_test) {
+ if (dev_priv->display.params.load_detect_test) {
wakeref = intel_display_power_get(dev_priv,
intel_encoder->power_domain);
goto load_detect;
@@ -901,7 +901,7 @@ intel_crt_detect(struct drm_connector *connector,
else if (DISPLAY_VER(dev_priv) < 4)
status = intel_crt_load_detect(crt,
to_intel_crtc(connector->state->crtc)->pipe);
- else if (dev_priv->params.load_detect_test)
+ else if (dev_priv->display.params.load_detect_test)
status = connector_status_disconnected;
else
status = connector_status_unknown;
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index 190ca12ce64b..16a30f7b96b4 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -76,6 +76,10 @@ intel_display_param_named(enable_dpcd_backlight, int, 0400,
"Enable support for DPCD backlight control"
"(-1=use per-VBT LFP backlight type setting [default], 0=disabled, 1=enable, 2=force VESA interface, 3=force Intel interface)");
+intel_display_param_named_unsafe(load_detect_test, bool, 0400,
+ "Force-enable the VGA load detect code for testing (default:false). "
+ "For developers only.");
+
intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index 85d1128954e9..558eecaa520a 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -36,6 +36,7 @@ struct drm_i915_private;
param(int, invert_brightness, 0, 0600) \
param(int, edp_vswing, 0, 0400) \
param(int, enable_dpcd_backlight, -1, 0600) \
+ param(bool, load_detect_test, false, 0600) \
param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index e15cd8491c7f..cb56973a2394 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -86,10 +86,6 @@ i915_param_named_unsafe(force_probe, charp, 0400,
"Force probe options for specified supported devices. "
"See CONFIG_DRM_I915_FORCE_PROBE for details.");
-i915_param_named_unsafe(load_detect_test, bool, 0400,
- "Force-enable the VGA load detect code for testing (default:false). "
- "For developers only.");
-
i915_param_named_unsafe(force_reset_modeset_test, bool, 0400,
"Force a modeset during gpu reset for testing (default:false). "
"For developers only.");
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index 8169234338b1..cf5448bbc087 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -63,7 +63,6 @@ struct drm_printer;
param(unsigned int, lmem_bar_size, 0, 0400) \
/* leave bools at the end to not create holes */ \
param(bool, enable_hangcheck, true, 0600) \
- param(bool, load_detect_test, false, 0600) \
param(bool, force_reset_modeset_test, false, 0600) \
param(bool, error_capture, true, IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) ? 0600 : 0) \
param(bool, disable_display, false, 0400) \
--
2.34.1
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Intel-gfx] [PATCH v4 18/23] drm/i915/display: Move force_reset_modeset_test parameter under display
2023-10-24 12:40 [Intel-gfx] [PATCH v4 00/23] Framework for display parameters Jouni Högander
` (16 preceding siblings ...)
2023-10-24 12:41 ` [Intel-gfx] [PATCH v4 17/23] drm/i915/display: Move load_detect_test " Jouni Högander
@ 2023-10-24 12:41 ` Jouni Högander
2023-10-24 12:41 ` [Intel-gfx] [PATCH v4 19/23] drm/i915/display: Move disable_display " Jouni Högander
` (9 subsequent siblings)
27 siblings, 0 replies; 30+ messages in thread
From: Jouni Högander @ 2023-10-24 12:41 UTC (permalink / raw)
To: intel-gfx; +Cc: Luca Coelho
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_params.c | 4 ++++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/display/intel_display_reset.c | 2 +-
drivers/gpu/drm/i915/i915_params.c | 4 ----
drivers/gpu/drm/i915/i915_params.h | 1 -
5 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index 16a30f7b96b4..a6f0dd9beb92 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -80,6 +80,10 @@ intel_display_param_named_unsafe(load_detect_test, bool, 0400,
"Force-enable the VGA load detect code for testing (default:false). "
"For developers only.");
+intel_display_param_named_unsafe(force_reset_modeset_test, bool, 0400,
+ "Force a modeset during gpu reset for testing (default:false). "
+ "For developers only.");
+
intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index 558eecaa520a..5f76dbd4b099 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -37,6 +37,7 @@ struct drm_i915_private;
param(int, edp_vswing, 0, 0400) \
param(int, enable_dpcd_backlight, -1, 0600) \
param(bool, load_detect_test, false, 0600) \
+ param(bool, force_reset_modeset_test, false, 0600) \
param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
diff --git a/drivers/gpu/drm/i915/display/intel_display_reset.c b/drivers/gpu/drm/i915/display/intel_display_reset.c
index 17178d5d7788..c2c347b22448 100644
--- a/drivers/gpu/drm/i915/display/intel_display_reset.c
+++ b/drivers/gpu/drm/i915/display/intel_display_reset.c
@@ -29,7 +29,7 @@ void intel_display_reset_prepare(struct drm_i915_private *dev_priv)
return;
/* reset doesn't touch the display */
- if (!dev_priv->params.force_reset_modeset_test &&
+ if (!dev_priv->display.params.force_reset_modeset_test &&
!gpu_reset_clobbers_display(dev_priv))
return;
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index cb56973a2394..497e39b1dcfb 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -86,10 +86,6 @@ i915_param_named_unsafe(force_probe, charp, 0400,
"Force probe options for specified supported devices. "
"See CONFIG_DRM_I915_FORCE_PROBE for details.");
-i915_param_named_unsafe(force_reset_modeset_test, bool, 0400,
- "Force a modeset during gpu reset for testing (default:false). "
- "For developers only.");
-
i915_param_named(disable_display, bool, 0400,
"Disable display (default: false)");
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index cf5448bbc087..9f3188b674e0 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -63,7 +63,6 @@ struct drm_printer;
param(unsigned int, lmem_bar_size, 0, 0400) \
/* leave bools at the end to not create holes */ \
param(bool, enable_hangcheck, true, 0600) \
- param(bool, force_reset_modeset_test, false, 0600) \
param(bool, error_capture, true, IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) ? 0600 : 0) \
param(bool, disable_display, false, 0400) \
param(bool, verbose_state_checks, true, 0) \
--
2.34.1
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Intel-gfx] [PATCH v4 19/23] drm/i915/display: Move disable_display parameter under display
2023-10-24 12:40 [Intel-gfx] [PATCH v4 00/23] Framework for display parameters Jouni Högander
` (17 preceding siblings ...)
2023-10-24 12:41 ` [Intel-gfx] [PATCH v4 18/23] drm/i915/display: Move force_reset_modeset_test " Jouni Högander
@ 2023-10-24 12:41 ` Jouni Högander
2023-10-24 12:41 ` [Intel-gfx] [PATCH v4 20/23] drm/i915/display: Use device parameters instead of module in I915_STATE_WARN Jouni Högander
` (8 subsequent siblings)
27 siblings, 0 replies; 30+ messages in thread
From: Jouni Högander @ 2023-10-24 12:41 UTC (permalink / raw)
To: intel-gfx; +Cc: Luca Coelho
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_device.c | 3 ++-
drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/i915_params.c | 3 ---
drivers/gpu/drm/i915/i915_params.h | 1 -
5 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index e80842d1e7c7..50841818fb59 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -1153,5 +1153,6 @@ bool intel_display_device_enabled(struct drm_i915_private *i915)
/* Only valid when HAS_DISPLAY() is true */
drm_WARN_ON(&i915->drm, !HAS_DISPLAY(i915));
- return !i915->params.disable_display && !intel_opregion_headless_sku(i915);
+ return !i915->display.params.disable_display &&
+ !intel_opregion_headless_sku(i915);
}
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index a6f0dd9beb92..3579fa1fc5b7 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -84,6 +84,9 @@ intel_display_param_named_unsafe(force_reset_modeset_test, bool, 0400,
"Force a modeset during gpu reset for testing (default:false). "
"For developers only.");
+intel_display_param_named(disable_display, bool, 0400,
+ "Disable display (default: false)");
+
intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index 5f76dbd4b099..8c4e0f6ac3e3 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -38,6 +38,7 @@ struct drm_i915_private;
param(int, enable_dpcd_backlight, -1, 0600) \
param(bool, load_detect_test, false, 0600) \
param(bool, force_reset_modeset_test, false, 0600) \
+ param(bool, disable_display, false, 0400) \
param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 497e39b1dcfb..3205c6b62670 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -86,9 +86,6 @@ i915_param_named_unsafe(force_probe, charp, 0400,
"Force probe options for specified supported devices. "
"See CONFIG_DRM_I915_FORCE_PROBE for details.");
-i915_param_named(disable_display, bool, 0400,
- "Disable display (default: false)");
-
i915_param_named(memtest, bool, 0400,
"Perform a read/write test of all device memory on module load (default: off)");
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index 9f3188b674e0..8bce7d057634 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -64,7 +64,6 @@ struct drm_printer;
/* leave bools at the end to not create holes */ \
param(bool, enable_hangcheck, true, 0600) \
param(bool, error_capture, true, IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) ? 0600 : 0) \
- param(bool, disable_display, false, 0400) \
param(bool, verbose_state_checks, true, 0) \
param(bool, nuclear_pageflip, false, 0400) \
param(bool, enable_dp_mst, true, 0600) \
--
2.34.1
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Intel-gfx] [PATCH v4 20/23] drm/i915/display: Use device parameters instead of module in I915_STATE_WARN
2023-10-24 12:40 [Intel-gfx] [PATCH v4 00/23] Framework for display parameters Jouni Högander
` (18 preceding siblings ...)
2023-10-24 12:41 ` [Intel-gfx] [PATCH v4 19/23] drm/i915/display: Move disable_display " Jouni Högander
@ 2023-10-24 12:41 ` Jouni Högander
2023-10-24 12:41 ` [Intel-gfx] [PATCH v4 21/23] drm/i915/display: Move verbose_state_checks under display Jouni Högander
` (7 subsequent siblings)
27 siblings, 0 replies; 30+ messages in thread
From: Jouni Högander @ 2023-10-24 12:41 UTC (permalink / raw)
To: intel-gfx; +Cc: Luca Coelho
Also make module parameter as non writable.
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.h | 2 +-
drivers/gpu/drm/i915/i915_params.c | 3 +--
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index 0e5dffe8f018..ba3548f9768d 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -552,7 +552,7 @@ bool assert_port_valid(struct drm_i915_private *i915, enum port port);
struct drm_device *drm = &(__i915)->drm; \
int __ret_warn_on = !!(condition); \
if (unlikely(__ret_warn_on)) \
- if (!drm_WARN(drm, i915_modparams.verbose_state_checks, format)) \
+ if (!drm_WARN(drm, __i915->params.verbose_state_checks, format)) \
drm_err(drm, format); \
unlikely(__ret_warn_on); \
})
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 3205c6b62670..4e8c088c69fd 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -93,8 +93,7 @@ i915_param_named(mmio_debug, int, 0400,
"Enable the MMIO debug code for the first N failures (default: off). "
"This may negatively affect performance.");
-/* Special case writable file */
-i915_param_named(verbose_state_checks, bool, 0600,
+i915_param_named(verbose_state_checks, bool, 0400,
"Enable verbose logs (ie. WARN_ON()) in case of unexpected hw state conditions.");
i915_param_named_unsafe(nuclear_pageflip, bool, 0400,
--
2.34.1
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Intel-gfx] [PATCH v4 21/23] drm/i915/display: Move verbose_state_checks under display
2023-10-24 12:40 [Intel-gfx] [PATCH v4 00/23] Framework for display parameters Jouni Högander
` (19 preceding siblings ...)
2023-10-24 12:41 ` [Intel-gfx] [PATCH v4 20/23] drm/i915/display: Use device parameters instead of module in I915_STATE_WARN Jouni Högander
@ 2023-10-24 12:41 ` Jouni Högander
2023-10-24 12:55 ` Coelho, Luciano
2023-10-24 12:41 ` [Intel-gfx] [PATCH v4 22/23] drm/i915/display: Move nuclear_pageflip " Jouni Högander
` (6 subsequent siblings)
27 siblings, 1 reply; 30+ messages in thread
From: Jouni Högander @ 2023-10-24 12:41 UTC (permalink / raw)
To: intel-gfx; +Cc: Jani Nikula, Luca Coelho
v2: Change device parameter permissions to 0400
Cc: Luca Coelho <luciano.coelho@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.h | 2 +-
drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/i915_params.c | 3 ---
drivers/gpu/drm/i915/i915_params.h | 1 -
5 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index ba3548f9768d..bc95fb377386 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -552,7 +552,7 @@ bool assert_port_valid(struct drm_i915_private *i915, enum port port);
struct drm_device *drm = &(__i915)->drm; \
int __ret_warn_on = !!(condition); \
if (unlikely(__ret_warn_on)) \
- if (!drm_WARN(drm, __i915->params.verbose_state_checks, format)) \
+ if (!drm_WARN(drm, __i915->display.params.verbose_state_checks, format)) \
drm_err(drm, format); \
unlikely(__ret_warn_on); \
})
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index 3579fa1fc5b7..cae1449e9b06 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -87,6 +87,9 @@ intel_display_param_named_unsafe(force_reset_modeset_test, bool, 0400,
intel_display_param_named(disable_display, bool, 0400,
"Disable display (default: false)");
+intel_display_param_named(verbose_state_checks, bool, 0400,
+ "Enable verbose logs (ie. WARN_ON()) in case of unexpected hw state conditions.");
+
intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index 8c4e0f6ac3e3..46ec097d43be 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -39,6 +39,7 @@ struct drm_i915_private;
param(bool, load_detect_test, false, 0600) \
param(bool, force_reset_modeset_test, false, 0600) \
param(bool, disable_display, false, 0400) \
+ param(bool, verbose_state_checks, true, 0400) \
param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 4e8c088c69fd..72614c139222 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -93,9 +93,6 @@ i915_param_named(mmio_debug, int, 0400,
"Enable the MMIO debug code for the first N failures (default: off). "
"This may negatively affect performance.");
-i915_param_named(verbose_state_checks, bool, 0400,
- "Enable verbose logs (ie. WARN_ON()) in case of unexpected hw state conditions.");
-
i915_param_named_unsafe(nuclear_pageflip, bool, 0400,
"Force enable atomic functionality on platforms that don't have full support yet.");
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index 8bce7d057634..4b543beb17ca 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -64,7 +64,6 @@ struct drm_printer;
/* leave bools at the end to not create holes */ \
param(bool, enable_hangcheck, true, 0600) \
param(bool, error_capture, true, IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) ? 0600 : 0) \
- param(bool, verbose_state_checks, true, 0) \
param(bool, nuclear_pageflip, false, 0400) \
param(bool, enable_dp_mst, true, 0600) \
param(bool, enable_gvt, false, IS_ENABLED(CONFIG_DRM_I915_GVT) ? 0400 : 0)
--
2.34.1
^ permalink raw reply related [flat|nested] 30+ messages in thread* Re: [Intel-gfx] [PATCH v4 21/23] drm/i915/display: Move verbose_state_checks under display
2023-10-24 12:41 ` [Intel-gfx] [PATCH v4 21/23] drm/i915/display: Move verbose_state_checks under display Jouni Högander
@ 2023-10-24 12:55 ` Coelho, Luciano
0 siblings, 0 replies; 30+ messages in thread
From: Coelho, Luciano @ 2023-10-24 12:55 UTC (permalink / raw)
To: intel-gfx@lists.freedesktop.org, Hogander, Jouni; +Cc: Nikula, Jani
On Tue, 2023-10-24 at 15:41 +0300, Jouni Högander wrote:
> v2: Change device parameter permissions to 0400
I think it should be v4 here? Anyway, I don't care, I think I already
expressed my opinion against having the patch revision history in the
commit message at all...
>
> Cc: Luca Coelho <luciano.coelho@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
>
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
--
Cheers,
Luca.
^ permalink raw reply [flat|nested] 30+ messages in thread
* [Intel-gfx] [PATCH v4 22/23] drm/i915/display: Move nuclear_pageflip under display
2023-10-24 12:40 [Intel-gfx] [PATCH v4 00/23] Framework for display parameters Jouni Högander
` (20 preceding siblings ...)
2023-10-24 12:41 ` [Intel-gfx] [PATCH v4 21/23] drm/i915/display: Move verbose_state_checks under display Jouni Högander
@ 2023-10-24 12:41 ` Jouni Högander
2023-10-24 12:41 ` [Intel-gfx] [PATCH v4 23/23] drm/i915/display: Move enable_dp_mst " Jouni Högander
` (5 subsequent siblings)
27 siblings, 0 replies; 30+ messages in thread
From: Jouni Högander @ 2023-10-24 12:41 UTC (permalink / raw)
To: intel-gfx; +Cc: Luca Coelho
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_device.c | 2 +-
drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/i915_params.c | 3 ---
drivers/gpu/drm/i915/i915_params.h | 1 -
5 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index 50841818fb59..0b522c6a8d6f 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -1113,7 +1113,7 @@ void intel_display_device_info_runtime_init(struct drm_i915_private *i915)
}
/* Disable nuclear pageflip by default on pre-g4x */
- if (!i915->params.nuclear_pageflip &&
+ if (!i915->display.params.nuclear_pageflip &&
DISPLAY_VER(i915) < 5 && !IS_G4X(i915))
i915->drm.driver_features &= ~DRIVER_ATOMIC;
}
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index cae1449e9b06..f82f5bed69bc 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -90,6 +90,9 @@ intel_display_param_named(disable_display, bool, 0400,
intel_display_param_named(verbose_state_checks, bool, 0400,
"Enable verbose logs (ie. WARN_ON()) in case of unexpected hw state conditions.");
+intel_display_param_named_unsafe(nuclear_pageflip, bool, 0400,
+ "Force enable atomic functionality on platforms that don't have full support yet.");
+
intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index 46ec097d43be..40aed14d18be 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -40,6 +40,7 @@ struct drm_i915_private;
param(bool, force_reset_modeset_test, false, 0600) \
param(bool, disable_display, false, 0400) \
param(bool, verbose_state_checks, true, 0400) \
+ param(bool, nuclear_pageflip, false, 0400) \
param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 72614c139222..18424873442d 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -93,9 +93,6 @@ i915_param_named(mmio_debug, int, 0400,
"Enable the MMIO debug code for the first N failures (default: off). "
"This may negatively affect performance.");
-i915_param_named_unsafe(nuclear_pageflip, bool, 0400,
- "Force enable atomic functionality on platforms that don't have full support yet.");
-
i915_param_named_unsafe(enable_guc, int, 0400,
"Enable GuC load for GuC submission and/or HuC load. "
"Required functionality can be selected using bitmask values. "
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index 4b543beb17ca..c7fff571db2c 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -64,7 +64,6 @@ struct drm_printer;
/* leave bools at the end to not create holes */ \
param(bool, enable_hangcheck, true, 0600) \
param(bool, error_capture, true, IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) ? 0600 : 0) \
- param(bool, nuclear_pageflip, false, 0400) \
param(bool, enable_dp_mst, true, 0600) \
param(bool, enable_gvt, false, IS_ENABLED(CONFIG_DRM_I915_GVT) ? 0400 : 0)
--
2.34.1
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Intel-gfx] [PATCH v4 23/23] drm/i915/display: Move enable_dp_mst under display
2023-10-24 12:40 [Intel-gfx] [PATCH v4 00/23] Framework for display parameters Jouni Högander
` (21 preceding siblings ...)
2023-10-24 12:41 ` [Intel-gfx] [PATCH v4 22/23] drm/i915/display: Move nuclear_pageflip " Jouni Högander
@ 2023-10-24 12:41 ` Jouni Högander
2023-10-24 23:19 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Framework for display parameters (rev5) Patchwork
` (4 subsequent siblings)
27 siblings, 0 replies; 30+ messages in thread
From: Jouni Högander @ 2023-10-24 12:41 UTC (permalink / raw)
To: intel-gfx; +Cc: Luca Coelho
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 6 +++---
drivers/gpu/drm/i915/i915_params.c | 3 ---
drivers/gpu/drm/i915/i915_params.h | 1 -
5 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index f82f5bed69bc..11e03cfb774d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -93,6 +93,9 @@ intel_display_param_named(verbose_state_checks, bool, 0400,
intel_display_param_named_unsafe(nuclear_pageflip, bool, 0400,
"Force enable atomic functionality on platforms that don't have full support yet.");
+intel_display_param_named_unsafe(enable_dp_mst, bool, 0400,
+ "Enable multi-stream transport (MST) for new DisplayPort sinks. (default: true)");
+
intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index 40aed14d18be..6206cc51df04 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -41,6 +41,7 @@ struct drm_i915_private;
param(bool, disable_display, false, 0400) \
param(bool, verbose_state_checks, true, 0400) \
param(bool, nuclear_pageflip, false, 0400) \
+ param(bool, enable_dp_mst, true, 0600) \
param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 1891c0cc187d..e920524bec51 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -3771,7 +3771,7 @@ intel_dp_can_mst(struct intel_dp *intel_dp)
{
struct drm_i915_private *i915 = dp_to_i915(intel_dp);
- return i915->params.enable_dp_mst &&
+ return i915->display.params.enable_dp_mst &&
intel_dp_mst_source_support(intel_dp) &&
drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd);
}
@@ -3789,13 +3789,13 @@ intel_dp_configure_mst(struct intel_dp *intel_dp)
encoder->base.base.id, encoder->base.name,
str_yes_no(intel_dp_mst_source_support(intel_dp)),
str_yes_no(sink_can_mst),
- str_yes_no(i915->params.enable_dp_mst));
+ str_yes_no(i915->display.params.enable_dp_mst));
if (!intel_dp_mst_source_support(intel_dp))
return;
intel_dp->is_mst = sink_can_mst &&
- i915->params.enable_dp_mst;
+ i915->display.params.enable_dp_mst;
drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr,
intel_dp->is_mst);
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 18424873442d..de43048543e8 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -114,9 +114,6 @@ i915_param_named_unsafe(dmc_firmware_path, charp, 0400,
i915_param_named_unsafe(gsc_firmware_path, charp, 0400,
"GSC firmware path to use instead of the default one");
-i915_param_named_unsafe(enable_dp_mst, bool, 0400,
- "Enable multi-stream transport (MST) for new DisplayPort sinks. (default: true)");
-
#if IS_ENABLED(CONFIG_DRM_I915_DEBUG)
i915_param_named_unsafe(inject_probe_failure, uint, 0400,
"Force an error after a number of failure check points (0:disabled (default), N:force failure at the Nth failure check point)");
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index c7fff571db2c..1315d7fac850 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -64,7 +64,6 @@ struct drm_printer;
/* leave bools at the end to not create holes */ \
param(bool, enable_hangcheck, true, 0600) \
param(bool, error_capture, true, IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) ? 0600 : 0) \
- param(bool, enable_dp_mst, true, 0600) \
param(bool, enable_gvt, false, IS_ENABLED(CONFIG_DRM_I915_GVT) ? 0400 : 0)
#define MEMBER(T, member, ...) T member;
--
2.34.1
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Framework for display parameters (rev5)
2023-10-24 12:40 [Intel-gfx] [PATCH v4 00/23] Framework for display parameters Jouni Högander
` (22 preceding siblings ...)
2023-10-24 12:41 ` [Intel-gfx] [PATCH v4 23/23] drm/i915/display: Move enable_dp_mst " Jouni Högander
@ 2023-10-24 23:19 ` Patchwork
2023-10-24 23:19 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
` (3 subsequent siblings)
27 siblings, 0 replies; 30+ messages in thread
From: Patchwork @ 2023-10-24 23:19 UTC (permalink / raw)
To: Jouni Högander; +Cc: intel-gfx
== Series Details ==
Series: Framework for display parameters (rev5)
URL : https://patchwork.freedesktop.org/series/124645/
State : warning
== Summary ==
Error: dim checkpatch failed
51b8349c8a4e drm/i915/display: Add framework to add parameters specific to display
Traceback (most recent call last):
File "scripts/spdxcheck.py", line 6, in <module>
from ply import lex, yacc
ModuleNotFoundError: No module named 'ply'
Traceback (most recent call last):
File "scripts/spdxcheck.py", line 6, in <module>
from ply import lex, yacc
ModuleNotFoundError: No module named 'ply'
Traceback (most recent call last):
File "scripts/spdxcheck.py", line 6, in <module>
from ply import lex, yacc
ModuleNotFoundError: No module named 'ply'
-:84: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#84:
new file mode 100644
-:212: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#212: FILE: drivers/gpu/drm/i915/display/intel_display_debugfs_params.c:124:
+intel_display_debugfs_create_int(const char *name, umode_t mode,
+ struct dentry *parent, int *value)
-:221: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#221: FILE: drivers/gpu/drm/i915/display/intel_display_debugfs_params.c:133:
+intel_display_debugfs_create_uint(const char *name, umode_t mode,
+ struct dentry *parent, unsigned int *value)
-:228: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'mode' - possible side-effects?
#228: FILE: drivers/gpu/drm/i915/display/intel_display_debugfs_params.c:140:
+#define _intel_display_param_create_file(parent, name, mode, valp) \
+ do { \
+ if (mode) \
+ _Generic(valp, \
+ bool * : debugfs_create_bool, \
+ int * : intel_display_debugfs_create_int, \
+ unsigned int * : intel_display_debugfs_create_uint, \
+ unsigned long * : debugfs_create_ulong, \
+ char ** : debugfs_create_str) \
+ (name, mode, parent, valp); \
+ } while (0)
-:228: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'valp' - possible side-effects?
#228: FILE: drivers/gpu/drm/i915/display/intel_display_debugfs_params.c:140:
+#define _intel_display_param_create_file(parent, name, mode, valp) \
+ do { \
+ if (mode) \
+ _Generic(valp, \
+ bool * : debugfs_create_bool, \
+ int * : intel_display_debugfs_create_int, \
+ unsigned int * : intel_display_debugfs_create_uint, \
+ unsigned long * : debugfs_create_ulong, \
+ char ** : debugfs_create_str) \
+ (name, mode, parent, valp); \
+ } while (0)
-:231: CHECK:CAMELCASE: Avoid CamelCase: <_Generic>
#231: FILE: drivers/gpu/drm/i915/display/intel_display_debugfs_params.c:143:
+ _Generic(valp, \
-:236: CHECK:SPACING: spaces preferred around that '*' (ctx:WxO)
#236: FILE: drivers/gpu/drm/i915/display/intel_display_debugfs_params.c:148:
+ char ** : debugfs_create_str) \
^
-:236: ERROR:SPACING: space prohibited after that '*' (ctx:OxW)
#236: FILE: drivers/gpu/drm/i915/display/intel_display_debugfs_params.c:148:
+ char ** : debugfs_create_str) \
^
-:260: WARNING:TRAILING_SEMICOLON: macros should not use a trailing semicolon
#260: FILE: drivers/gpu/drm/i915/display/intel_display_debugfs_params.c:172:
+#define REGISTER(T, x, unused, mode, ...) _intel_display_param_create_file( \
+ dir, #x, mode, &i915->display.params.x);
-:336: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'name' - possible side-effects?
#336: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:9:
+#define intel_display_param_named(name, T, perm, desc) \
+ module_param_named(name, intel_display_modparams.name, T, perm); \
+ MODULE_PARM_DESC(name, desc)
-:339: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'name' - possible side-effects?
#339: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:12:
+#define intel_display_param_named_unsafe(name, T, perm, desc) \
+ module_param_named_unsafe(name, intel_display_modparams.name, T, perm); \
+ MODULE_PARM_DESC(name, desc)
-:348: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#348: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:21:
+};
+/*
-:366: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#366: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:39:
+#define _param_dup(valp) \
+ _Generic(valp, \
+ char ** : _param_dup_charp, \
+ default : _param_nop) \
+ (valp)
-:366: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'valp' - possible side-effects?
#366: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:39:
+#define _param_dup(valp) \
+ _Generic(valp, \
+ char ** : _param_dup_charp, \
+ default : _param_nop) \
+ (valp)
-:368: CHECK:SPACING: spaces preferred around that '*' (ctx:WxO)
#368: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:41:
+ char ** : _param_dup_charp, \
^
-:368: ERROR:SPACING: space prohibited after that '*' (ctx:OxW)
#368: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:41:
+ char ** : _param_dup_charp, \
^
-:369: WARNING:TABSTOP: Statements should start on a tabstop
#369: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:42:
+ default : _param_nop) \
-:369: ERROR:TRAILING_STATEMENTS: trailing statements should be on next line
#369: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:42:
+ default : _param_nop) \
-:375: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'x' may be better as '(x)' to avoid precedence issues
#375: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:48:
+#define DUP(T, x, ...) _param_dup(&dest->x);
-:375: WARNING:TRAILING_SEMICOLON: macros should not use a trailing semicolon
#375: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:48:
+#define DUP(T, x, ...) _param_dup(&dest->x);
-:386: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#386: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:59:
+#define _param_free(valp) \
+ _Generic(valp, \
+ char ** : _param_free_charp, \
+ default : _param_nop) \
+ (valp)
-:386: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'valp' - possible side-effects?
#386: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:59:
+#define _param_free(valp) \
+ _Generic(valp, \
+ char ** : _param_free_charp, \
+ default : _param_nop) \
+ (valp)
-:388: CHECK:SPACING: spaces preferred around that '*' (ctx:WxO)
#388: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:61:
+ char ** : _param_free_charp, \
^
-:388: ERROR:SPACING: space prohibited after that '*' (ctx:OxW)
#388: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:61:
+ char ** : _param_free_charp, \
^
-:389: WARNING:TABSTOP: Statements should start on a tabstop
#389: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:62:
+ default : _param_nop) \
-:389: ERROR:TRAILING_STATEMENTS: trailing statements should be on next line
#389: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:62:
+ default : _param_nop) \
-:395: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'x' may be better as '(x)' to avoid precedence issues
#395: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:68:
+#define FREE(T, x, ...) _param_free(¶ms->x);
-:395: WARNING:TRAILING_SEMICOLON: macros should not use a trailing semicolon
#395: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:68:
+#define FREE(T, x, ...) _param_free(¶ms->x);
-:405: WARNING:SPDX_LICENSE_TAG: Improper SPDX comment style for 'drivers/gpu/drm/i915/display/intel_display_params.h', please use '/*' instead
#405: FILE: drivers/gpu/drm/i915/display/intel_display_params.h:1:
+// SPDX-License-Identifier: MIT
-:405: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier tag in line 1
#405: FILE: drivers/gpu/drm/i915/display/intel_display_params.h:1:
+// SPDX-License-Identifier: MIT
-:429: ERROR:MULTISTATEMENT_MACRO_USE_DO_WHILE: Macros with multiple statements should be enclosed in a do - while loop
#429: FILE: drivers/gpu/drm/i915/display/intel_display_params.h:25:
+#define MEMBER(T, member, ...) T member;
-:429: WARNING:TRAILING_SEMICOLON: macros should not use a trailing semicolon
#429: FILE: drivers/gpu/drm/i915/display/intel_display_params.h:25:
+#define MEMBER(T, member, ...) T member;
-:433: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#433: FILE: drivers/gpu/drm/i915/display/intel_display_params.h:29:
+};
+#undef MEMBER
total: 8 errors, 9 warnings, 16 checks, 371 lines checked
f681b8707b68 drm/i915/display: Dump also display parameters
-:63: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'val' - possible side-effects?
#63: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:65:
+#define _param_print(p, driver_name, name, val) \
+ _Generic(val, \
+ bool : _param_print_bool, \
+ int : _param_print_int, \
+ unsigned int : _param_print_uint, \
+ unsigned long : _param_print_ulong, \
+ char * : _param_print_charp)(p, driver_name, name, val)
-:64: CHECK:CAMELCASE: Avoid CamelCase: <_Generic>
#64: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:66:
+ _Generic(val, \
-:80: WARNING:TRAILING_SEMICOLON: macros should not use a trailing semicolon
#80: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:82:
+#define PRINT(T, x, ...) _param_print(p, i915->drm.driver->name, #x, i915->display.params.x);
total: 0 errors, 1 warnings, 2 checks, 128 lines checked
18d2515acc3a drm/i915/display: Move enable_fbc module parameter under display
-:11: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:35: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#35: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:31:
+intel_display_param_named_unsafe(enable_fbc, int, 0400,
+ "Enable frame buffer compression for power savings "
total: 0 errors, 1 warnings, 1 checks, 73 lines checked
d36a39153e1d drm/i915/display: Move psr related module parameters under display
-:31: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#31: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:35:
+intel_display_param_named_unsafe(enable_psr, int, 0400,
+ "Enable PSR "
-:36: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#36: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:40:
+intel_display_param_named(psr_safest_params, bool, 0400,
+ "Replace PSR VBT parameters by the safest and not optimal ones. This "
-:42: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#42: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:46:
+intel_display_param_named_unsafe(enable_psr2_sel_fetch, bool, 0400,
+ "Enable PSR2 selective fetch "
total: 0 errors, 0 warnings, 3 checks, 121 lines checked
96c394895b05 drm/i915/display: Move vbt_firmware module parameter under display
-:11: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:22: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#22: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:31:
+intel_display_param_named_unsafe(vbt_firmware, charp, 0400,
+ "Load VBT from specified file under /lib/firmware");
total: 0 errors, 1 warnings, 1 checks, 40 lines checked
43fd7d137fe2 drm/i915/display: Move lvds_channel_mode module parameter under display
-:11: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:22: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#22: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:34:
+intel_display_param_named_unsafe(lvds_channel_mode, int, 0400,
+ "Specify LVDS channel mode "
total: 0 errors, 1 warnings, 1 checks, 44 lines checked
779bd28f38c8 drm/i915/display: Move panel_use_ssc module parameter under display
-:11: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:22: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#22: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:38:
+intel_display_param_named_unsafe(panel_use_ssc, int, 0400,
+ "Use Spread Spectrum Clock with panels [LVDS/eDP] "
total: 0 errors, 1 warnings, 1 checks, 44 lines checked
1fd6bcc76c73 drm/i915/display: Move vbt_sdvo_panel_type module parameter under display
-:11: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:35: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#35: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:42:
+intel_display_param_named_unsafe(vbt_sdvo_panel_type, int, 0400,
+ "Override/Ignore selection of SDVO panel mode in the VBT "
total: 0 errors, 1 warnings, 1 checks, 42 lines checked
5a66e55632de drm/i915/display: Move enable_dc module parameter under display
-:11: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:22: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#22: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:46:
+intel_display_param_named_unsafe(enable_dc, int, 0400,
+ "Enable power-saving display C-states. "
total: 0 errors, 1 warnings, 1 checks, 44 lines checked
2149e6dea801 drm/i915/display: Move enable_dpt module parameter under display
-:11: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:22: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#22: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:51:
+intel_display_param_named_unsafe(enable_dpt, bool, 0400,
+ "Enable display page table (DPT) (default: true)");
total: 0 errors, 1 warnings, 1 checks, 63 lines checked
00d6789e49a6 drm/i915/display: Move enable_sagv module parameter under display
-:27: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#27: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:54:
+intel_display_param_named_unsafe(enable_sagv, bool, 0400,
+ "Enable system agent voltage/frequency scaling (SAGV) (default: true)");
total: 0 errors, 0 warnings, 1 checks, 49 lines checked
0fcada580df6 drm/i915/display: Move disable_power_well module parameter under display
-:11: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:22: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#22: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:57:
+intel_display_param_named_unsafe(disable_power_well, int, 0400,
+ "Disable display power wells when possible "
total: 0 errors, 1 warnings, 1 checks, 77 lines checked
8a3c883eec93 drm/i915/display: Move enable_ips module parameter under display
a42f20d149e6 drm/i915/display: Move invert_brightness module parameter under display
-:11: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:51: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#51: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:63:
+intel_display_param_named_unsafe(invert_brightness, int, 0400,
+ "Invert backlight brightness "
total: 0 errors, 1 warnings, 1 checks, 63 lines checked
0e758909b0b4 drm/i915/display: Move edp_vswing module parameter under display
-:11: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:39: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#39: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:71:
+intel_display_param_named_unsafe(edp_vswing, int, 0400,
+ "Ignore/Override vswing pre-emph table selection from VBT "
total: 0 errors, 1 warnings, 1 checks, 49 lines checked
030357d959cc drm/i915/display: Move enable_dpcd_backlight module parameter under display
-:11: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:22: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#22: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:76:
+intel_display_param_named(enable_dpcd_backlight, int, 0400,
+ "Enable support for DPCD backlight control"
total: 0 errors, 1 warnings, 1 checks, 50 lines checked
bf9300450fe8 drm/i915/display: Move load_detect_test parameter under display
-:11: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:44: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#44: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:80:
+intel_display_param_named_unsafe(load_detect_test, bool, 0400,
+ "Force-enable the VGA load detect code for testing (default:false). "
total: 0 errors, 1 warnings, 1 checks, 50 lines checked
8fbea4186f54 drm/i915/display: Move force_reset_modeset_test parameter under display
-:11: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:22: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#22: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:84:
+intel_display_param_named_unsafe(force_reset_modeset_test, bool, 0400,
+ "Force a modeset during gpu reset for testing (default:false). "
total: 0 errors, 1 warnings, 1 checks, 42 lines checked
5a31563df212 drm/i915/display: Move disable_display parameter under display
-:11: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:34: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#34: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:88:
+intel_display_param_named(disable_display, bool, 0400,
+ "Disable display (default: false)");
total: 0 errors, 1 warnings, 1 checks, 39 lines checked
9e2b3fd83bdc drm/i915/display: Use device parameters instead of module in I915_STATE_WARN
-:39: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#39: FILE: drivers/gpu/drm/i915/i915_params.c:97:
+i915_param_named(verbose_state_checks, bool, 0400,
"Enable verbose logs (ie. WARN_ON()) in case of unexpected hw state conditions.");
total: 0 errors, 0 warnings, 1 checks, 17 lines checked
370113bbbf29 drm/i915/display: Move verbose_state_checks under display
-:39: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#39: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:91:
+intel_display_param_named(verbose_state_checks, bool, 0400,
+ "Enable verbose logs (ie. WARN_ON()) in case of unexpected hw state conditions.");
total: 0 errors, 0 warnings, 1 checks, 40 lines checked
f9b79d55beb5 drm/i915/display: Move nuclear_pageflip under display
-:10: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:34: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#34: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:94:
+intel_display_param_named_unsafe(nuclear_pageflip, bool, 0400,
+ "Force enable atomic functionality on platforms that don't have full support yet.");
total: 0 errors, 1 warnings, 1 checks, 40 lines checked
600423803c05 drm/i915/display: Move enable_dp_mst under display
-:10: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:21: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#21: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:97:
+intel_display_param_named_unsafe(enable_dp_mst, bool, 0400,
+ "Enable multi-stream transport (MST) for new DisplayPort sinks. (default: true)");
total: 0 errors, 1 warnings, 1 checks, 55 lines checked
^ permalink raw reply [flat|nested] 30+ messages in thread* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Framework for display parameters (rev5)
2023-10-24 12:40 [Intel-gfx] [PATCH v4 00/23] Framework for display parameters Jouni Högander
` (23 preceding siblings ...)
2023-10-24 23:19 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Framework for display parameters (rev5) Patchwork
@ 2023-10-24 23:19 ` Patchwork
2023-10-24 23:29 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
` (2 subsequent siblings)
27 siblings, 0 replies; 30+ messages in thread
From: Patchwork @ 2023-10-24 23:19 UTC (permalink / raw)
To: Jouni Högander; +Cc: intel-gfx
== Series Details ==
Series: Framework for display parameters (rev5)
URL : https://patchwork.freedesktop.org/series/124645/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
^ permalink raw reply [flat|nested] 30+ messages in thread* [Intel-gfx] ✓ Fi.CI.BAT: success for Framework for display parameters (rev5)
2023-10-24 12:40 [Intel-gfx] [PATCH v4 00/23] Framework for display parameters Jouni Högander
` (24 preceding siblings ...)
2023-10-24 23:19 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
@ 2023-10-24 23:29 ` Patchwork
2023-10-25 15:00 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2023-10-26 9:23 ` [Intel-gfx] [PATCH v4 00/23] Framework for display parameters Hogander, Jouni
27 siblings, 0 replies; 30+ messages in thread
From: Patchwork @ 2023-10-24 23:29 UTC (permalink / raw)
To: Jouni Högander; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 4083 bytes --]
== Series Details ==
Series: Framework for display parameters (rev5)
URL : https://patchwork.freedesktop.org/series/124645/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13782 -> Patchwork_124645v5
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/index.html
Participating hosts (38 -> 33)
------------------------------
Missing (5): bat-adlp-11 bat-dg2-9 fi-snb-2520m fi-hsw-4770 bat-mtlp-8
Known issues
------------
Here are the changes found in Patchwork_124645v5 that come from known issues:
### IGT changes ###
#### Possible fixes ####
* igt@kms_hdmi_inject@inject-audio:
- fi-kbl-guc: [FAIL][1] ([IGT#3]) -> [PASS][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/fi-kbl-guc/igt@kms_hdmi_inject@inject-audio.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/fi-kbl-guc/igt@kms_hdmi_inject@inject-audio.html
* igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-hdmi-a-3:
- bat-dg2-11: [INCOMPLETE][3] -> [PASS][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/bat-dg2-11/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-hdmi-a-3.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/bat-dg2-11/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-hdmi-a-3.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[IGT#3]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/3
[i915#7952]: https://gitlab.freedesktop.org/drm/intel/issues/7952
Build changes
-------------
* Linux: CI_DRM_13782 -> Patchwork_124645v5
CI-20190529: 20190529
CI_DRM_13782: 16c18fef1215015ab3d1a0dd3b06cf6131fe23bd @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7552: 557856802dfee103802f1157f97c65bb476d5468 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_124645v5: 16c18fef1215015ab3d1a0dd3b06cf6131fe23bd @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
091857bbc15a drm/i915/display: Move enable_dp_mst under display
c7b7e462bec5 drm/i915/display: Move nuclear_pageflip under display
18f4fd5aca2c drm/i915/display: Move verbose_state_checks under display
ff44e7759bb4 drm/i915/display: Use device parameters instead of module in I915_STATE_WARN
4c58e18357ee drm/i915/display: Move disable_display parameter under display
22dfab18f30a drm/i915/display: Move force_reset_modeset_test parameter under display
8f999a032b63 drm/i915/display: Move load_detect_test parameter under display
d1b4c6967dcd drm/i915/display: Move enable_dpcd_backlight module parameter under display
775f5af821ea drm/i915/display: Move edp_vswing module parameter under display
bbc6ff223524 drm/i915/display: Move invert_brightness module parameter under display
7be3e50df7d6 drm/i915/display: Move enable_ips module parameter under display
0bd4081be5da drm/i915/display: Move disable_power_well module parameter under display
c7e551a5de6e drm/i915/display: Move enable_sagv module parameter under display
5482ca2f8dbd drm/i915/display: Move enable_dpt module parameter under display
be5c72cc44e0 drm/i915/display: Move enable_dc module parameter under display
d638ce5200c4 drm/i915/display: Move vbt_sdvo_panel_type module parameter under display
545ed0dd7ef1 drm/i915/display: Move panel_use_ssc module parameter under display
6646f0e62010 drm/i915/display: Move lvds_channel_mode module parameter under display
481c1d9f2dab drm/i915/display: Move vbt_firmware module parameter under display
4598f41c689f drm/i915/display: Move psr related module parameters under display
81679764397a drm/i915/display: Move enable_fbc module parameter under display
3ac4fed08b77 drm/i915/display: Dump also display parameters
4ed7502f4aa9 drm/i915/display: Add framework to add parameters specific to display
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/index.html
[-- Attachment #2: Type: text/html, Size: 4797 bytes --]
^ permalink raw reply [flat|nested] 30+ messages in thread* [Intel-gfx] ✗ Fi.CI.IGT: failure for Framework for display parameters (rev5)
2023-10-24 12:40 [Intel-gfx] [PATCH v4 00/23] Framework for display parameters Jouni Högander
` (25 preceding siblings ...)
2023-10-24 23:29 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2023-10-25 15:00 ` Patchwork
2023-10-26 9:23 ` [Intel-gfx] [PATCH v4 00/23] Framework for display parameters Hogander, Jouni
27 siblings, 0 replies; 30+ messages in thread
From: Patchwork @ 2023-10-25 15:00 UTC (permalink / raw)
To: Hogander, Jouni; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 100266 bytes --]
== Series Details ==
Series: Framework for display parameters (rev5)
URL : https://patchwork.freedesktop.org/series/124645/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13782_full -> Patchwork_124645v5_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_124645v5_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_124645v5_full, please notify your bug team (lgci.bug.filing@intel.com) to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/index.html
Participating hosts (12 -> 11)
------------------------------
Additional (1): shard-tglu0
Missing (2): shard-mtlp0 shard-rkl0
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_124645v5_full:
### IGT changes ###
#### Possible regressions ####
* igt@gem_exec_endless@dispatch@bcs0:
- shard-rkl: [PASS][1] -> [SKIP][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-4/igt@gem_exec_endless@dispatch@bcs0.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@gem_exec_endless@dispatch@bcs0.html
* igt@gem_render_copy@y-tiled-to-vebox-y-tiled:
- shard-rkl: NOTRUN -> [SKIP][3] +1 other test skip
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@gem_render_copy@y-tiled-to-vebox-y-tiled.html
#### Warnings ####
* igt@kms_color@deep-color:
- shard-rkl: [SKIP][4] ([i915#3555]) -> [SKIP][5]
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-7/igt@kms_color@deep-color.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@kms_color@deep-color.html
Known issues
------------
Here are the changes found in Patchwork_124645v5_full that come from known issues:
### CI changes ###
#### Issues hit ####
* boot:
- shard-glk: ([PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], [PASS][26], [PASS][27], [PASS][28], [PASS][29], [PASS][30]) -> ([PASS][31], [PASS][32], [PASS][33], [FAIL][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49], [PASS][50], [PASS][51], [PASS][52], [PASS][53], [PASS][54], [PASS][55]) ([i915#8293])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-glk9/boot.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-glk9/boot.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-glk9/boot.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-glk9/boot.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-glk8/boot.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-glk8/boot.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-glk8/boot.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-glk8/boot.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-glk8/boot.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-glk7/boot.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-glk7/boot.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-glk5/boot.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-glk5/boot.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-glk4/boot.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-glk4/boot.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-glk4/boot.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-glk4/boot.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-glk3/boot.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-glk3/boot.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-glk3/boot.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-glk3/boot.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-glk3/boot.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-glk2/boot.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-glk2/boot.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-glk2/boot.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-glk8/boot.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-glk8/boot.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-glk4/boot.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-glk5/boot.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-glk5/boot.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-glk5/boot.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-glk8/boot.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-glk8/boot.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-glk8/boot.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-glk9/boot.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-glk9/boot.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-glk9/boot.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-glk9/boot.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-glk2/boot.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-glk2/boot.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-glk2/boot.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-glk2/boot.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-glk3/boot.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-glk3/boot.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-glk3/boot.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-glk4/boot.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-glk4/boot.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-glk7/boot.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-glk7/boot.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-glk4/boot.html
### IGT changes ###
#### Issues hit ####
* igt@api_intel_bb@blit-reloc-purge-cache:
- shard-dg2: NOTRUN -> [SKIP][56] ([i915#8411])
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-1/igt@api_intel_bb@blit-reloc-purge-cache.html
* igt@api_intel_bb@crc32:
- shard-rkl: NOTRUN -> [SKIP][57] ([i915#6230])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-2/igt@api_intel_bb@crc32.html
* igt@api_intel_bb@object-reloc-keep-cache:
- shard-mtlp: NOTRUN -> [SKIP][58] ([i915#8411])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-8/igt@api_intel_bb@object-reloc-keep-cache.html
* igt@device_reset@unbind-cold-reset-rebind:
- shard-mtlp: NOTRUN -> [SKIP][59] ([i915#7701])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-2/igt@device_reset@unbind-cold-reset-rebind.html
* igt@drm_fdinfo@busy@vcs0:
- shard-mtlp: NOTRUN -> [SKIP][60] ([i915#8414]) +6 other tests skip
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-8/igt@drm_fdinfo@busy@vcs0.html
* igt@drm_fdinfo@most-busy-check-all@bcs0:
- shard-dg2: NOTRUN -> [SKIP][61] ([i915#8414]) +11 other tests skip
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-6/igt@drm_fdinfo@most-busy-check-all@bcs0.html
* igt@drm_fdinfo@virtual-idle:
- shard-rkl: [PASS][62] -> [FAIL][63] ([i915#7742]) +1 other test fail
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-1/igt@drm_fdinfo@virtual-idle.html
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-1/igt@drm_fdinfo@virtual-idle.html
* igt@drm_read@empty-block:
- shard-rkl: [PASS][64] -> [SKIP][65] ([i915#1845] / [i915#4098]) +16 other tests skip
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-7/igt@drm_read@empty-block.html
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@drm_read@empty-block.html
* igt@gem_ccs@ctrl-surf-copy:
- shard-mtlp: NOTRUN -> [SKIP][66] ([i915#3555])
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-8/igt@gem_ccs@ctrl-surf-copy.html
* igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-lmem0-lmem0:
- shard-dg2: NOTRUN -> [INCOMPLETE][67] ([i915#7297])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-2/igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-lmem0-lmem0.html
* igt@gem_create@hog-create@smem0:
- shard-mtlp: NOTRUN -> [FAIL][68] ([i915#8758])
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-3/igt@gem_create@hog-create@smem0.html
* igt@gem_ctx_persistence@hang:
- shard-dg2: NOTRUN -> [SKIP][69] ([i915#8555])
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-1/igt@gem_ctx_persistence@hang.html
* igt@gem_ctx_persistence@heartbeat-hang:
- shard-mtlp: NOTRUN -> [SKIP][70] ([i915#8555]) +1 other test skip
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-8/igt@gem_ctx_persistence@heartbeat-hang.html
* igt@gem_ctx_persistence@heartbeat-hostile:
- shard-dg1: NOTRUN -> [SKIP][71] ([i915#8555])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg1-18/igt@gem_ctx_persistence@heartbeat-hostile.html
* igt@gem_ctx_persistence@saturated-hostile-nopreempt@vcs1:
- shard-mtlp: NOTRUN -> [SKIP][72] ([i915#5882]) +5 other tests skip
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-5/igt@gem_ctx_persistence@saturated-hostile-nopreempt@vcs1.html
* igt@gem_ctx_sseu@invalid-sseu:
- shard-dg2: NOTRUN -> [SKIP][73] ([i915#280]) +1 other test skip
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-6/igt@gem_ctx_sseu@invalid-sseu.html
* igt@gem_ctx_sseu@mmap-args:
- shard-mtlp: NOTRUN -> [SKIP][74] ([i915#280])
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-2/igt@gem_ctx_sseu@mmap-args.html
* igt@gem_eio@hibernate:
- shard-tglu: [PASS][75] -> [ABORT][76] ([i915#7975] / [i915#8213] / [i915#8398])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-tglu-4/igt@gem_eio@hibernate.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-tglu-10/igt@gem_eio@hibernate.html
* igt@gem_eio@in-flight-contexts-1us:
- shard-mtlp: [PASS][77] -> [ABORT][78] ([i915#9262])
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-mtlp-5/igt@gem_eio@in-flight-contexts-1us.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-4/igt@gem_eio@in-flight-contexts-1us.html
* igt@gem_eio@kms:
- shard-dg2: NOTRUN -> [INCOMPLETE][79] ([i915#7892])
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-1/igt@gem_eio@kms.html
* igt@gem_exec_balancer@bonded-dual:
- shard-dg2: NOTRUN -> [SKIP][80] ([i915#4771])
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-6/igt@gem_exec_balancer@bonded-dual.html
* igt@gem_exec_balancer@parallel-ordering:
- shard-rkl: NOTRUN -> [SKIP][81] ([i915#4525])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-2/igt@gem_exec_balancer@parallel-ordering.html
* igt@gem_exec_capture@capture-invisible@smem0:
- shard-mtlp: NOTRUN -> [SKIP][82] ([i915#6334])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-8/igt@gem_exec_capture@capture-invisible@smem0.html
* igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-apl: [PASS][83] -> [FAIL][84] ([i915#2842])
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-apl3/igt@gem_exec_fair@basic-none-solo@rcs0.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-apl1/igt@gem_exec_fair@basic-none-solo@rcs0.html
* igt@gem_exec_fair@basic-pace:
- shard-mtlp: NOTRUN -> [SKIP][85] ([i915#4473] / [i915#4771]) +1 other test skip
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-5/igt@gem_exec_fair@basic-pace.html
* igt@gem_exec_fence@concurrent:
- shard-mtlp: NOTRUN -> [SKIP][86] ([i915#4812]) +1 other test skip
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-3/igt@gem_exec_fence@concurrent.html
* igt@gem_exec_fence@parallel@vecs0:
- shard-mtlp: [PASS][87] -> [FAIL][88] ([i915#8957]) +2 other tests fail
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-mtlp-5/igt@gem_exec_fence@parallel@vecs0.html
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-4/igt@gem_exec_fence@parallel@vecs0.html
* igt@gem_exec_flush@basic-wb-prw-default:
- shard-dg2: NOTRUN -> [SKIP][89] ([i915#3539] / [i915#4852]) +4 other tests skip
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-6/igt@gem_exec_flush@basic-wb-prw-default.html
* igt@gem_exec_gttfill@multigpu-basic:
- shard-dg2: NOTRUN -> [SKIP][90] ([i915#7697]) +2 other tests skip
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-11/igt@gem_exec_gttfill@multigpu-basic.html
* igt@gem_exec_params@rsvd2-dirt:
- shard-mtlp: NOTRUN -> [SKIP][91] ([i915#5107])
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-8/igt@gem_exec_params@rsvd2-dirt.html
* igt@gem_exec_params@secure-non-root:
- shard-dg2: NOTRUN -> [SKIP][92] ([fdo#112283])
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-1/igt@gem_exec_params@secure-non-root.html
* igt@gem_exec_reloc@basic-cpu-gtt-noreloc:
- shard-dg2: NOTRUN -> [SKIP][93] ([i915#3281]) +6 other tests skip
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-1/igt@gem_exec_reloc@basic-cpu-gtt-noreloc.html
* igt@gem_exec_reloc@basic-cpu-read-active:
- shard-rkl: [PASS][94] -> [SKIP][95] ([i915#3281]) +1 other test skip
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-5/igt@gem_exec_reloc@basic-cpu-read-active.html
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-7/igt@gem_exec_reloc@basic-cpu-read-active.html
* igt@gem_exec_reloc@basic-gtt-noreloc:
- shard-mtlp: NOTRUN -> [SKIP][96] ([i915#3281]) +9 other tests skip
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-2/igt@gem_exec_reloc@basic-gtt-noreloc.html
* igt@gem_exec_reloc@basic-gtt-wc-active:
- shard-rkl: NOTRUN -> [SKIP][97] ([i915#3281]) +6 other tests skip
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-1/igt@gem_exec_reloc@basic-gtt-wc-active.html
- shard-dg1: NOTRUN -> [SKIP][98] ([i915#3281]) +4 other tests skip
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg1-18/igt@gem_exec_reloc@basic-gtt-wc-active.html
* igt@gem_exec_schedule@preempt-engines@ccs0:
- shard-mtlp: [PASS][99] -> [FAIL][100] ([i915#9119]) +4 other tests fail
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-mtlp-5/igt@gem_exec_schedule@preempt-engines@ccs0.html
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-4/igt@gem_exec_schedule@preempt-engines@ccs0.html
* igt@gem_exec_schedule@preempt-engines@rcs0:
- shard-mtlp: [PASS][101] -> [DMESG-FAIL][102] ([i915#8962]) +3 other tests dmesg-fail
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-mtlp-5/igt@gem_exec_schedule@preempt-engines@rcs0.html
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-4/igt@gem_exec_schedule@preempt-engines@rcs0.html
* igt@gem_exec_schedule@preempt-queue-contexts:
- shard-mtlp: NOTRUN -> [SKIP][103] ([i915#4537] / [i915#4812])
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-2/igt@gem_exec_schedule@preempt-queue-contexts.html
* igt@gem_exec_schedule@reorder-wide:
- shard-dg2: NOTRUN -> [SKIP][104] ([i915#4537] / [i915#4812])
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-11/igt@gem_exec_schedule@reorder-wide.html
* igt@gem_exec_suspend@basic-s4-devices@smem:
- shard-rkl: NOTRUN -> [ABORT][105] ([i915#7975] / [i915#8213])
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-1/igt@gem_exec_suspend@basic-s4-devices@smem.html
* igt@gem_fence_thrash@bo-copy:
- shard-dg2: NOTRUN -> [SKIP][106] ([i915#4860]) +3 other tests skip
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-6/igt@gem_fence_thrash@bo-copy.html
* igt@gem_fenced_exec_thrash@no-spare-fences-interruptible:
- shard-mtlp: NOTRUN -> [SKIP][107] ([i915#4860])
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-8/igt@gem_fenced_exec_thrash@no-spare-fences-interruptible.html
* igt@gem_huc_copy@huc-copy:
- shard-rkl: NOTRUN -> [SKIP][108] ([i915#2190])
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-2/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@basic:
- shard-mtlp: NOTRUN -> [SKIP][109] ([i915#4613]) +3 other tests skip
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-2/igt@gem_lmem_swapping@basic.html
* igt@gem_lmem_swapping@massive-random:
- shard-glk: NOTRUN -> [SKIP][110] ([fdo#109271] / [i915#4613])
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-glk3/igt@gem_lmem_swapping@massive-random.html
* igt@gem_lmem_swapping@verify-ccs:
- shard-rkl: NOTRUN -> [SKIP][111] ([i915#4613])
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-2/igt@gem_lmem_swapping@verify-ccs.html
* igt@gem_lmem_swapping@verify-random:
- shard-apl: NOTRUN -> [SKIP][112] ([fdo#109271] / [i915#4613]) +4 other tests skip
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-apl3/igt@gem_lmem_swapping@verify-random.html
* igt@gem_madvise@dontneed-before-pwrite:
- shard-rkl: [PASS][113] -> [SKIP][114] ([i915#3282]) +3 other tests skip
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-5/igt@gem_madvise@dontneed-before-pwrite.html
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-7/igt@gem_madvise@dontneed-before-pwrite.html
* igt@gem_media_fill@media-fill:
- shard-dg2: NOTRUN -> [SKIP][115] ([i915#8289])
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-1/igt@gem_media_fill@media-fill.html
* igt@gem_mmap@bad-offset:
- shard-dg2: NOTRUN -> [SKIP][116] ([i915#4083])
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-11/igt@gem_mmap@bad-offset.html
* igt@gem_mmap_gtt@cpuset-big-copy:
- shard-dg2: NOTRUN -> [SKIP][117] ([i915#4077]) +2 other tests skip
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-6/igt@gem_mmap_gtt@cpuset-big-copy.html
* igt@gem_mmap_gtt@cpuset-medium-copy-odd:
- shard-mtlp: NOTRUN -> [SKIP][118] ([i915#4077]) +10 other tests skip
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-2/igt@gem_mmap_gtt@cpuset-medium-copy-odd.html
* igt@gem_mmap_gtt@fault-concurrent-y:
- shard-dg1: NOTRUN -> [SKIP][119] ([i915#4077]) +1 other test skip
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg1-18/igt@gem_mmap_gtt@fault-concurrent-y.html
* igt@gem_mmap_wc@read-write:
- shard-mtlp: NOTRUN -> [SKIP][120] ([i915#4083]) +4 other tests skip
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-2/igt@gem_mmap_wc@read-write.html
* igt@gem_mmap_wc@set-cache-level:
- shard-rkl: [PASS][121] -> [SKIP][122] ([i915#1850])
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-7/igt@gem_mmap_wc@set-cache-level.html
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@gem_mmap_wc@set-cache-level.html
* igt@gem_mmap_wc@write-gtt-read-wc:
- shard-dg1: NOTRUN -> [SKIP][123] ([i915#4083]) +2 other tests skip
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg1-18/igt@gem_mmap_wc@write-gtt-read-wc.html
* igt@gem_partial_pwrite_pread@writes-after-reads-snoop:
- shard-dg2: NOTRUN -> [SKIP][124] ([i915#3282]) +4 other tests skip
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-11/igt@gem_partial_pwrite_pread@writes-after-reads-snoop.html
* igt@gem_pwrite@basic-exhaustion:
- shard-apl: NOTRUN -> [WARN][125] ([i915#2658])
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-apl2/igt@gem_pwrite@basic-exhaustion.html
* igt@gem_pxp@create-regular-context-2:
- shard-dg2: NOTRUN -> [SKIP][126] ([i915#4270]) +1 other test skip
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-11/igt@gem_pxp@create-regular-context-2.html
* igt@gem_pxp@verify-pxp-key-change-after-suspend-resume:
- shard-rkl: NOTRUN -> [SKIP][127] ([i915#4270]) +1 other test skip
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-1/igt@gem_pxp@verify-pxp-key-change-after-suspend-resume.html
- shard-dg1: NOTRUN -> [SKIP][128] ([i915#4270])
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg1-18/igt@gem_pxp@verify-pxp-key-change-after-suspend-resume.html
* igt@gem_pxp@verify-pxp-stale-buf-optout-execution:
- shard-mtlp: NOTRUN -> [SKIP][129] ([i915#4270]) +2 other tests skip
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-8/igt@gem_pxp@verify-pxp-stale-buf-optout-execution.html
* igt@gem_readwrite@new-obj:
- shard-mtlp: NOTRUN -> [SKIP][130] ([i915#3282]) +8 other tests skip
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-2/igt@gem_readwrite@new-obj.html
* igt@gem_readwrite@read-write:
- shard-dg1: NOTRUN -> [SKIP][131] ([i915#3282])
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg1-18/igt@gem_readwrite@read-write.html
* igt@gem_render_copy@y-tiled-mc-ccs-to-y-tiled-ccs:
- shard-mtlp: NOTRUN -> [SKIP][132] ([i915#8428]) +3 other tests skip
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-8/igt@gem_render_copy@y-tiled-mc-ccs-to-y-tiled-ccs.html
* igt@gem_set_tiling_vs_blt@untiled-to-tiled:
- shard-dg2: NOTRUN -> [SKIP][133] ([i915#4079]) +1 other test skip
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-1/igt@gem_set_tiling_vs_blt@untiled-to-tiled.html
* igt@gem_userptr_blits@coherency-unsync:
- shard-rkl: NOTRUN -> [SKIP][134] ([i915#3297])
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-1/igt@gem_userptr_blits@coherency-unsync.html
- shard-dg1: NOTRUN -> [SKIP][135] ([i915#3297])
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg1-18/igt@gem_userptr_blits@coherency-unsync.html
* igt@gem_userptr_blits@create-destroy-unsync:
- shard-mtlp: NOTRUN -> [SKIP][136] ([i915#3297]) +2 other tests skip
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-2/igt@gem_userptr_blits@create-destroy-unsync.html
* igt@gem_userptr_blits@unsync-unmap:
- shard-dg2: NOTRUN -> [SKIP][137] ([i915#3297])
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-11/igt@gem_userptr_blits@unsync-unmap.html
* igt@gem_userptr_blits@vma-merge:
- shard-apl: NOTRUN -> [FAIL][138] ([i915#3318])
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-apl3/igt@gem_userptr_blits@vma-merge.html
* igt@gen3_render_tiledx_blits:
- shard-dg2: NOTRUN -> [SKIP][139] ([fdo#109289]) +3 other tests skip
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-1/igt@gen3_render_tiledx_blits.html
* igt@gen7_exec_parse@cmd-crossing-page:
- shard-mtlp: NOTRUN -> [SKIP][140] ([fdo#109289]) +3 other tests skip
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-2/igt@gen7_exec_parse@cmd-crossing-page.html
* igt@gen7_exec_parse@oacontrol-tracking:
- shard-dg1: NOTRUN -> [SKIP][141] ([fdo#109289])
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg1-18/igt@gen7_exec_parse@oacontrol-tracking.html
* igt@gen9_exec_parse@allowed-single:
- shard-dg2: NOTRUN -> [SKIP][142] ([i915#2856]) +2 other tests skip
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-6/igt@gen9_exec_parse@allowed-single.html
* igt@gen9_exec_parse@batch-without-end:
- shard-mtlp: NOTRUN -> [SKIP][143] ([i915#2856]) +1 other test skip
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-2/igt@gen9_exec_parse@batch-without-end.html
* igt@i915_fb_tiling:
- shard-dg1: NOTRUN -> [SKIP][144] ([i915#4881])
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg1-18/igt@i915_fb_tiling.html
* igt@i915_module_load@load:
- shard-glk: NOTRUN -> [SKIP][145] ([fdo#109271] / [i915#6227])
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-glk4/igt@i915_module_load@load.html
* igt@i915_pm_freq_mult@media-freq@gt0:
- shard-rkl: NOTRUN -> [SKIP][146] ([i915#6590])
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-2/igt@i915_pm_freq_mult@media-freq@gt0.html
* igt@i915_pm_rc6_residency@rc6-idle@vcs0:
- shard-rkl: [PASS][147] -> [WARN][148] ([i915#2681])
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-4/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html
* igt@i915_pm_rps@basic-api:
- shard-dg1: NOTRUN -> [SKIP][149] ([i915#6621])
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg1-18/igt@i915_pm_rps@basic-api.html
* igt@i915_pm_rps@thresholds-idle@gt0:
- shard-mtlp: NOTRUN -> [SKIP][150] ([i915#8925])
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-2/igt@i915_pm_rps@thresholds-idle@gt0.html
* igt@i915_pm_rps@thresholds-idle@gt1:
- shard-mtlp: NOTRUN -> [SKIP][151] ([i915#3555] / [i915#8925])
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-2/igt@i915_pm_rps@thresholds-idle@gt1.html
* igt@i915_pm_rps@thresholds@gt0:
- shard-dg2: NOTRUN -> [SKIP][152] ([i915#8925])
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-6/igt@i915_pm_rps@thresholds@gt0.html
* igt@i915_query@query-topology-unsupported:
- shard-mtlp: NOTRUN -> [SKIP][153] ([fdo#109302])
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-3/igt@i915_query@query-topology-unsupported.html
* igt@i915_suspend@debugfs-reader:
- shard-dg2: [PASS][154] -> [INCOMPLETE][155] ([i915#4817])
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-dg2-2/igt@i915_suspend@debugfs-reader.html
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-5/igt@i915_suspend@debugfs-reader.html
* igt@kms_addfb_basic@basic-y-tiled-legacy:
- shard-mtlp: NOTRUN -> [SKIP][156] ([i915#4212])
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-3/igt@kms_addfb_basic@basic-y-tiled-legacy.html
* igt@kms_addfb_basic@bo-too-small-due-to-tiling:
- shard-dg1: NOTRUN -> [SKIP][157] ([i915#4212])
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg1-18/igt@kms_addfb_basic@bo-too-small-due-to-tiling.html
* igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
- shard-glk: NOTRUN -> [SKIP][158] ([fdo#109271] / [i915#1769])
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-glk3/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html
- shard-dg2: NOTRUN -> [SKIP][159] ([i915#1769] / [i915#3555])
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-6/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html
* igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
- shard-rkl: NOTRUN -> [SKIP][160] ([i915#1769] / [i915#3555])
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-2/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
* igt@kms_atomic_transition@plane-all-transition:
- shard-rkl: NOTRUN -> [SKIP][161] ([i915#1845] / [i915#4098]) +7 other tests skip
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@kms_atomic_transition@plane-all-transition.html
* igt@kms_big_fb@4-tiled-32bpp-rotate-180:
- shard-rkl: NOTRUN -> [SKIP][162] ([i915#5286]) +1 other test skip
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-1/igt@kms_big_fb@4-tiled-32bpp-rotate-180.html
- shard-dg1: NOTRUN -> [SKIP][163] ([i915#4538] / [i915#5286])
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg1-18/igt@kms_big_fb@4-tiled-32bpp-rotate-180.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0:
- shard-mtlp: [PASS][164] -> [FAIL][165] ([i915#5138])
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-mtlp-3/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0.html
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-3/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0.html
* igt@kms_big_fb@linear-16bpp-rotate-90:
- shard-dg2: NOTRUN -> [SKIP][166] ([fdo#111614]) +2 other tests skip
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-11/igt@kms_big_fb@linear-16bpp-rotate-90.html
* igt@kms_big_fb@linear-32bpp-rotate-90:
- shard-mtlp: NOTRUN -> [SKIP][167] ([fdo#111614]) +3 other tests skip
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-2/igt@kms_big_fb@linear-32bpp-rotate-90.html
* igt@kms_big_fb@x-tiled-16bpp-rotate-90:
- shard-rkl: NOTRUN -> [SKIP][168] ([fdo#111614] / [i915#3638]) +1 other test skip
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-2/igt@kms_big_fb@x-tiled-16bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-64bpp-rotate-270:
- shard-dg1: NOTRUN -> [SKIP][169] ([i915#3638])
[169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg1-18/igt@kms_big_fb@y-tiled-64bpp-rotate-270.html
* igt@kms_big_fb@y-tiled-8bpp-rotate-180:
- shard-dg2: NOTRUN -> [SKIP][170] ([i915#5190]) +9 other tests skip
[170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-1/igt@kms_big_fb@y-tiled-8bpp-rotate-180.html
* igt@kms_big_fb@y-tiled-addfb-size-overflow:
- shard-mtlp: NOTRUN -> [SKIP][171] ([i915#6187]) +1 other test skip
[171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-2/igt@kms_big_fb@y-tiled-addfb-size-overflow.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
- shard-tglu: [PASS][172] -> [FAIL][173] ([i915#3743]) +6 other tests fail
[172]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-tglu-2/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
[173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-tglu-6/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
* igt@kms_big_fb@yf-tiled-32bpp-rotate-90:
- shard-dg2: NOTRUN -> [SKIP][174] ([i915#4538] / [i915#5190]) +5 other tests skip
[174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-6/igt@kms_big_fb@yf-tiled-32bpp-rotate-90.html
* igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
- shard-dg1: NOTRUN -> [SKIP][175] ([fdo#111615])
[175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg1-18/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
- shard-rkl: NOTRUN -> [SKIP][176] ([fdo#111615])
[176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-1/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
- shard-rkl: NOTRUN -> [SKIP][177] ([fdo#110723])
[177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-2/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip:
- shard-mtlp: NOTRUN -> [SKIP][178] ([fdo#111615]) +7 other tests skip
[178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-3/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
* igt@kms_big_joiner@basic:
- shard-dg2: NOTRUN -> [SKIP][179] ([i915#2705])
[179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-1/igt@kms_big_joiner@basic.html
* igt@kms_cdclk@mode-transition:
- shard-glk: NOTRUN -> [SKIP][180] ([fdo#109271]) +71 other tests skip
[180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-glk4/igt@kms_cdclk@mode-transition.html
* igt@kms_cdclk@mode-transition-all-outputs:
- shard-mtlp: NOTRUN -> [SKIP][181] ([i915#7213])
[181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-8/igt@kms_cdclk@mode-transition-all-outputs.html
* igt@kms_cdclk@plane-scaling@pipe-a-hdmi-a-2:
- shard-dg2: NOTRUN -> [SKIP][182] ([i915#4087]) +3 other tests skip
[182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-2/igt@kms_cdclk@plane-scaling@pipe-a-hdmi-a-2.html
* igt@kms_chamelium_audio@dp-audio-edid:
- shard-dg1: NOTRUN -> [SKIP][183] ([i915#7828]) +2 other tests skip
[183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg1-18/igt@kms_chamelium_audio@dp-audio-edid.html
* igt@kms_chamelium_color@ctm-0-25:
- shard-dg2: NOTRUN -> [SKIP][184] ([fdo#111827]) +1 other test skip
[184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-6/igt@kms_chamelium_color@ctm-0-25.html
* igt@kms_chamelium_color@ctm-limited-range:
- shard-mtlp: NOTRUN -> [SKIP][185] ([fdo#111827]) +1 other test skip
[185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-2/igt@kms_chamelium_color@ctm-limited-range.html
* igt@kms_chamelium_frames@hdmi-aspect-ratio:
- shard-mtlp: NOTRUN -> [SKIP][186] ([i915#7828]) +6 other tests skip
[186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-8/igt@kms_chamelium_frames@hdmi-aspect-ratio.html
* igt@kms_chamelium_frames@hdmi-crc-fast:
- shard-rkl: NOTRUN -> [SKIP][187] ([i915#7828]) +4 other tests skip
[187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-2/igt@kms_chamelium_frames@hdmi-crc-fast.html
* igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats:
- shard-dg2: NOTRUN -> [SKIP][188] ([i915#7828]) +5 other tests skip
[188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-1/igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats.html
* igt@kms_chamelium_hpd@common-hpd-after-suspend:
- shard-apl: NOTRUN -> [SKIP][189] ([fdo#109271]) +190 other tests skip
[189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-apl3/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
* igt@kms_color@legacy-gamma@pipe-a:
- shard-rkl: [PASS][190] -> [SKIP][191] ([i915#4098]) +1 other test skip
[190]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-4/igt@kms_color@legacy-gamma@pipe-a.html
[191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@kms_color@legacy-gamma@pipe-a.html
* igt@kms_content_protection@atomic:
- shard-dg1: NOTRUN -> [SKIP][192] ([i915#7116])
[192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg1-18/igt@kms_content_protection@atomic.html
* igt@kms_content_protection@dp-mst-type-0:
- shard-rkl: NOTRUN -> [SKIP][193] ([i915#3116])
[193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-2/igt@kms_content_protection@dp-mst-type-0.html
* igt@kms_content_protection@srm:
- shard-rkl: NOTRUN -> [SKIP][194] ([i915#7118]) +1 other test skip
[194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-2/igt@kms_content_protection@srm.html
* igt@kms_content_protection@type1:
- shard-dg2: NOTRUN -> [SKIP][195] ([i915#7118])
[195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-2/igt@kms_content_protection@type1.html
* igt@kms_cursor_crc@cursor-offscreen-512x512:
- shard-dg2: NOTRUN -> [SKIP][196] ([i915#3359]) +1 other test skip
[196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-11/igt@kms_cursor_crc@cursor-offscreen-512x512.html
* igt@kms_cursor_crc@cursor-random-512x170:
- shard-mtlp: NOTRUN -> [SKIP][197] ([i915#3359])
[197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-5/igt@kms_cursor_crc@cursor-random-512x170.html
* igt@kms_cursor_crc@cursor-rapid-movement-32x10:
- shard-dg1: NOTRUN -> [SKIP][198] ([i915#3555]) +1 other test skip
[198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg1-18/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html
* igt@kms_cursor_crc@cursor-sliding-32x10:
- shard-mtlp: NOTRUN -> [SKIP][199] ([i915#3555] / [i915#8814]) +3 other tests skip
[199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-5/igt@kms_cursor_crc@cursor-sliding-32x10.html
* igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy:
- shard-mtlp: NOTRUN -> [SKIP][200] ([i915#3546]) +4 other tests skip
[200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-8/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- shard-dg1: NOTRUN -> [SKIP][201] ([i915#4103] / [i915#4213])
[201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg1-18/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size:
- shard-rkl: NOTRUN -> [SKIP][202] ([fdo#111825]) +2 other tests skip
[202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-2/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-toggle:
- shard-dg2: NOTRUN -> [SKIP][203] ([fdo#109274] / [i915#5354]) +4 other tests skip
[203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-11/igt@kms_cursor_legacy@cursorb-vs-flipa-toggle.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-toggle:
- shard-apl: NOTRUN -> [SKIP][204] ([fdo#109271] / [fdo#111767]) +2 other tests skip
[204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-apl1/igt@kms_cursor_legacy@cursorb-vs-flipb-toggle.html
- shard-dg2: NOTRUN -> [SKIP][205] ([fdo#109274] / [fdo#111767] / [i915#5354])
[205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-1/igt@kms_cursor_legacy@cursorb-vs-flipb-toggle.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
- shard-dg2: NOTRUN -> [SKIP][206] ([i915#4103] / [i915#4213])
[206]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-2/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
- shard-mtlp: NOTRUN -> [SKIP][207] ([i915#4213])
[207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-8/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html
* igt@kms_cursor_legacy@single-bo@all-pipes:
- shard-mtlp: [PASS][208] -> [DMESG-WARN][209] ([i915#2017])
[208]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-mtlp-2/igt@kms_cursor_legacy@single-bo@all-pipes.html
[209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-4/igt@kms_cursor_legacy@single-bo@all-pipes.html
* igt@kms_display_modes@mst-extended-mode-negative:
- shard-rkl: NOTRUN -> [SKIP][210] ([i915#8588])
[210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-2/igt@kms_display_modes@mst-extended-mode-negative.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1:
- shard-rkl: NOTRUN -> [SKIP][211] ([i915#3804])
[211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-7/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1.html
* igt@kms_draw_crc@draw-method-mmap-gtt:
- shard-mtlp: NOTRUN -> [SKIP][212] ([i915#3555] / [i915#8812])
[212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-2/igt@kms_draw_crc@draw-method-mmap-gtt.html
* igt@kms_dsc@dsc-basic:
- shard-dg2: NOTRUN -> [SKIP][213] ([i915#3555] / [i915#3840])
[213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-1/igt@kms_dsc@dsc-basic.html
* igt@kms_dsc@dsc-with-output-formats:
- shard-mtlp: NOTRUN -> [SKIP][214] ([i915#3555] / [i915#3840])
[214]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-8/igt@kms_dsc@dsc-with-output-formats.html
* igt@kms_flip@2x-flip-vs-expired-vblank:
- shard-mtlp: NOTRUN -> [SKIP][215] ([i915#3637]) +8 other tests skip
[215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-3/igt@kms_flip@2x-flip-vs-expired-vblank.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-hdmi-a1-hdmi-a2:
- shard-glk: [PASS][216] -> [FAIL][217] ([i915#79])
[216]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-glk4/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-hdmi-a1-hdmi-a2.html
[217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-glk2/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-hdmi-a1-hdmi-a2.html
* igt@kms_flip@2x-flip-vs-fences:
- shard-mtlp: NOTRUN -> [SKIP][218] ([i915#8381]) +1 other test skip
[218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-8/igt@kms_flip@2x-flip-vs-fences.html
* igt@kms_flip@2x-flip-vs-rmfb:
- shard-dg2: NOTRUN -> [SKIP][219] ([fdo#109274]) +2 other tests skip
[219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-6/igt@kms_flip@2x-flip-vs-rmfb.html
* igt@kms_flip@2x-flip-vs-suspend@ab-vga1-hdmi-a1:
- shard-snb: NOTRUN -> [DMESG-WARN][220] ([i915#8841])
[220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-snb1/igt@kms_flip@2x-flip-vs-suspend@ab-vga1-hdmi-a1.html
* igt@kms_flip@2x-plain-flip-interruptible:
- shard-snb: NOTRUN -> [SKIP][221] ([fdo#109271]) +1 other test skip
[221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-snb7/igt@kms_flip@2x-plain-flip-interruptible.html
* igt@kms_flip@basic-flip-vs-wf_vblank:
- shard-rkl: NOTRUN -> [SKIP][222] ([i915#3637] / [i915#4098]) +5 other tests skip
[222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@kms_flip@basic-flip-vs-wf_vblank.html
* igt@kms_flip@flip-vs-fences-interruptible:
- shard-dg2: NOTRUN -> [SKIP][223] ([i915#8381])
[223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-11/igt@kms_flip@flip-vs-fences-interruptible.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling@pipe-a-valid-mode:
- shard-dg1: NOTRUN -> [SKIP][224] ([i915#2587] / [i915#2672]) +1 other test skip
[224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg1-18/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-downscaling@pipe-a-default-mode:
- shard-mtlp: NOTRUN -> [SKIP][225] ([i915#3555] / [i915#8810])
[225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-2/igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-default-mode:
- shard-mtlp: NOTRUN -> [SKIP][226] ([i915#2672]) +2 other tests skip
[226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-8/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling:
- shard-rkl: NOTRUN -> [SKIP][227] ([i915#3555]) +8 other tests skip
[227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode:
- shard-rkl: NOTRUN -> [SKIP][228] ([i915#2672]) +6 other tests skip
[228]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-4/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-upscaling@pipe-a-valid-mode:
- shard-dg2: NOTRUN -> [SKIP][229] ([i915#2672]) +3 other tests skip
[229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-1/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-upscaling@pipe-a-valid-mode.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-gtt:
- shard-dg2: NOTRUN -> [SKIP][230] ([i915#8708]) +12 other tests skip
[230]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-11/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-blt:
- shard-mtlp: NOTRUN -> [SKIP][231] ([i915#1825]) +28 other tests skip
[231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render:
- shard-dg1: NOTRUN -> [SKIP][232] ([fdo#111825]) +6 other tests skip
[232]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg1-18/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-wc:
- shard-rkl: NOTRUN -> [SKIP][233] ([fdo#111825] / [i915#1825]) +17 other tests skip
[233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary:
- shard-rkl: [PASS][234] -> [SKIP][235] ([i915#1849] / [i915#4098]) +10 other tests skip
[234]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-4/igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary.html
[235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-render:
- shard-dg2: NOTRUN -> [SKIP][236] ([i915#5354]) +20 other tests skip
[236]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-1/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-render:
- shard-dg1: NOTRUN -> [SKIP][237] ([i915#3458]) +3 other tests skip
[237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg1-18/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-render.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-render:
- shard-rkl: NOTRUN -> [SKIP][238] ([i915#3023]) +6 other tests skip
[238]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-1/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-gtt:
- shard-mtlp: NOTRUN -> [SKIP][239] ([i915#8708]) +10 other tests skip
[239]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-1p-rte:
- shard-dg2: NOTRUN -> [SKIP][240] ([i915#3458]) +12 other tests skip
[240]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-1/igt@kms_frontbuffer_tracking@psr-1p-rte.html
* igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-wc:
- shard-dg1: NOTRUN -> [SKIP][241] ([i915#8708]) +6 other tests skip
[241]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg1-18/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-wc.html
* igt@kms_hdr@static-swap:
- shard-mtlp: NOTRUN -> [SKIP][242] ([i915#3555] / [i915#8228])
[242]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-5/igt@kms_hdr@static-swap.html
* igt@kms_hdr@static-toggle:
- shard-dg2: NOTRUN -> [SKIP][243] ([i915#3555] / [i915#8228])
[243]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-6/igt@kms_hdr@static-toggle.html
* igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
- shard-mtlp: NOTRUN -> [SKIP][244] ([i915#4816])
[244]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-3/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
* igt@kms_panel_fitting@atomic-fastset:
- shard-rkl: NOTRUN -> [SKIP][245] ([i915#6301])
[245]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-2/igt@kms_panel_fitting@atomic-fastset.html
* igt@kms_panel_fitting@legacy:
- shard-dg2: NOTRUN -> [SKIP][246] ([i915#6301])
[246]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-6/igt@kms_panel_fitting@legacy.html
* igt@kms_plane_alpha_blend@alpha-transparent-fb@pipe-c-dp-1:
- shard-apl: NOTRUN -> [FAIL][247] ([i915#4573]) +1 other test fail
[247]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-apl3/igt@kms_plane_alpha_blend@alpha-transparent-fb@pipe-c-dp-1.html
* igt@kms_plane_lowres@tiling-y:
- shard-mtlp: NOTRUN -> [SKIP][248] ([i915#3555] / [i915#8821])
[248]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-8/igt@kms_plane_lowres@tiling-y.html
* igt@kms_plane_scaling@intel-max-src-size:
- shard-dg2: NOTRUN -> [SKIP][249] ([i915#6953])
[249]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-6/igt@kms_plane_scaling@intel-max-src-size.html
* igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-3:
- shard-dg1: NOTRUN -> [FAIL][250] ([i915#8292])
[250]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg1-12/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-3.html
* igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-b-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][251] ([i915#5176] / [i915#9423]) +1 other test skip
[251]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-1/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-b-hdmi-a-2.html
* igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-d-hdmi-a-1:
- shard-dg1: NOTRUN -> [SKIP][252] ([i915#5176] / [i915#9423]) +3 other tests skip
[252]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg1-19/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-d-hdmi-a-1.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-d-edp-1:
- shard-mtlp: NOTRUN -> [SKIP][253] ([i915#3555] / [i915#5235])
[253]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-3/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-d-edp-1.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-b-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][254] ([i915#5235]) +3 other tests skip
[254]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-2/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-b-hdmi-a-2.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-d-hdmi-a-3:
- shard-dg2: NOTRUN -> [SKIP][255] ([i915#5235]) +7 other tests skip
[255]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-1/igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-d-hdmi-a-3.html
* igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scaling@pipe-a-edp-1:
- shard-mtlp: NOTRUN -> [SKIP][256] ([i915#5235]) +10 other tests skip
[256]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-5/igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scaling@pipe-a-edp-1.html
* igt@kms_plane_scaling@planes-downscale-factor-0-75-upscale-20x20:
- shard-rkl: NOTRUN -> [SKIP][257] ([i915#8152])
[257]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@kms_plane_scaling@planes-downscale-factor-0-75-upscale-20x20.html
* igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-c-hdmi-a-1:
- shard-dg1: NOTRUN -> [SKIP][258] ([i915#5235]) +11 other tests skip
[258]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg1-19/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-c-hdmi-a-1.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25:
- shard-rkl: NOTRUN -> [SKIP][259] ([i915#3555] / [i915#4098] / [i915#8152])
[259]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25.html
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25:
- shard-rkl: NOTRUN -> [SKIP][260] ([i915#4098] / [i915#6953] / [i915#8152])
[260]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25.html
* igt@kms_prime@basic-crc-hybrid:
- shard-dg2: NOTRUN -> [SKIP][261] ([i915#6524] / [i915#6805])
[261]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-6/igt@kms_prime@basic-crc-hybrid.html
* igt@kms_psr2_sf@cursor-plane-move-continuous-sf:
- shard-dg1: NOTRUN -> [SKIP][262] ([i915#658])
[262]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg1-18/igt@kms_psr2_sf@cursor-plane-move-continuous-sf.html
* igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-sf:
- shard-apl: NOTRUN -> [SKIP][263] ([fdo#109271] / [i915#658]) +2 other tests skip
[263]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-apl3/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-sf.html
* igt@kms_psr2_sf@overlay-plane-update-continuous-sf:
- shard-glk: NOTRUN -> [SKIP][264] ([fdo#109271] / [i915#658])
[264]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-glk4/igt@kms_psr2_sf@overlay-plane-update-continuous-sf.html
* igt@kms_psr2_su@page_flip-nv12:
- shard-dg2: NOTRUN -> [SKIP][265] ([i915#658]) +1 other test skip
[265]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-1/igt@kms_psr2_su@page_flip-nv12.html
* igt@kms_psr2_su@page_flip-p010:
- shard-mtlp: NOTRUN -> [SKIP][266] ([i915#4348])
[266]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-3/igt@kms_psr2_su@page_flip-p010.html
* igt@kms_psr@cursor_plane_move:
- shard-dg1: NOTRUN -> [SKIP][267] ([i915#1072] / [i915#4078]) +1 other test skip
[267]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg1-18/igt@kms_psr@cursor_plane_move.html
* igt@kms_psr@psr2_dpms:
- shard-rkl: NOTRUN -> [SKIP][268] ([i915#1072]) +1 other test skip
[268]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-1/igt@kms_psr@psr2_dpms.html
* igt@kms_psr@suspend:
- shard-dg2: NOTRUN -> [SKIP][269] ([i915#1072]) +4 other tests skip
[269]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-1/igt@kms_psr@suspend.html
* igt@kms_rotation_crc@primary-rotation-270:
- shard-mtlp: NOTRUN -> [SKIP][270] ([i915#4235]) +1 other test skip
[270]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-3/igt@kms_rotation_crc@primary-rotation-270.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-180:
- shard-mtlp: NOTRUN -> [SKIP][271] ([i915#5289]) +1 other test skip
[271]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-5/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html
* igt@kms_rotation_crc@sprite-rotation-90-pos-100-0:
- shard-dg2: NOTRUN -> [SKIP][272] ([i915#4235])
[272]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-11/igt@kms_rotation_crc@sprite-rotation-90-pos-100-0.html
* igt@kms_scaling_modes@scaling-mode-none:
- shard-dg2: NOTRUN -> [SKIP][273] ([i915#3555]) +5 other tests skip
[273]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-11/igt@kms_scaling_modes@scaling-mode-none.html
* igt@kms_setmode@basic-clone-single-crtc:
- shard-rkl: NOTRUN -> [SKIP][274] ([i915#3555] / [i915#4098]) +3 other tests skip
[274]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-1/igt@kms_setmode@basic-clone-single-crtc.html
* igt@kms_setmode@invalid-clone-exclusive-crtc:
- shard-dg2: NOTRUN -> [SKIP][275] ([i915#3555] / [i915#4098])
[275]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-1/igt@kms_setmode@invalid-clone-exclusive-crtc.html
* igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-1:
- shard-tglu: [PASS][276] -> [FAIL][277] ([i915#9196]) +1 other test fail
[276]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-tglu-2/igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-1.html
[277]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-tglu-7/igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-1.html
* igt@kms_vblank@query-forked-busy:
- shard-rkl: NOTRUN -> [SKIP][278] ([i915#4098]) +13 other tests skip
[278]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@kms_vblank@query-forked-busy.html
* igt@kms_vrr@flip-basic:
- shard-mtlp: NOTRUN -> [SKIP][279] ([i915#3555] / [i915#8808])
[279]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-2/igt@kms_vrr@flip-basic.html
* igt@kms_writeback@writeback-fb-id:
- shard-glk: NOTRUN -> [SKIP][280] ([fdo#109271] / [i915#2437]) +1 other test skip
[280]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-glk3/igt@kms_writeback@writeback-fb-id.html
- shard-dg2: NOTRUN -> [SKIP][281] ([i915#2437])
[281]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-6/igt@kms_writeback@writeback-fb-id.html
* igt@perf@gen12-mi-rpc:
- shard-rkl: NOTRUN -> [SKIP][282] ([fdo#109289]) +1 other test skip
[282]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@perf@gen12-mi-rpc.html
* igt@perf@gen8-unprivileged-single-ctx-counters:
- shard-rkl: [PASS][283] -> [SKIP][284] ([i915#2436])
[283]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-5/igt@perf@gen8-unprivileged-single-ctx-counters.html
[284]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-4/igt@perf@gen8-unprivileged-single-ctx-counters.html
* igt@perf@global-sseu-config-invalid:
- shard-mtlp: NOTRUN -> [SKIP][285] ([i915#7387])
[285]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-5/igt@perf@global-sseu-config-invalid.html
* igt@perf@non-zero-reason@0-rcs0:
- shard-dg2: [PASS][286] -> [FAIL][287] ([i915#7484])
[286]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-dg2-1/igt@perf@non-zero-reason@0-rcs0.html
[287]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-6/igt@perf@non-zero-reason@0-rcs0.html
* igt@perf_pmu@busy-double-start@vcs1:
- shard-mtlp: [PASS][288] -> [FAIL][289] ([i915#4349]) +3 other tests fail
[288]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-mtlp-2/igt@perf_pmu@busy-double-start@vcs1.html
[289]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-4/igt@perf_pmu@busy-double-start@vcs1.html
* igt@perf_pmu@cpu-hotplug:
- shard-mtlp: NOTRUN -> [SKIP][290] ([i915#8850])
[290]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-5/igt@perf_pmu@cpu-hotplug.html
* igt@perf_pmu@frequency@gt0:
- shard-dg1: NOTRUN -> [FAIL][291] ([i915#6806])
[291]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg1-18/igt@perf_pmu@frequency@gt0.html
* igt@perf_pmu@module-unload:
- shard-dg2: NOTRUN -> [FAIL][292] ([i915#5793])
[292]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-6/igt@perf_pmu@module-unload.html
* igt@prime_udl:
- shard-rkl: NOTRUN -> [SKIP][293] ([fdo#109291])
[293]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-2/igt@prime_udl.html
* igt@prime_vgem@basic-gtt:
- shard-mtlp: NOTRUN -> [SKIP][294] ([i915#3708] / [i915#4077]) +1 other test skip
[294]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-2/igt@prime_vgem@basic-gtt.html
* igt@prime_vgem@fence-read-hang:
- shard-dg1: NOTRUN -> [SKIP][295] ([i915#3708])
[295]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg1-18/igt@prime_vgem@fence-read-hang.html
* igt@prime_vgem@fence-write-hang:
- shard-mtlp: NOTRUN -> [SKIP][296] ([i915#3708]) +1 other test skip
[296]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-3/igt@prime_vgem@fence-write-hang.html
* igt@sysfs_heartbeat_interval@nopreempt@ccs0:
- shard-mtlp: [PASS][297] -> [ABORT][298] ([i915#9414])
[297]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-mtlp-4/igt@sysfs_heartbeat_interval@nopreempt@ccs0.html
[298]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-7/igt@sysfs_heartbeat_interval@nopreempt@ccs0.html
* igt@tools_test@sysfs_l3_parity:
- shard-mtlp: NOTRUN -> [SKIP][299] ([i915#4818])
[299]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-3/igt@tools_test@sysfs_l3_parity.html
* igt@v3d/v3d_job_submission@multiple-singlesync-to-multisync:
- shard-rkl: NOTRUN -> [SKIP][300] ([fdo#109315]) +2 other tests skip
[300]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-2/igt@v3d/v3d_job_submission@multiple-singlesync-to-multisync.html
* igt@v3d/v3d_perfmon@get-values-valid-perfmon:
- shard-mtlp: NOTRUN -> [SKIP][301] ([i915#2575]) +10 other tests skip
[301]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-5/igt@v3d/v3d_perfmon@get-values-valid-perfmon.html
* igt@v3d/v3d_submit_csd@multiple-job-submission:
- shard-dg1: NOTRUN -> [SKIP][302] ([i915#2575]) +1 other test skip
[302]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg1-18/igt@v3d/v3d_submit_csd@multiple-job-submission.html
* igt@v3d/v3d_submit_csd@single-out-sync:
- shard-dg2: NOTRUN -> [SKIP][303] ([i915#2575]) +9 other tests skip
[303]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-11/igt@v3d/v3d_submit_csd@single-out-sync.html
* igt@vc4/vc4_purgeable_bo@access-purged-bo-mem:
- shard-mtlp: NOTRUN -> [SKIP][304] ([i915#7711]) +7 other tests skip
[304]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-8/igt@vc4/vc4_purgeable_bo@access-purged-bo-mem.html
* igt@vc4/vc4_wait_bo@unused-bo-1ns:
- shard-rkl: NOTRUN -> [SKIP][305] ([i915#7711]) +2 other tests skip
[305]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-1/igt@vc4/vc4_wait_bo@unused-bo-1ns.html
- shard-dg1: NOTRUN -> [SKIP][306] ([i915#7711]) +1 other test skip
[306]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg1-18/igt@vc4/vc4_wait_bo@unused-bo-1ns.html
* igt@vc4/vc4_wait_bo@used-bo-1ns:
- shard-dg2: NOTRUN -> [SKIP][307] ([i915#7711]) +5 other tests skip
[307]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-1/igt@vc4/vc4_wait_bo@used-bo-1ns.html
#### Possible fixes ####
* igt@fbdev@nullptr:
- shard-rkl: [SKIP][308] ([i915#2582]) -> [PASS][309]
[308]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-5/igt@fbdev@nullptr.html
[309]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-7/igt@fbdev@nullptr.html
* igt@gem_eio@reset-stress:
- shard-dg1: [FAIL][310] ([i915#5784]) -> [PASS][311]
[310]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-dg1-17/igt@gem_eio@reset-stress.html
[311]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg1-18/igt@gem_eio@reset-stress.html
- shard-mtlp: [ABORT][312] ([i915#9414]) -> [PASS][313] +1 other test pass
[312]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-mtlp-3/igt@gem_eio@reset-stress.html
[313]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-2/igt@gem_eio@reset-stress.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-glk: [FAIL][314] ([i915#2842]) -> [PASS][315]
[314]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-glk8/igt@gem_exec_fair@basic-pace-share@rcs0.html
[315]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-glk4/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_exec_reloc@basic-gtt-cpu:
- shard-rkl: [SKIP][316] ([i915#3281]) -> [PASS][317] +4 other tests pass
[316]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-4/igt@gem_exec_reloc@basic-gtt-cpu.html
[317]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@gem_exec_reloc@basic-gtt-cpu.html
* igt@gem_mmap_gtt@coherency:
- shard-rkl: [SKIP][318] ([fdo#111656]) -> [PASS][319]
[318]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-7/igt@gem_mmap_gtt@coherency.html
[319]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@gem_mmap_gtt@coherency.html
* igt@gem_pread@snoop:
- shard-rkl: [SKIP][320] ([i915#3282]) -> [PASS][321] +3 other tests pass
[320]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-4/igt@gem_pread@snoop.html
[321]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@gem_pread@snoop.html
* igt@gem_set_tiling_vs_blt@tiled-to-tiled:
- shard-rkl: [SKIP][322] ([i915#8411]) -> [PASS][323]
[322]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-4/igt@gem_set_tiling_vs_blt@tiled-to-tiled.html
[323]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@gem_set_tiling_vs_blt@tiled-to-tiled.html
* igt@gen9_exec_parse@allowed-single:
- shard-glk: [INCOMPLETE][324] ([i915#5566]) -> [PASS][325]
[324]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-glk8/igt@gen9_exec_parse@allowed-single.html
[325]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-glk3/igt@gen9_exec_parse@allowed-single.html
* igt@gen9_exec_parse@secure-batches:
- shard-rkl: [SKIP][326] ([i915#2527]) -> [PASS][327] +2 other tests pass
[326]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-4/igt@gen9_exec_parse@secure-batches.html
[327]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@gen9_exec_parse@secure-batches.html
* igt@i915_hangman@engine-engine-error@bcs0:
- shard-rkl: [SKIP][328] -> [PASS][329] +1 other test pass
[328]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-5/igt@i915_hangman@engine-engine-error@bcs0.html
[329]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-7/igt@i915_hangman@engine-engine-error@bcs0.html
* igt@i915_pm_rc6_residency@rc6-idle@rcs0:
- shard-dg1: [FAIL][330] ([i915#3591]) -> [PASS][331]
[330]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-dg1-14/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html
[331]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg1-12/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html
* {igt@kms_ccs@pipe-a-missing-ccs-buffer-y-tiled-gen12-rc-ccs-cc}:
- shard-rkl: [SKIP][332] ([i915#4098]) -> [PASS][333] +3 other tests pass
[332]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-5/igt@kms_ccs@pipe-a-missing-ccs-buffer-y-tiled-gen12-rc-ccs-cc.html
[333]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-7/igt@kms_ccs@pipe-a-missing-ccs-buffer-y-tiled-gen12-rc-ccs-cc.html
* igt@kms_cursor_legacy@flip-vs-cursor-crc-atomic:
- shard-rkl: [SKIP][334] ([i915#1845] / [i915#4098]) -> [PASS][335] +11 other tests pass
[334]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-5/igt@kms_cursor_legacy@flip-vs-cursor-crc-atomic.html
[335]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-4/igt@kms_cursor_legacy@flip-vs-cursor-crc-atomic.html
* igt@kms_cursor_legacy@single-move@all-pipes:
- shard-mtlp: [DMESG-WARN][336] ([i915#2017]) -> [PASS][337]
[336]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-mtlp-4/igt@kms_cursor_legacy@single-move@all-pipes.html
[337]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-3/igt@kms_cursor_legacy@single-move@all-pipes.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen:
- shard-dg2: [FAIL][338] ([i915#6880]) -> [PASS][339]
[338]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-dg2-6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen.html
[339]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg2-1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen.html
* igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-pwrite:
- shard-rkl: [SKIP][340] ([i915#1849] / [i915#4098]) -> [PASS][341] +6 other tests pass
[340]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-5/igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-pwrite.html
[341]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-4/igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-pwrite.html
* {igt@kms_pm_rpm@modeset-non-lpsp-stress}:
- shard-rkl: [SKIP][342] ([i915#9519]) -> [PASS][343] +1 other test pass
[342]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-7/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
[343]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-4/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
- shard-dg1: [SKIP][344] ([i915#9519]) -> [PASS][345]
[344]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-dg1-19/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
[345]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg1-16/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
* igt@kms_universal_plane@cursor-fb-leak@pipe-a-edp-1:
- shard-mtlp: [FAIL][346] ([i915#9196]) -> [PASS][347] +2 other tests pass
[346]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-mtlp-1/igt@kms_universal_plane@cursor-fb-leak@pipe-a-edp-1.html
[347]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-mtlp-3/igt@kms_universal_plane@cursor-fb-leak@pipe-a-edp-1.html
* {igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-2}:
- shard-rkl: [FAIL][348] ([i915#9196]) -> [PASS][349]
[348]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-1/igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-2.html
[349]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-4/igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-2.html
* igt@prime_vgem@basic-fence-flip:
- shard-rkl: [SKIP][350] ([fdo#109295] / [i915#3708] / [i915#4098]) -> [PASS][351]
[350]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-5/igt@prime_vgem@basic-fence-flip.html
[351]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-4/igt@prime_vgem@basic-fence-flip.html
#### Warnings ####
* igt@gem_ccs@block-copy-compressed:
- shard-rkl: [SKIP][352] ([i915#3555]) -> [SKIP][353] ([i915#7957]) +1 other test skip
[352]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-7/igt@gem_ccs@block-copy-compressed.html
[353]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@gem_ccs@block-copy-compressed.html
* igt@kms_big_fb@4-tiled-16bpp-rotate-180:
- shard-rkl: [SKIP][354] ([i915#4098]) -> [SKIP][355] ([i915#5286]) +1 other test skip
[354]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-5/igt@kms_big_fb@4-tiled-16bpp-rotate-180.html
[355]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-7/igt@kms_big_fb@4-tiled-16bpp-rotate-180.html
* igt@kms_big_fb@4-tiled-addfb:
- shard-rkl: [SKIP][356] ([i915#5286]) -> [SKIP][357] ([i915#4098]) +2 other tests skip
[356]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-4/igt@kms_big_fb@4-tiled-addfb.html
[357]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@kms_big_fb@4-tiled-addfb.html
* igt@kms_big_fb@linear-32bpp-rotate-270:
- shard-rkl: [SKIP][358] ([fdo#111614] / [i915#3638]) -> [SKIP][359] ([i915#1845] / [i915#4098]) +2 other tests skip
[358]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-4/igt@kms_big_fb@linear-32bpp-rotate-270.html
[359]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@kms_big_fb@linear-32bpp-rotate-270.html
* igt@kms_big_fb@linear-8bpp-rotate-90:
- shard-rkl: [SKIP][360] ([i915#1845] / [i915#4098]) -> [SKIP][361] ([fdo#111614] / [i915#3638])
[360]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-5/igt@kms_big_fb@linear-8bpp-rotate-90.html
[361]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-4/igt@kms_big_fb@linear-8bpp-rotate-90.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180:
- shard-rkl: [SKIP][362] ([fdo#110723]) -> [SKIP][363] ([i915#1845] / [i915#4098]) +3 other tests skip
[362]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-4/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180.html
[363]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
- shard-rkl: [SKIP][364] ([i915#1845] / [i915#4098]) -> [SKIP][365] ([fdo#110723]) +2 other tests skip
[364]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-5/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
[365]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-4/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
* igt@kms_content_protection@dp-mst-lic-type-1:
- shard-rkl: [SKIP][366] ([i915#3116]) -> [SKIP][367] ([i915#1845] / [i915#4098])
[366]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-4/igt@kms_content_protection@dp-mst-lic-type-1.html
[367]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@kms_content_protection@dp-mst-lic-type-1.html
* igt@kms_content_protection@legacy:
- shard-rkl: [SKIP][368] ([i915#1845] / [i915#4098]) -> [SKIP][369] ([i915#7118])
[368]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-5/igt@kms_content_protection@legacy.html
[369]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-7/igt@kms_content_protection@legacy.html
* igt@kms_content_protection@lic:
- shard-rkl: [SKIP][370] ([i915#7118]) -> [SKIP][371] ([i915#1845] / [i915#4098])
[370]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-7/igt@kms_content_protection@lic.html
[371]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@kms_content_protection@lic.html
* igt@kms_cursor_crc@cursor-offscreen-512x170:
- shard-rkl: [SKIP][372] ([i915#4098]) -> [SKIP][373] ([fdo#109279] / [i915#3359])
[372]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-5/igt@kms_cursor_crc@cursor-offscreen-512x170.html
[373]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-7/igt@kms_cursor_crc@cursor-offscreen-512x170.html
* igt@kms_cursor_crc@cursor-random-512x512:
- shard-rkl: [SKIP][374] ([i915#3359]) -> [SKIP][375] ([i915#4098]) +1 other test skip
[374]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-7/igt@kms_cursor_crc@cursor-random-512x512.html
[375]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@kms_cursor_crc@cursor-random-512x512.html
* igt@kms_cursor_crc@cursor-random-max-size:
- shard-rkl: [SKIP][376] ([i915#3555]) -> [SKIP][377] ([i915#4098])
[376]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-4/igt@kms_cursor_crc@cursor-random-max-size.html
[377]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@kms_cursor_crc@cursor-random-max-size.html
* igt@kms_cursor_crc@cursor-rapid-movement-32x32:
- shard-rkl: [SKIP][378] ([i915#4098]) -> [SKIP][379] ([i915#3555])
[378]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-5/igt@kms_cursor_crc@cursor-rapid-movement-32x32.html
[379]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-7/igt@kms_cursor_crc@cursor-rapid-movement-32x32.html
* igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic:
- shard-rkl: [SKIP][380] ([fdo#111767] / [fdo#111825]) -> [SKIP][381] ([i915#1845] / [i915#4098])
[380]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-4/igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic.html
[381]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic.html
* igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy:
- shard-rkl: [SKIP][382] ([i915#1845] / [i915#4098]) -> [SKIP][383] ([fdo#111825])
[382]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-5/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy.html
[383]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-7/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-legacy:
- shard-rkl: [SKIP][384] ([fdo#111825]) -> [SKIP][385] ([i915#1845] / [i915#4098]) +1 other test skip
[384]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-4/igt@kms_cursor_legacy@cursorb-vs-flipb-legacy.html
[385]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@kms_cursor_legacy@cursorb-vs-flipb-legacy.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions:
- shard-rkl: [SKIP][386] ([i915#4103]) -> [SKIP][387] ([i915#1845] / [i915#4098])
[386]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-4/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html
[387]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html
* igt@kms_fbcon_fbt@psr-suspend:
- shard-rkl: [SKIP][388] ([i915#3955]) -> [SKIP][389] ([fdo#110189] / [i915#3955])
[388]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-4/igt@kms_fbcon_fbt@psr-suspend.html
[389]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@kms_fbcon_fbt@psr-suspend.html
* igt@kms_frontbuffer_tracking@fbc-tiling-4:
- shard-rkl: [SKIP][390] ([i915#1849] / [i915#4098]) -> [SKIP][391] ([i915#5439])
[390]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-5/igt@kms_frontbuffer_tracking@fbc-tiling-4.html
[391]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-4/igt@kms_frontbuffer_tracking@fbc-tiling-4.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-indfb-fliptrack-mmap-gtt:
- shard-rkl: [SKIP][392] ([i915#1849] / [i915#4098]) -> [SKIP][393] ([i915#3023]) +11 other tests skip
[392]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-5/igt@kms_frontbuffer_tracking@fbcpsr-1p-indfb-fliptrack-mmap-gtt.html
[393]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-7/igt@kms_frontbuffer_tracking@fbcpsr-1p-indfb-fliptrack-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw:
- shard-dg1: [SKIP][394] ([i915#3458]) -> [SKIP][395] ([i915#3458] / [i915#4423])
[394]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-dg1-19/igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw.html
[395]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-dg1-12/igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-plflip-blt:
- shard-rkl: [SKIP][396] ([i915#3023]) -> [SKIP][397] ([i915#1849] / [i915#4098]) +13 other tests skip
[396]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-plflip-blt.html
[397]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-mmap-wc:
- shard-rkl: [SKIP][398] ([i915#1849] / [i915#4098]) -> [SKIP][399] ([fdo#111825] / [i915#1825]) +15 other tests skip
[398]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-5/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-mmap-wc.html
[399]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-4/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-render:
- shard-rkl: [SKIP][400] ([fdo#111825] / [i915#1825]) -> [SKIP][401] ([i915#1849] / [i915#4098]) +22 other tests skip
[400]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-7/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-render.html
[401]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-render.html
* igt@kms_hdr@bpc-switch-dpms:
- shard-rkl: [SKIP][402] ([i915#3555] / [i915#8228]) -> [SKIP][403] ([i915#1845] / [i915#4098]) +1 other test skip
[402]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-7/igt@kms_hdr@bpc-switch-dpms.html
[403]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@kms_hdr@bpc-switch-dpms.html
* igt@kms_plane_scaling@2x-scaler-multi-pipe:
- shard-rkl: [SKIP][404] ([fdo#111825]) -> [SKIP][405] ([fdo#111825] / [i915#8152])
[404]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-4/igt@kms_plane_scaling@2x-scaler-multi-pipe.html
[405]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@kms_plane_scaling@2x-scaler-multi-pipe.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
- shard-rkl: [SKIP][406] ([fdo#111615] / [i915#5289]) -> [SKIP][407] ([i915#1845] / [i915#4098]) +1 other test skip
[406]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13782/shard-rkl-4/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html
[407]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/shard-rkl-5/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#109302]: https://bugs.freedesktop.org/show_bug.cgi?id=109302
[fdo#109308]: https://bugs.freedesktop.org/show_bug.cgi?id=109308
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656
[fdo#111767]: https://bugs.freedesktop.org/show_bug.cgi?id=111767
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1769]: https://gitlab.freedesktop.org/drm/intel/issues/1769
[i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
[i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#1850]: https://gitlab.freedesktop.org/drm/intel/issues/1850
[i915#2017]: https://gitlab.freedesktop.org/drm/intel/issues/2017
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2436]: https://gitlab.freedesktop.org/drm/intel/issues/2436
[i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
[i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
[i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#3023]: https://gitlab.freedesktop.org/drm/intel/issues/3023
[i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3318]: https://gitlab.freedesktop.org/drm/intel/issues/3318
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3743]: https://gitlab.freedesktop.org/drm/intel/issues/3743
[i915#3804]: https://gitlab.freedesktop.org/drm/intel/issues/3804
[i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
[i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4087]: https://gitlab.freedesktop.org/drm/intel/issues/4087
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#4235]: https://gitlab.freedesktop.org/drm/intel/issues/4235
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4348]: https://gitlab.freedesktop.org/drm/intel/issues/4348
[i915#4349]: https://gitlab.freedesktop.org/drm/intel/issues/4349
[i915#4423]: https://gitlab.freedesktop.org/drm/intel/issues/4423
[i915#4473]: https://gitlab.freedesktop.org/drm/intel/issues/4473
[i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
[i915#4537]: https://gitlab.freedesktop.org/drm/intel/issues/4537
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#4573]: https://gitlab.freedesktop.org/drm/intel/issues/4573
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4771]: https://gitlab.freedesktop.org/drm/intel/issues/4771
[i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
[i915#4816]: https://gitlab.freedesktop.org/drm/intel/issues/4816
[i915#4817]: https://gitlab.freedesktop.org/drm/intel/issues/4817
[i915#4818]: https://gitlab.freedesktop.org/drm/intel/issues/4818
[i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
[i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
[i915#4881]: https://gitlab.freedesktop.org/drm/intel/issues/4881
[i915#5107]: https://gitlab.freedesktop.org/drm/intel/issues/5107
[i915#5138]: https://gitlab.freedesktop.org/drm/intel/issues/5138
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#5439]: https://gitlab.freedesktop.org/drm/intel/issues/5439
[i915#5566]: https://gitlab.freedesktop.org/drm/intel/issues/5566
[i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
[i915#5793]: https://gitlab.freedesktop.org/drm/intel/issues/5793
[i915#5882]: https://gitlab.freedesktop.org/drm/intel/issues/5882
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6187]: https://gitlab.freedesktop.org/drm/intel/issues/6187
[i915#6227]: https://gitlab.freedesktop.org/drm/intel/issues/6227
[i915#6230]: https://gitlab.freedesktop.org/drm/intel/issues/6230
[i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301
[i915#6334]: https://gitlab.freedesktop.org/drm/intel/issues/6334
[i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6590]: https://gitlab.freedesktop.org/drm/intel/issues/6590
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#6805]: https://gitlab.freedesktop.org/drm/intel/issues/6805
[i915#6806]: https://gitlab.freedesktop.org/drm/intel/issues/6806
[i915#6880]: https://gitlab.freedesktop.org/drm/intel/issues/6880
[i915#6953]: https://gitlab.freedesktop.org/drm/intel/issues/6953
[i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
[i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
[i915#7213]: https://gitlab.freedesktop.org/drm/intel/issues/7213
[i915#7297]: https://gitlab.freedesktop.org/drm/intel/issues/7297
[i915#7387]: https://gitlab.freedesktop.org/drm/intel/issues/7387
[i915#7484]: https://gitlab.freedesktop.org/drm/intel/issues/7484
[i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697
[i915#7701]: https://gitlab.freedesktop.org/drm/intel/issues/7701
[i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
[i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#7892]: https://gitlab.freedesktop.org/drm/intel/issues/7892
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#7957]: https://gitlab.freedesktop.org/drm/intel/issues/7957
[i915#7975]: https://gitlab.freedesktop.org/drm/intel/issues/7975
[i915#8063]: https://gitlab.freedesktop.org/drm/intel/issues/8063
[i915#8152]: https://gitlab.freedesktop.org/drm/intel/issues/8152
[i915#8213]: https://gitlab.freedesktop.org/drm/intel/issues/8213
[i915#8228]: https://gitlab.freedesktop.org/drm/intel/issues/8228
[i915#8289]: https://gitlab.freedesktop.org/drm/intel/issues/8289
[i915#8292]: https://gitlab.freedesktop.org/drm/intel/issues/8292
[i915#8293]: https://gitlab.freedesktop.org/drm/intel/issues/8293
[i915#8381]: https://gitlab.freedesktop.org/drm/intel/issues/8381
[i915#8398]: https://gitlab.freedesktop.org/drm/intel/issues/8398
[i915#8411]: https://gitlab.freedesktop.org/drm/intel/issues/8411
[i915#8414]: https://gitlab.freedesktop.org/drm/intel/issues/8414
[i915#8428]: https://gitlab.freedesktop.org/drm/intel/issues/8428
[i915#8430]: https://gitlab.freedesktop.org/drm/intel/issues/8430
[i915#8555]: https://gitlab.freedesktop.org/drm/intel/issues/8555
[i915#8588]: https://gitlab.freedesktop.org/drm/intel/issues/8588
[i915#8708]: https://gitlab.freedesktop.org/drm/intel/issues/8708
[i915#8709]: https://gitlab.freedesktop.org/drm/intel/issues/8709
[i915#8717]: https://gitlab.freedesktop.org/drm/intel/issues/8717
[i915#8758]: https://gitlab.freedesktop.org/drm/intel/issues/8758
[i915#8808]: https://gitlab.freedesktop.org/drm/intel/issues/8808
[i915#8810]: https://gitlab.freedesktop.org/drm/intel/issues/8810
[i915#8812]: https://gitlab.freedesktop.org/drm/intel/issues/8812
[i915#8814]: https://gitlab.freedesktop.org/drm/intel/issues/8814
[i915#8821]: https://gitlab.freedesktop.org/drm/intel/issues/8821
[i915#8841]: https://gitlab.freedesktop.org/drm/intel/issues/8841
[i915#8850]: https://gitlab.freedesktop.org/drm/intel/issues/8850
[i915#8925]: https://gitlab.freedesktop.org/drm/intel/issues/8925
[i915#8957]: https://gitlab.freedesktop.org/drm/intel/issues/8957
[i915#8962]: https://gitlab.freedesktop.org/drm/intel/issues/8962
[i915#9053]: https://gitlab.freedesktop.org/drm/intel/issues/9053
[i915#9067]: https://gitlab.freedesktop.org/drm/intel/issues/9067
[i915#9119]: https://gitlab.freedesktop.org/drm/intel/issues/9119
[i915#9196]: https://gitlab.freedesktop.org/drm/intel/issues/9196
[i915#9226]: https://gitlab.freedesktop.org/drm/intel/issues/9226
[i915#9227]: https://gitlab.freedesktop.org/drm/intel/issues/9227
[i915#9261]: https://gitlab.freedesktop.org/drm/intel/issues/9261
[i915#9262]: https://gitlab.freedesktop.org/drm/intel/issues/9262
[i915#9298]: https://gitlab.freedesktop.org/drm/intel/issues/9298
[i915#9337]: https://gitlab.freedesktop.org/drm/intel/issues/9337
[i915#9414]: https://gitlab.freedesktop.org/drm/intel/issues/9414
[i915#9423]: https://gitlab.freedesktop.org/drm/intel/issues/9423
[i915#9424]: https://gitlab.freedesktop.org/drm/intel/issues/9424
[i915#9433]: https://gitlab.freedesktop.org/drm/intel/issues/9433
[i915#9519]: https://gitlab.freedesktop.org/drm/intel/issues/9519
Build changes
-------------
* Linux: CI_DRM_13782 -> Patchwork_124645v5
* Piglit: piglit_4509 -> None
CI-20190529: 20190529
CI_DRM_13782: 16c18fef1215015ab3d1a0dd3b06cf6131fe23bd @ git://anongit.freedesktop.org/
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v5/index.html
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^ permalink raw reply [flat|nested] 30+ messages in thread* Re: [Intel-gfx] [PATCH v4 00/23] Framework for display parameters
2023-10-24 12:40 [Intel-gfx] [PATCH v4 00/23] Framework for display parameters Jouni Högander
` (26 preceding siblings ...)
2023-10-25 15:00 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
@ 2023-10-26 9:23 ` Hogander, Jouni
27 siblings, 0 replies; 30+ messages in thread
From: Hogander, Jouni @ 2023-10-26 9:23 UTC (permalink / raw)
To: intel-gfx@lists.freedesktop.org; +Cc: Nikula, Jani, Vivi, Rodrigo
On Tue, 2023-10-24 at 15:40 +0300, Jouni Högander wrote:
> Currently all module parameters are handled by i915_param.c/h. This
> is a problem for display parameters when Xe driver is used.
>
> This patch set adds a mechanism to add parameters specific to the
> display. This is mainly copied from existing i915 parameters
> implementation with some naming changes and taking into account
> varying driver name.
>
> Also all display specific module parameters are moved under display
> and the
> module parameter are all converted as non-writable. This should be ok
> as we have writable device parameters under debugfs.
>
> v4:
> - Change verbose_state_checks device parameter permissions to 0400
>
> v3:
> - Change enable_ip as boolean
> - Fix enable_psr2_sel_fetch description
> - Add default value into psr_safest_params description
> - Drop unused predefinition (dentry) from
> intel_display_debugfs_params.h
> v2:
> - Drop fastboot parameter
> - Include display parameters into i915_capabilities debugfs
> interface
Thank you Luca, Jani and Tvrtko for checking my patches. These are all
now merged.
BR,
Jouni Högander
>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Uma Shankar <uma.shankar@intel.com>
> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Luca Coelho <luca@coelho.fi>
>
> Jouni Högander (23):
> drm/i915/display: Add framework to add parameters specific to
> display
> drm/i915/display: Dump also display parameters
> drm/i915/display: Move enable_fbc module parameter under display
> drm/i915/display: Move psr related module parameters under display
> drm/i915/display: Move vbt_firmware module parameter under display
> drm/i915/display: Move lvds_channel_mode module parameter under
> display
> drm/i915/display: Move panel_use_ssc module parameter under display
> drm/i915/display: Move vbt_sdvo_panel_type module parameter under
> display
> drm/i915/display: Move enable_dc module parameter under display
> drm/i915/display: Move enable_dpt module parameter under display
> drm/i915/display: Move enable_sagv module parameter under display
> drm/i915/display: Move disable_power_well module parameter under
> display
> drm/i915/display: Move enable_ips module parameter under display
> drm/i915/display: Move invert_brightness module parameter under
> display
> drm/i915/display: Move edp_vswing module parameter under display
> drm/i915/display: Move enable_dpcd_backlight module parameter under
> display
> drm/i915/display: Move load_detect_test parameter under display
> drm/i915/display: Move force_reset_modeset_test parameter under
> display
> drm/i915/display: Move disable_display parameter under display
> drm/i915/display: Use device parameters instead of module in
> I915_STATE_WARN
> drm/i915/display: Move verbose_state_checks under display
> drm/i915/display: Move nuclear_pageflip under display
> drm/i915/display: Move enable_dp_mst under display
>
> drivers/gpu/drm/i915/Makefile | 2 +
> drivers/gpu/drm/i915/display/hsw_ips.c | 4 +-
> drivers/gpu/drm/i915/display/i9xx_wm.c | 2 +-
> .../gpu/drm/i915/display/intel_backlight.c | 9 +-
> drivers/gpu/drm/i915/display/intel_bios.c | 6 +-
> drivers/gpu/drm/i915/display/intel_crt.c | 4 +-
> drivers/gpu/drm/i915/display/intel_display.h | 2 +-
> .../gpu/drm/i915/display/intel_display_core.h | 2 +
> .../drm/i915/display/intel_display_debugfs.c | 2 +
> .../display/intel_display_debugfs_params.c | 176 ++++++++++++++
> .../display/intel_display_debugfs_params.h | 13 ++
> .../drm/i915/display/intel_display_device.c | 13 +-
> .../drm/i915/display/intel_display_device.h | 1 +
> .../drm/i915/display/intel_display_params.c | 217
> ++++++++++++++++++
> .../drm/i915/display/intel_display_params.h | 61 +++++
> .../drm/i915/display/intel_display_power.c | 14 +-
> .../drm/i915/display/intel_display_reset.c | 2 +-
> drivers/gpu/drm/i915/display/intel_dp.c | 6 +-
> .../drm/i915/display/intel_dp_aux_backlight.c | 4 +-
> drivers/gpu/drm/i915/display/intel_dpt.c | 6 +-
> drivers/gpu/drm/i915/display/intel_fb.c | 2 +-
> drivers/gpu/drm/i915/display/intel_fbc.c | 10 +-
> drivers/gpu/drm/i915/display/intel_lvds.c | 4 +-
> drivers/gpu/drm/i915/display/intel_opregion.c | 2 +-
> drivers/gpu/drm/i915/display/intel_panel.c | 4 +-
> drivers/gpu/drm/i915/display/intel_psr.c | 14 +-
> .../drm/i915/display/skl_universal_plane.c | 2 +-
> drivers/gpu/drm/i915/display/skl_watermark.c | 5 +-
> drivers/gpu/drm/i915/i915_debugfs.c | 3 +
> drivers/gpu/drm/i915/i915_driver.c | 2 +
> drivers/gpu/drm/i915/i915_gpu_error.c | 3 +
> drivers/gpu/drm/i915/i915_gpu_error.h | 2 +
> drivers/gpu/drm/i915/i915_params.c | 89 -------
> drivers/gpu/drm/i915/i915_params.h | 22 --
> 34 files changed, 548 insertions(+), 162 deletions(-)
> create mode 100644
> drivers/gpu/drm/i915/display/intel_display_debugfs_params.c
> create mode 100644
> drivers/gpu/drm/i915/display/intel_display_debugfs_params.h
> create mode 100644
> drivers/gpu/drm/i915/display/intel_display_params.c
> create mode 100644
> drivers/gpu/drm/i915/display/intel_display_params.h
>
^ permalink raw reply [flat|nested] 30+ messages in thread