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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 1/4] drm/i915/psr: Don't send a NULL VSC SDP
Date: Wed, 22 Nov 2023 11:31:34 +0200	[thread overview]
Message-ID: <20231122093137.1509-1-ville.syrjala@linux.intel.com> (raw)

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

The PSR code is unconditionally enabling the VSC SDP whether or not PSR
itself is enabled. This means if the DP code decided not to use a VSC
SDP we're always transmitting a zeroed SDP. Not sure what the hardware
will even do in that case. We also see a "Failed to unpack DP VSC SDP"
message on every readout since the DIP buffer is just full of zeroes.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 8d180132a74b..931295934659 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1373,6 +1373,9 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
 	else
 		crtc_state->has_psr = _psr_compute_config(intel_dp, crtc_state);
 
+	if (!crtc_state->has_psr)
+		return;
+
 	crtc_state->has_psr2 = intel_psr2_config_valid(intel_dp, crtc_state);
 
 	crtc_state->infoframes.enable |= intel_hdmi_infoframe_enable(DP_SDP_VSC);
-- 
2.41.0


             reply	other threads:[~2023-11-22 18:57 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-22  9:31 Ville Syrjala [this message]
2023-11-22  9:31 ` [Intel-gfx] [PATCH 2/4] drm/i915/psr: Include some basic PSR information in the state dump Ville Syrjala
2023-11-23  7:15   ` Hogander, Jouni
2023-11-22  9:31 ` [Intel-gfx] [PATCH 3/4] drm/i915: Stop printing pipe name as hex Ville Syrjala
2023-11-23  7:16   ` Hogander, Jouni
2023-11-22  9:31 ` [Intel-gfx] [PATCH 4/4] drm/i915: Move the SDP split debug spew to the correct place Ville Syrjala
2023-11-23  7:18   ` Hogander, Jouni
2023-11-23  0:43 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/4] drm/i915/psr: Don't send a NULL VSC SDP Patchwork
2023-11-23  0:57 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-11-23  7:14 ` [Intel-gfx] [PATCH 1/4] " Hogander, Jouni
2023-11-24  8:32   ` Ville Syrjälä
2023-11-24  0:35 ` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/4] " Patchwork

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