From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 3/4] drm/i915: Stop printing pipe name as hex
Date: Wed, 22 Nov 2023 11:31:36 +0200 [thread overview]
Message-ID: <20231122093137.1509-3-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20231122093137.1509-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Print the pipe name in ascii rather than hex.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
index 7958d0bd851e..ef57dad1a9cb 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
@@ -4537,7 +4537,7 @@ void intel_shared_dpll_state_verify(struct intel_atomic_state *state,
"pll active mismatch (didn't expect pipe %c in active mask (0x%x))\n",
pipe_name(crtc->pipe), pll->active_mask);
I915_STATE_WARN(i915, pll->state.pipe_mask & pipe_mask,
- "pll enabled crtcs mismatch (found %x in enabled mask (0x%x))\n",
+ "pll enabled crtcs mismatch (found pipe %c in enabled mask (0x%x))\n",
pipe_name(crtc->pipe), pll->state.pipe_mask);
}
}
--
2.41.0
next prev parent reply other threads:[~2023-11-22 18:57 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-22 9:31 [Intel-gfx] [PATCH 1/4] drm/i915/psr: Don't send a NULL VSC SDP Ville Syrjala
2023-11-22 9:31 ` [Intel-gfx] [PATCH 2/4] drm/i915/psr: Include some basic PSR information in the state dump Ville Syrjala
2023-11-23 7:15 ` Hogander, Jouni
2023-11-22 9:31 ` Ville Syrjala [this message]
2023-11-23 7:16 ` [Intel-gfx] [PATCH 3/4] drm/i915: Stop printing pipe name as hex Hogander, Jouni
2023-11-22 9:31 ` [Intel-gfx] [PATCH 4/4] drm/i915: Move the SDP split debug spew to the correct place Ville Syrjala
2023-11-23 7:18 ` Hogander, Jouni
2023-11-23 0:43 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/4] drm/i915/psr: Don't send a NULL VSC SDP Patchwork
2023-11-23 0:57 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-11-23 7:14 ` [Intel-gfx] [PATCH 1/4] " Hogander, Jouni
2023-11-24 8:32 ` Ville Syrjälä
2023-11-24 0:35 ` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/4] " Patchwork
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