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From: "Hogander, Jouni" <jouni.hogander@intel.com>
To: "ville.syrjala@linux.intel.com" <ville.syrjala@linux.intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH 1/4] drm/i915/psr: Don't send a NULL VSC SDP
Date: Thu, 23 Nov 2023 07:14:29 +0000	[thread overview]
Message-ID: <332f5e75434962347225c6bd5b3e2f27867b78e4.camel@intel.com> (raw)
In-Reply-To: <20231122093137.1509-1-ville.syrjala@linux.intel.com>

On Wed, 2023-11-22 at 11:31 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> The PSR code is unconditionally enabling the VSC SDP whether or not
> PSR
> itself is enabled. This means if the DP code decided not to use a VSC
> SDP we're always transmitting a zeroed SDP. Not sure what the
> hardware
> will even do in that case. We also see a "Failed to unpack DP VSC
> SDP"
> message on every readout since the DIP buffer is just full of zeroes.

This is already taken care by this patch :

https://patchwork.freedesktop.org/patch/568234/?series=126651&rev=1

I'm about to merge it.

BR,

Jouni Högander

> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 8d180132a74b..931295934659 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1373,6 +1373,9 @@ void intel_psr_compute_config(struct intel_dp
> *intel_dp,
>         else
>                 crtc_state->has_psr = _psr_compute_config(intel_dp,
> crtc_state);
>  
> +       if (!crtc_state->has_psr)
> +               return;
> +
>         crtc_state->has_psr2 = intel_psr2_config_valid(intel_dp,
> crtc_state);
>  
>         crtc_state->infoframes.enable |=
> intel_hdmi_infoframe_enable(DP_SDP_VSC);


  parent reply	other threads:[~2023-11-23  7:14 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-22  9:31 [Intel-gfx] [PATCH 1/4] drm/i915/psr: Don't send a NULL VSC SDP Ville Syrjala
2023-11-22  9:31 ` [Intel-gfx] [PATCH 2/4] drm/i915/psr: Include some basic PSR information in the state dump Ville Syrjala
2023-11-23  7:15   ` Hogander, Jouni
2023-11-22  9:31 ` [Intel-gfx] [PATCH 3/4] drm/i915: Stop printing pipe name as hex Ville Syrjala
2023-11-23  7:16   ` Hogander, Jouni
2023-11-22  9:31 ` [Intel-gfx] [PATCH 4/4] drm/i915: Move the SDP split debug spew to the correct place Ville Syrjala
2023-11-23  7:18   ` Hogander, Jouni
2023-11-23  0:43 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/4] drm/i915/psr: Don't send a NULL VSC SDP Patchwork
2023-11-23  0:57 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-11-23  7:14 ` Hogander, Jouni [this message]
2023-11-24  8:32   ` [Intel-gfx] [PATCH 1/4] " Ville Syrjälä
2023-11-24  0:35 ` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/4] " Patchwork

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