Re: [Intel-gfx] [PATCH 8/9] drm/i915/adl_s: Add display WAs for ADL-S

From: "Souza, Jose" <jose.souza@intel.com>
To: "Swarup, Aditya" <aditya.swarup@intel.com>,
	"Roper, Matthew D" <matthew.d.roper@intel.com>
Cc: "Nikula, Jani" <jani.nikula@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"De Marchi, Lucas" <lucas.demarchi@intel.com>
Subject: Re: [Intel-gfx] [PATCH 8/9] drm/i915/adl_s: Add display WAs for ADL-S
Date: Fri, 29 Jan 2021 17:26:09 +0000	[thread overview]
Message-ID: <3392d28bd0b44d5e400693c581067a61269939bf.camel@intel.com> (raw)
In-Reply-To: <7bb0e05b-20ab-9cd4-9010-6ad1b120b459@intel.com>

On Wed, 2021-01-27 at 21:43 -0800, Aditya Swarup wrote:
> On 1/26/21 9:22 PM, Matt Roper wrote:
> > On Tue, Jan 26, 2021 at 08:11:58PM -0800, Aditya Swarup wrote:
> > > - Extend permanent driver WA Wa_1409767108, Wa_14010685332
> > >   and Wa_14011294188 to adl-s.
> > > - Extend permanent driver WA Wa_1606054188 to adl-s.
> > > - Add Wa_14011765242 for adl-s A0 stepping.
> > > 
> > > Cc: Jani Nikula <jani.nikula@intel.com>
> > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > Cc: Imre Deak <imre.deak@intel.com>
> > > Cc: Matt Roper <matthew.d.roper@intel.com>
> > > Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> > > Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_display_power.c | 7 ++++---
> > >  drivers/gpu/drm/i915/display/intel_sprite.c        | 4 ++--
> > >  drivers/gpu/drm/i915/intel_device_info.c           | 6 +++++-
> > >  3 files changed, 11 insertions(+), 6 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> > > index cccfd45a67cf..e17b1ca356c3 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> > > @@ -5339,9 +5339,10 @@ static void tgl_bw_buddy_init(struct drm_i915_private *dev_priv)
> > >  	unsigned long abox_mask = INTEL_INFO(dev_priv)->abox_mask;
> > >  	int config, i;
> > >  
> > > 
> > > 
> > > 
> > > -	if (IS_DG1_REVID(dev_priv, DG1_REVID_A0, DG1_REVID_A0) ||
> > > +	if (IS_ALDERLAKE_S(dev_priv) ||
> > > +	    IS_DG1_REVID(dev_priv, DG1_REVID_A0, DG1_REVID_A0) ||
> > >  	    IS_TGL_DISP_STEPPING(dev_priv, STEP_A0, STEP_B0))
> > > -		/* Wa_1409767108:tgl,dg1 */
> > > +		/* Wa_1409767108:tgl,dg1,adl-s */
> > >  		table = wa_1409767108_buddy_page_masks;
> > >  	else
> > >  		table = tgl_buddy_page_masks;
> > > @@ -5379,7 +5380,7 @@ static void icl_display_core_init(struct drm_i915_private *dev_priv,
> > >  
> > > 
> > > 
> > > 
> > >  	gen9_set_dc_state(dev_priv, DC_STATE_DISABLE);
> > >  
> > > 
> > > 
> > > 
> > > -	/* Wa_14011294188:ehl,jsl,tgl,rkl */
> > > +	/* Wa_14011294188:ehl,jsl,tgl,rkl,adl-s */
> > >  	if (INTEL_PCH_TYPE(dev_priv) >= PCH_JSP &&
> > >  	    INTEL_PCH_TYPE(dev_priv) < PCH_DG1)
> > >  		intel_de_rmw(dev_priv, SOUTH_DSPCLK_GATE_D, 0,
> > > diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
> > > index 68cea5ca251c..a7077babd31c 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_sprite.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_sprite.c
> > > @@ -2418,8 +2418,8 @@ static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state,
> > >  		return -EINVAL;
> > >  	}
> > >  
> > > 
> > > 
> > > 
> > > -	/* Wa_1606054188:tgl */
> > > -	if (IS_TIGERLAKE(dev_priv) &&
> > > +	/* Wa_1606054188:tgl,adl-s */
> > > +	if ((IS_ALDERLAKE_S(dev_priv) || IS_TIGERLAKE(dev_priv)) &&
> > >  	    plane_state->ckey.flags & I915_SET_COLORKEY_SOURCE &&
> > >  	    intel_format_is_p01x(fb->format->format)) {
> > >  		drm_dbg_kms(&dev_priv->drm,
> > > diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
> > > index 85d6883745d8..92ad3e7d1f6f 100644
> > > --- a/drivers/gpu/drm/i915/intel_device_info.c
> > > +++ b/drivers/gpu/drm/i915/intel_device_info.c
> > > @@ -250,7 +250,11 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
> > >  	struct intel_runtime_info *runtime = RUNTIME_INFO(dev_priv);
> > >  	enum pipe pipe;
> > >  
> > > 
> > > 
> > > 
> > > -	if (INTEL_GEN(dev_priv) >= 10) {
> > > +	/* Wa_14011765242: adl-s A0 */
> > > +	if (IS_ADLS_DISP_STEPPING(dev_priv, STEP_A0, STEP_A0))
> > 
> > I think this workaround is also needed on A1 stepping now and should
> > only be removed on A2.
> 
> There is no A1 stepping for ADLS. We directly have stepping A2 after A0. But I have made the change
> that you have suggested in rev2.

In my opinion "if (IS_ADLS_DISP_STEPPING(dev_priv, STEP_A0, STEP_A0))" is the right approach here, there no stepping with display A1 so just checking
STEP_A0 will be enough.

> 
> Aditya
> 
> > 
> > 
> > Matt
> > 
> > > +		for_each_pipe(dev_priv, pipe)
> > > +			runtime->num_scalers[pipe] = 0;
> > > +	else if (INTEL_GEN(dev_priv) >= 10) {
> > >  		for_each_pipe(dev_priv, pipe)
> > >  			runtime->num_scalers[pipe] = 2;
> > >  	} else if (IS_GEN(dev_priv, 9)) {
> > > -- 
> > > 2.27.0
> > > 
> > 
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx