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From: Aditya Swarup <aditya.swarup@intel.com>
To: Matt Roper <matthew.d.roper@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>,
	intel-gfx@lists.freedesktop.org,
	Lucas De Marchi <lucas.demarchi@intel.com>
Subject: Re: [Intel-gfx] [PATCH 8/9] drm/i915/adl_s: Add display WAs for ADL-S
Date: Wed, 27 Jan 2021 21:43:28 -0800	[thread overview]
Message-ID: <7bb0e05b-20ab-9cd4-9010-6ad1b120b459@intel.com> (raw)
In-Reply-To: <20210127052207.GL787460@mdroper-desk1.amr.corp.intel.com>

On 1/26/21 9:22 PM, Matt Roper wrote:
> On Tue, Jan 26, 2021 at 08:11:58PM -0800, Aditya Swarup wrote:
>> - Extend permanent driver WA Wa_1409767108, Wa_14010685332
>>   and Wa_14011294188 to adl-s.
>> - Extend permanent driver WA Wa_1606054188 to adl-s.
>> - Add Wa_14011765242 for adl-s A0 stepping.
>>
>> Cc: Jani Nikula <jani.nikula@intel.com>
>> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> Cc: Imre Deak <imre.deak@intel.com>
>> Cc: Matt Roper <matthew.d.roper@intel.com>
>> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
>> Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
>> ---
>>  drivers/gpu/drm/i915/display/intel_display_power.c | 7 ++++---
>>  drivers/gpu/drm/i915/display/intel_sprite.c        | 4 ++--
>>  drivers/gpu/drm/i915/intel_device_info.c           | 6 +++++-
>>  3 files changed, 11 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
>> index cccfd45a67cf..e17b1ca356c3 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
>> @@ -5339,9 +5339,10 @@ static void tgl_bw_buddy_init(struct drm_i915_private *dev_priv)
>>  	unsigned long abox_mask = INTEL_INFO(dev_priv)->abox_mask;
>>  	int config, i;
>>  
>> -	if (IS_DG1_REVID(dev_priv, DG1_REVID_A0, DG1_REVID_A0) ||
>> +	if (IS_ALDERLAKE_S(dev_priv) ||
>> +	    IS_DG1_REVID(dev_priv, DG1_REVID_A0, DG1_REVID_A0) ||
>>  	    IS_TGL_DISP_STEPPING(dev_priv, STEP_A0, STEP_B0))
>> -		/* Wa_1409767108:tgl,dg1 */
>> +		/* Wa_1409767108:tgl,dg1,adl-s */
>>  		table = wa_1409767108_buddy_page_masks;
>>  	else
>>  		table = tgl_buddy_page_masks;
>> @@ -5379,7 +5380,7 @@ static void icl_display_core_init(struct drm_i915_private *dev_priv,
>>  
>>  	gen9_set_dc_state(dev_priv, DC_STATE_DISABLE);
>>  
>> -	/* Wa_14011294188:ehl,jsl,tgl,rkl */
>> +	/* Wa_14011294188:ehl,jsl,tgl,rkl,adl-s */
>>  	if (INTEL_PCH_TYPE(dev_priv) >= PCH_JSP &&
>>  	    INTEL_PCH_TYPE(dev_priv) < PCH_DG1)
>>  		intel_de_rmw(dev_priv, SOUTH_DSPCLK_GATE_D, 0,
>> diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
>> index 68cea5ca251c..a7077babd31c 100644
>> --- a/drivers/gpu/drm/i915/display/intel_sprite.c
>> +++ b/drivers/gpu/drm/i915/display/intel_sprite.c
>> @@ -2418,8 +2418,8 @@ static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state,
>>  		return -EINVAL;
>>  	}
>>  
>> -	/* Wa_1606054188:tgl */
>> -	if (IS_TIGERLAKE(dev_priv) &&
>> +	/* Wa_1606054188:tgl,adl-s */
>> +	if ((IS_ALDERLAKE_S(dev_priv) || IS_TIGERLAKE(dev_priv)) &&
>>  	    plane_state->ckey.flags & I915_SET_COLORKEY_SOURCE &&
>>  	    intel_format_is_p01x(fb->format->format)) {
>>  		drm_dbg_kms(&dev_priv->drm,
>> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
>> index 85d6883745d8..92ad3e7d1f6f 100644
>> --- a/drivers/gpu/drm/i915/intel_device_info.c
>> +++ b/drivers/gpu/drm/i915/intel_device_info.c
>> @@ -250,7 +250,11 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
>>  	struct intel_runtime_info *runtime = RUNTIME_INFO(dev_priv);
>>  	enum pipe pipe;
>>  
>> -	if (INTEL_GEN(dev_priv) >= 10) {
>> +	/* Wa_14011765242: adl-s A0 */
>> +	if (IS_ADLS_DISP_STEPPING(dev_priv, STEP_A0, STEP_A0))
> 
> I think this workaround is also needed on A1 stepping now and should
> only be removed on A2.

There is no A1 stepping for ADLS. We directly have stepping A2 after A0. But I have made the change
that you have suggested in rev2.

Aditya

> 
> 
> Matt
> 
>> +		for_each_pipe(dev_priv, pipe)
>> +			runtime->num_scalers[pipe] = 0;
>> +	else if (INTEL_GEN(dev_priv) >= 10) {
>>  		for_each_pipe(dev_priv, pipe)
>>  			runtime->num_scalers[pipe] = 2;
>>  	} else if (IS_GEN(dev_priv, 9)) {
>> -- 
>> 2.27.0
>>
> 

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  reply	other threads:[~2021-01-28  5:43 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-27  4:11 [Intel-gfx] [PATCH 0/9] Final set of patches for ADLS enabling Aditya Swarup
2021-01-27  4:11 ` [Intel-gfx] [PATCH 1/9] drm/i915/adl_s: Update PHY_MISC programming Aditya Swarup
2021-01-27  4:16   ` Aditya Swarup
2021-01-27  4:11 ` [Intel-gfx] [PATCH 2/9] drm/i915/adl_s: MCHBAR memory info registers are moved Aditya Swarup
2021-01-27 15:07   ` Lucas De Marchi
2021-01-27 16:48     ` Souza, Jose
2021-01-28  5:54       ` Aditya Swarup
2021-01-27  4:11 ` [Intel-gfx] [PATCH 3/9] drm/i915/adl_s: Add power wells Aditya Swarup
2021-01-27  4:14   ` Aditya Swarup
2021-01-27  5:32   ` Matt Roper
2021-01-27  4:11 ` [Intel-gfx] [PATCH 4/9] drm/i915/adl_s: Re-use TGL GuC/HuC firmware Aditya Swarup
2021-01-27  4:11 ` [Intel-gfx] [PATCH 5/9] drm/i915/display: Add HAS_D12_PLANE_MINIMIZATION Aditya Swarup
2021-01-27  4:11 ` [Intel-gfx] [PATCH 6/9] drm/i915/adl_s: Load DMC Aditya Swarup
2021-01-27  4:15   ` Aditya Swarup
2021-01-27 15:15   ` Lucas De Marchi
2021-01-27  4:11 ` [Intel-gfx] [PATCH 7/9] drm/i915/adl_s: Update memory bandwidth parameters Aditya Swarup
2021-01-27  5:18   ` Matt Roper
2021-01-27  4:11 ` [Intel-gfx] [PATCH 8/9] drm/i915/adl_s: Add display WAs for ADL-S Aditya Swarup
2021-01-27  5:22   ` Matt Roper
2021-01-28  5:43     ` Aditya Swarup [this message]
2021-01-29 17:26       ` Souza, Jose
2021-01-27  4:11 ` [Intel-gfx] [PATCH 9/9] drm/i915/adl_s: Add GT and CTX " Aditya Swarup
2021-01-27  5:27   ` Matt Roper
2021-01-27  4:25 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Final set of patches for ADLS enabling Patchwork
2021-01-27  4:27 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-01-27  4:55 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-01-27  9:45 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2021-01-28  5:30 [Intel-gfx] [PATCH 0/9] " Aditya Swarup
2021-01-28  5:30 ` [Intel-gfx] [PATCH 8/9] drm/i915/adl_s: Add display WAs for ADL-S Aditya Swarup
2021-01-29 17:27   ` Souza, Jose

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