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From: Jani Nikula <jani.nikula@intel.com>
To: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>,
	dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 7/8] drm/i915/dsc: Add debugfs entry to validate DSC fractional bpp
Date: Thu, 21 Sep 2023 11:00:12 +0300	[thread overview]
Message-ID: <8734z8q7lf.fsf@intel.com> (raw)
In-Reply-To: <20230913060606.1105349-8-mitulkumar.ajitkumar.golani@intel.com>

On Wed, 13 Sep 2023, Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> wrote:
> From: Swati Sharma <swati2.sharma@intel.com>
>
> DSC_Sink_BPP_Precision entry is added to i915_dsc_fec_support_show
> to depict sink's precision.
> Also, new debugfs entry is created to enforce fractional bpp.
> If Force_DSC_Fractional_BPP_en is set then while iterating over
> output bpp with fractional step size we will continue if output_bpp is
> computed as integer. With this approach, we will be able to validate
> DSC with fractional bpp.
>
> v2:
> Add drm_modeset_unlock to new line(Suraj)
>
> Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
>  .../drm/i915/display/intel_display_debugfs.c  | 83 +++++++++++++++++++
>  .../drm/i915/display/intel_display_types.h    |  1 +
>  2 files changed, 84 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> index f05b52381a83..776ab96def1f 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> @@ -1244,6 +1244,8 @@ static int i915_dsc_fec_support_show(struct seq_file *m, void *data)
>  								      DP_DSC_YCbCr420_Native)),
>  			   str_yes_no(drm_dp_dsc_sink_supports_format(intel_dp->dsc_dpcd,
>  								      DP_DSC_YCbCr444)));
> +		seq_printf(m, "DSC_Sink_BPP_Precision: %d\n",
> +			   drm_dp_dsc_sink_bpp_incr(intel_dp->dsc_dpcd));
>  		seq_printf(m, "Force_DSC_Enable: %s\n",
>  			   str_yes_no(intel_dp->force_dsc_en));
>  		if (!intel_dp_is_edp(intel_dp))
> @@ -1436,6 +1438,84 @@ static const struct file_operations i915_dsc_output_format_fops = {
>  	.write = i915_dsc_output_format_write
>  };
>  
> +static int i915_dsc_fractional_bpp_show(struct seq_file *m, void *data)
> +{
> +	struct drm_connector *connector = m->private;
> +	struct drm_device *dev = connector->dev;
> +	struct drm_crtc *crtc;
> +	struct intel_dp *intel_dp;
> +	struct intel_encoder *encoder = intel_attached_encoder(to_intel_connector(connector));
> +	int ret;
> +
> +	if (!encoder)
> +		return -ENODEV;
> +
> +	ret = drm_modeset_lock_single_interruptible(&dev->mode_config.connection_mutex);
> +	if (ret)
> +		return ret;
> +
> +	crtc = connector->state->crtc;
> +	if (connector->status != connector_status_connected || !crtc) {
> +		ret = -ENODEV;
> +		goto out;
> +	}
> +
> +	intel_dp = intel_attached_dp(to_intel_connector(connector));
> +	seq_printf(m, "Force_DSC_Fractional_BPP_Enable: %s\n",
> +		   str_yes_no(intel_dp->force_dsc_fractional_bpp_en));

Why "Force_DSC_Fractional_BPP_Enable" in the output?

Usually debugfs files, like sysfs files, for stuff like this should be
attributes, one thing per file. Why print a long name for it, if the
name of the debugfs file is the name of the attribute?

And even if you print it for humans, why the underscores?

> +
> +out:
> +	drm_modeset_unlock(&dev->mode_config.connection_mutex);
> +
> +	return ret;
> +}
> +
> +static ssize_t i915_dsc_fractional_bpp_write(struct file *file,
> +					     const char __user *ubuf,
> +					     size_t len, loff_t *offp)
> +{
> +	struct drm_connector *connector =
> +		((struct seq_file *)file->private_data)->private;

I know this is copy-pasted from elsewhere, but really it's nicer to
avoid the cast, and copy-paste from the places that get this right:

	struct seq_file *m = file->private_data;
        struct drm_connector *connector = m->private;

> +	struct intel_encoder *encoder = intel_attached_encoder(to_intel_connector(connector));
> +	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> +	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> +	bool dsc_fractional_bpp_enable = false;
> +	int ret;
> +
> +	if (len == 0)
> +		return 0;

kstrtobool_from_user() has this covered.

> +
> +	drm_dbg(&i915->drm,
> +		"Copied %zu bytes from user to force fractional bpp for DSC\n", len);

That's useless.

> +
> +	ret = kstrtobool_from_user(ubuf, len, &dsc_fractional_bpp_enable);
> +	if (ret < 0)
> +		return ret;
> +
> +	drm_dbg(&i915->drm, "Got %s for DSC Fractional BPP Enable\n",
> +		(dsc_fractional_bpp_enable) ? "true" : "false");

Is this useful?

> +	intel_dp->force_dsc_fractional_bpp_en = dsc_fractional_bpp_enable;
> +
> +	*offp += len;
> +
> +	return len;
> +}
> +
> +static int i915_dsc_fractional_bpp_open(struct inode *inode,
> +					struct file *file)
> +{
> +	return single_open(file, i915_dsc_fractional_bpp_show, inode->i_private);
> +}
> +
> +static const struct file_operations i915_dsc_fractional_bpp_fops = {
> +	.owner = THIS_MODULE,
> +	.open = i915_dsc_fractional_bpp_open,
> +	.read = seq_read,
> +	.llseek = seq_lseek,
> +	.release = single_release,
> +	.write = i915_dsc_fractional_bpp_write
> +};
> +
>  /*
>   * Returns the Current CRTC's bpc.
>   * Example usage: cat /sys/kernel/debug/dri/0/crtc-0/i915_current_bpc
> @@ -1513,6 +1593,9 @@ void intel_connector_debugfs_add(struct intel_connector *intel_connector)
>  
>  		debugfs_create_file("i915_dsc_output_format", 0644, root,
>  				    connector, &i915_dsc_output_format_fops);
> +
> +		debugfs_create_file("i915_dsc_fractional_bpp", 0644, root,
> +				    connector, &i915_dsc_fractional_bpp_fops);
>  	}
>  
>  	if (connector->connector_type == DRM_MODE_CONNECTOR_DSI ||
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 69bcabec4a29..27b31cb4c7b4 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1797,6 +1797,7 @@ struct intel_dp {
>  	/* Display stream compression testing */
>  	bool force_dsc_en;
>  	int force_dsc_output_format;
> +	bool force_dsc_fractional_bpp_en;
>  	int force_dsc_bpc;
>  
>  	bool hobl_failed;

-- 
Jani Nikula, Intel

  reply	other threads:[~2023-09-21  8:00 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-13  6:05 [Intel-gfx] [PATCH 0/8] Add DSC fractional bpp support Mitul Golani
2023-09-13  6:05 ` [Intel-gfx] [PATCH 1/8] drm/display/dp: Add helper function to get DSC bpp prescision Mitul Golani
2023-09-13  6:14   ` Kandpal, Suraj
2023-09-21  7:41   ` Jani Nikula
2023-09-22 12:05     ` Maxime Ripard
2023-09-22 14:39   ` [Intel-gfx] [1/8] " Sui Jingfeng
2023-09-13  6:06 ` [Intel-gfx] [PATCH 2/8] drm/i915/display: Store compressed bpp in U6.4 format Mitul Golani
2023-09-22 16:02   ` [Intel-gfx] [2/8] " Sui Jingfeng
2023-09-13  6:06 ` [Intel-gfx] [PATCH 3/8] drm/i915/display: Consider fractional vdsc bpp while computing m_n values Mitul Golani
2023-09-22 15:12   ` [Intel-gfx] [3/8] " Sui Jingfeng
2023-09-13  6:06 ` [Intel-gfx] [PATCH 4/8] drm/i915/audio : Consider fractional vdsc bpp while computing tu_data Mitul Golani
2023-09-13  6:06 ` [Intel-gfx] [PATCH 5/8] drm/i915/dsc/mtl: Add support for fractional bpp Mitul Golani
2023-09-13  6:06 ` [Intel-gfx] [PATCH 6/8] drm/i915/dp: Iterate over output bpp with fractional step size Mitul Golani
2023-09-13  6:06 ` [Intel-gfx] [PATCH 7/8] drm/i915/dsc: Add debugfs entry to validate DSC fractional bpp Mitul Golani
2023-09-21  8:00   ` Jani Nikula [this message]
2023-09-21 11:53     ` Sharma, Swati2
2023-09-21 12:14       ` Jani Nikula
2023-09-21 12:59         ` Sharma, Swati2
2023-09-22 12:28           ` Jani Nikula
2023-09-22 16:03   ` [Intel-gfx] [7/8] " Sui Jingfeng
2023-09-13  6:06 ` [Intel-gfx] [PATCH 8/8] drm/i915/dsc: Allow DSC only with fractional bpp when forced from debugfs Mitul Golani
2023-09-13  6:42 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add DSC fractional bpp support (rev7) Patchwork
2023-09-13  6:42 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-09-13  6:57 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-09-13  8:45 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2023-09-20  4:56 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
2023-09-22 12:45 ` [Intel-gfx] [PATCH 0/8] Add DSC fractional bpp support Imre Deak
2023-09-27 15:22   ` Imre Deak
2023-09-27 16:36     ` Sharma, Swati2
  -- strict thread matches above, loose matches on Subject: below --
2023-09-29  7:13 Mitul Golani
2023-09-29  7:13 ` [Intel-gfx] [PATCH 7/8] drm/i915/dsc: Add debugfs entry to validate DSC fractional bpp Mitul Golani
2023-09-26  8:23 [Intel-gfx] [PATCH 0/8] Add DSC fractional bpp support Mitul Golani
2023-09-26  8:23 ` [Intel-gfx] [PATCH 7/8] drm/i915/dsc: Add debugfs entry to validate DSC fractional bpp Mitul Golani
2023-09-12 16:37 [Intel-gfx] [PATCH 0/8] Add DSC fractional bpp support Mitul Golani
2023-09-12 16:37 ` [Intel-gfx] [PATCH 7/8] drm/i915/dsc: Add debugfs entry to validate DSC fractional bpp Mitul Golani
2023-09-11  5:05 [Intel-gfx] [PATCH 0/8] Add DSC fractional bpp support Mitul Golani
2023-09-11  5:05 ` [Intel-gfx] [PATCH 7/8] drm/i915/dsc: Add debugfs entry to validate DSC fractional bpp Mitul Golani
2023-09-11  9:43   ` Kandpal, Suraj

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