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From: Gustavo Sousa <gustavo.sousa@intel.com>
To: Matt Roper <matthew.d.roper@intel.com>
Cc: <intel-xe@lists.freedesktop.org>,
	<intel-gfx@lists.freedesktop.org>,
	Shekhar Chauhan <shekhar.chauhan@intel.com>
Subject: Re: [PATCH 13/16] drm/xe/nvlp: Add NVL-P platform definition
Date: Wed, 4 Feb 2026 15:36:12 -0300	[thread overview]
Message-ID: <87bji473vn.fsf@intel.com> (raw)
In-Reply-To: <20260204180807.GV458797@mdroper-desk1.amr.corp.intel.com>

Matt Roper <matthew.d.roper@intel.com> writes:

> On Wed, Feb 04, 2026 at 09:59:22AM -0300, Gustavo Sousa wrote:
>> Matt Roper <matthew.d.roper@intel.com> writes:
>> 
>> > On Mon, Feb 02, 2026 at 06:43:19PM -0300, Gustavo Sousa wrote:
>> >> From: Shekhar Chauhan <shekhar.chauhan@intel.com>
>> >> 
>> >> Add platform definition along with device IDs for NVL-P.
>> >
>> > Not sure if you wanted to add bspec references to this one like you had
>> > for the Xe3p_LPG descriptor, but the flags you have here look correct to
>> > me for now and the PCI IDs look correct so,
>> >
>> > Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
>> 
>> Thanks!
>> 
>> I'll send v2 with the list of fields and Bspec references. I'm
>> copying/pasting them here as well, just in case you can spot any errors
>> before I post v2:
>> 
>>       .dma_mask_size (Bspec 74198)
>
> This matches the way we've justified this field on past platforms,
> although we've discovered that the "physical address range" value on
> that page doesn't necessarily directly translate to the dma_mask_size we
> need to use in software; there are cases like ADL-S where it isn't an
> exact match due to other characteristics of the base platform (MKTE and
> such).  But that extra information isn't really available in the
> graphics bspec, so I don't think we have any better reference that can
> be given.
>
>>       .has_cached_pt (Bspec 71582)
>>       .has_display (Bspec 74196)
>>       .has_flat_ccs (Bspec 65255)
>
> Not sure if this is the best page for FlatCCS since it doesn't really
> indicate that a platform does/doesn't support it (e.g., the page doesn't
> drop out when the bspec is filtered to platforms like CRI that lack
> compression).
>
> A better reference might be 74110 since it has a yes/no on compression
> support by platform.

Updated. Thanks!

--
Gustavo Sousa

  reply	other threads:[~2026-02-04 18:36 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-02 21:43 [PATCH 00/16] Basic enabling patches for Xe3p_LPG and NVL-P Gustavo Sousa
2026-02-02 21:43 ` [PATCH 01/16] drm/xe/xe3p_lpg: Add support for graphics IP 35.10 Gustavo Sousa
2026-02-02 22:11   ` Matt Roper
2026-02-02 23:36     ` Matt Roper
2026-02-03 23:53       ` Gustavo Sousa
2026-02-02 21:43 ` [PATCH 02/16] drm/xe/xe3p_lpg: Add initial workarounds for graphics version 35.10 Gustavo Sousa
2026-02-02 22:47   ` Matt Roper
2026-02-04  0:25     ` Gustavo Sousa
2026-02-02 21:43 ` [PATCH 03/16] drm/xe/pat: Differentiate between primary and media for PTA Gustavo Sousa
2026-02-02 22:51   ` Matt Roper
2026-02-02 21:43 ` [PATCH 04/16] drm/xe/xe3p_lpg: Add new PAT table Gustavo Sousa
2026-02-05 17:05   ` Matt Atwood
2026-02-02 21:43 ` [PATCH 05/16] drm/xe/xe3p_lpg: Add MCR steering Gustavo Sousa
2026-02-03 10:32   ` Bhadane, Dnyaneshwar
2026-02-04  0:33     ` Gustavo Sousa
2026-02-06  8:29       ` Bhadane, Dnyaneshwar
2026-02-06 12:38         ` Gustavo Sousa
2026-02-02 21:43 ` [PATCH 06/16] drm/xe/xe3p_lpg: Add LRC parsing for additional RCS engine state Gustavo Sousa
2026-02-05 22:12   ` Matt Atwood
2026-02-02 21:43 ` [PATCH 07/16] drm/xe/xe3p_lpg: Disable reporting of context switch status to GHWSP Gustavo Sousa
2026-02-05 17:31   ` Matt Atwood
2026-02-02 21:43 ` [PATCH 08/16] drm/xe/xe3p_lpg: Drop unnecessary tuning settings Gustavo Sousa
2026-02-05 17:28   ` Matt Atwood
2026-02-02 21:43 ` [PATCH 09/16] drm/xe/xe3p_lpg: Extend 'group ID' mask size Gustavo Sousa
2026-02-04 12:18   ` Bhadane, Dnyaneshwar
2026-02-02 21:43 ` [PATCH 10/16] drm/xe/xe3p_lpg: Update LRC sizes Gustavo Sousa
2026-02-02 23:29   ` Matt Roper
2026-02-02 21:43 ` [PATCH 11/16] drm/xe/xe3p_lpg: Set STLB bank hash mode to 4KB Gustavo Sousa
2026-02-02 23:34   ` Matt Roper
2026-02-02 21:43 ` [PATCH 12/16] drm/xe/xe3p_lpg: Enable multi-queue feature Gustavo Sousa
2026-02-02 23:35   ` Matt Roper
2026-02-02 21:43 ` [PATCH 13/16] drm/xe/nvlp: Add NVL-P platform definition Gustavo Sousa
2026-02-02 23:48   ` Matt Roper
2026-02-04 12:59     ` Gustavo Sousa
2026-02-04 18:08       ` Matt Roper
2026-02-04 18:36         ` Gustavo Sousa [this message]
2026-02-02 21:43 ` [PATCH 14/16] drm/xe/nvlp: Attach MOCS table for nvlp Gustavo Sousa
2026-02-02 23:48   ` Matt Roper
2026-02-02 21:43 ` [PATCH 15/16] drm/i915/nvlp: Hook up display support Gustavo Sousa
2026-02-03  4:19   ` Kandpal, Suraj
2026-02-02 21:43 ` [PATCH 16/16] drm/xe/nvlp: Define GuC firmware for NVL-P Gustavo Sousa
2026-02-02 23:52   ` Matt Roper
2026-02-02 23:37 ` ✓ i915.CI.BAT: success for Basic enabling patches for Xe3p_LPG and NVL-P Patchwork
2026-02-03  7:48 ` ✓ i915.CI.Full: " Patchwork

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