Re: [PATCH 13/16] drm/xe/nvlp: Add NVL-P platform definition

[Gustavo Sousa <gustavo.sousa@intel.com>]

Matt Roper <matthew.d.roper@intel.com> writes:

> On Mon, Feb 02, 2026 at 06:43:19PM -0300, Gustavo Sousa wrote:
>> From: Shekhar Chauhan <shekhar.chauhan@intel.com>
>> 
>> Add platform definition along with device IDs for NVL-P.
>
> Not sure if you wanted to add bspec references to this one like you had
> for the Xe3p_LPG descriptor, but the flags you have here look correct to
> me for now and the PCI IDs look correct so,
>
> Reviewed-by: Matt Roper <matthew.d.roper@intel.com>

Thanks!

I'll send v2 with the list of fields and Bspec references. I'm
copying/pasting them here as well, just in case you can spot any errors
before I post v2:

      .dma_mask_size (Bspec 74198)
      .has_cached_pt (Bspec 71582)
      .has_display (Bspec 74196)
      .has_flat_ccs (Bspec 65255)
      .has_page_reclaim_hw_assist (Bspec 73451)
      .max_gt_per_tile (Bspec 74196)
      .va_bits (Bspec 74198)
      .vm_max_level (Bspec 59507)

--
Gustavo Sousa