From: Jani Nikula <jani.nikula@intel.com>
To: Shobhit Kumar <shobhit.kumar@intel.com>,
intel-gfx <intel-gfx@lists.freedesktop.org>
Cc: vijayakumar.balakrishnan@intel.com, yogesh.mohan.marimuthu@intel.com
Subject: Re: [PATCH v2 1/7] drm/i915: Add more dev ops for MIPI sub encoder
Date: Fri, 15 Nov 2013 10:29:03 +0200 [thread overview]
Message-ID: <87ob5mgjao.fsf@intel.com> (raw)
In-Reply-To: <1383990548-30737-2-git-send-email-shobhit.kumar@intel.com>
On Sat, 09 Nov 2013, Shobhit Kumar <shobhit.kumar@intel.com> wrote:
> Some panels require one time programming if they do not contain their
> own eeprom for basic register initialization. The sequence is
>
> Panel Reset --> Send OTP --> Enable Pixel Stream --> Enable the panel
>
> v2: Based on review comments from Jani and Ville
> - Updated the commit message with more details
> - Move the new parameters out of this patch
>
> Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohan.marimuthu@intel.com>
> Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
> ---
> drivers/gpu/drm/i915/intel_dsi.c | 9 ++++++++-
> drivers/gpu/drm/i915/intel_dsi.h | 5 +++++
> 2 files changed, 13 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
> index d257b09..61267e2 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.c
> +++ b/drivers/gpu/drm/i915/intel_dsi.c
> @@ -147,6 +147,9 @@ static void intel_dsi_enable(struct intel_encoder *encoder)
>
> DRM_DEBUG_KMS("\n");
>
> + if (intel_dsi->dev.dev_ops->panel_reset)
> + intel_dsi->dev.dev_ops->panel_reset(&intel_dsi->dev);
> +
> temp = I915_READ(MIPI_DEVICE_READY(pipe));
> if ((temp & DEVICE_READY) == 0) {
> temp &= ~ULPS_STATE_MASK;
> @@ -162,6 +165,9 @@ static void intel_dsi_enable(struct intel_encoder *encoder)
> I915_WRITE(MIPI_DEVICE_READY(pipe), temp);
> }
>
> + if (intel_dsi->dev.dev_ops->send_otp_cmds)
> + intel_dsi->dev.dev_ops->send_otp_cmds(&intel_dsi->dev);
> +
> if (is_cmd_mode(intel_dsi))
> I915_WRITE(MIPI_MAX_RETURN_PKT_SIZE(pipe), 8 * 4);
>
> @@ -176,7 +182,8 @@ static void intel_dsi_enable(struct intel_encoder *encoder)
> POSTING_READ(MIPI_PORT_CTRL(pipe));
> }
>
> - intel_dsi->dev.dev_ops->enable(&intel_dsi->dev);
> + if (intel_dsi->dev.dev_ops->enable)
> + intel_dsi->dev.dev_ops->enable(&intel_dsi->dev);
> }
>
> static void intel_dsi_disable(struct intel_encoder *encoder)
> diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
> index c7765f3..14509d6 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.h
> +++ b/drivers/gpu/drm/i915/intel_dsi.h
> @@ -39,6 +39,11 @@ struct intel_dsi_device {
> struct intel_dsi_dev_ops {
> bool (*init)(struct intel_dsi_device *dsi);
>
> + void (*panel_reset)(struct intel_dsi_device *dsi);
See comments to patch 5/7.
> +
> + /* one time programmable commands if needed */
> + void (*send_otp_cmds)(struct intel_dsi_device *dsi);
> +
> /* This callback must be able to assume DSI commands can be sent */
> void (*enable)(struct intel_dsi_device *dsi);
>
> --
> 1.7.9.5
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Jani Nikula, Intel Open Source Technology Center
next prev parent reply other threads:[~2013-11-15 8:32 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-11-09 9:49 [PATCH v2 0/7] drm/i915: Baytrail MIPI DSI support Updated Shobhit Kumar
2013-11-09 9:49 ` [PATCH v2 1/7] drm/i915: Add more dev ops for MIPI sub encoder Shobhit Kumar
2013-11-15 8:29 ` Jani Nikula [this message]
2013-11-09 9:49 ` [PATCH v2 2/7] drm/i915: Use FLISDSI interface for band gap reset Shobhit Kumar
2013-11-15 9:10 ` Jani Nikula
2013-11-09 9:49 ` [PATCH v2 3/7] drm/i915: Compute dsi_clk from pixel clock Shobhit Kumar
2013-11-15 7:22 ` Jani Nikula
2013-11-15 8:40 ` Jani Nikula
2013-11-09 9:49 ` [PATCH v2 4/7] drm/i915: Try harder to get best m, n, p values with minimal error Shobhit Kumar
2013-11-15 7:19 ` Jani Nikula
2013-11-09 9:49 ` [PATCH v2 5/7] drm/i915: Reorganize the DSI enable/disable sequence Shobhit Kumar
2013-11-15 8:27 ` Jani Nikula
2013-11-15 8:55 ` Daniel Vetter
2013-11-20 1:39 ` Shobhit Kumar
2013-12-06 11:20 ` Shobhit Kumar
2013-12-06 11:25 ` Shobhit Kumar
2013-11-09 9:49 ` [PATCH v2 6/7] drm/i915: Remove redundant DSI PLL enabling Shobhit Kumar
2013-11-15 8:41 ` Jani Nikula
2013-11-09 9:49 ` [PATCH v2 7/7] drm/i915: Parametrize the dphy and other spec specific parameters Shobhit Kumar
2013-11-15 7:52 ` Jani Nikula
2013-11-15 8:42 ` Jani Nikula
2013-11-09 10:28 ` [PATCH v2 0/7] drm/i915: Baytrail MIPI DSI support Updated Daniel Vetter
2013-11-11 8:50 ` [Intel-gfx] " Thierry Reding
2013-11-11 10:28 ` Shobhit Kumar
[not found] ` <52A7F4A0.6050902@intel.com>
[not found] ` <CAKMK7uGU=R3j1TDgLZzUKtztrY6P_akzHHeWEQy_Jw7DdQpiTg@mail.gmail.com>
[not found] ` <87r49j60ym.fsf@intel.com>
[not found] ` <52A86FF2.5050200@intel.com>
[not found] ` <CAKMK7uGA-ENZRQySGVrDkBy7dTOigkKpwpTn63rfGM+UAGvPZA@mail.gmail.com>
2013-12-11 14:25 ` Daniel Vetter
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