From: Jani Nikula <jani.nikula@linux.intel.com>
To: Manasi Navare <manasi.d.navare@intel.com>,
intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 03/11] drm/i915/display/dp: Attach and set drm connector VRR property
Date: Tue, 10 Nov 2020 12:41:07 +0200 [thread overview]
Message-ID: <87tutxsddo.fsf@intel.com> (raw)
In-Reply-To: <20201022222709.29386-4-manasi.d.navare@intel.com>
On Thu, 22 Oct 2020, Manasi Navare <manasi.d.navare@intel.com> wrote:
> From: Aditya Swarup <aditya.swarup@intel.com>
>
> This function sets the VRR property for connector based
> on the platform support, EDID monitor range and DP sink
> DPCD capability of outputing video without msa
> timing information.
>
> v7:
> * Move the helper to separate file (Manasi)
> v6:
> * Remove unset of prop
> v5:
> * Fix the vrr prop not being set in kernel (Manasi)
> * Unset the prop on connector disconnect (Manasi)
> v4:
> * Rebase (Mansi)
> v3:
> * intel_dp_is_vrr_capable can be used for debugfs, make it
> non static (Manasi)
> v2:
> * Just set this in intel_dp_get_modes instead of new hook (Jani)
>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 8 ++++++++
> drivers/gpu/drm/i915/display/intel_dp.h | 1 +
> 2 files changed, 9 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 818daab252f3..3794b8f35edc 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -62,6 +62,7 @@
> #include "intel_sideband.h"
> #include "intel_tc.h"
> #include "intel_vdsc.h"
> +#include "intel_vrr.h"
>
> #define DP_DPRX_ESI_LEN 14
>
> @@ -6622,6 +6623,10 @@ static int intel_dp_get_modes(struct drm_connector *connector)
> edid = intel_connector->detect_edid;
> if (edid) {
> int ret = intel_connector_update_modes(connector, edid);
> +
> + if (intel_is_vrr_capable(connector))
> + drm_connector_set_vrr_capable_property(connector,
> + true);
> if (ret)
> return ret;
> }
> @@ -7080,6 +7085,9 @@ intel_dp_add_properties(struct intel_dp *intel_dp, struct drm_connector *connect
> connector->state->scaling_mode = DRM_MODE_SCALE_ASPECT;
>
> }
> +
> + if (INTEL_GEN(dev_priv) >= 12)
I wonder if we should just add a wrapper
#define HAS_VRR(i915) (INTEL_GEN(i915) >= 12)
to be more descriptive. And use it in the previous patch too.
> + drm_connector_attach_vrr_capable_property(connector);
> }
>
> static void intel_dp_init_panel_power_timestamps(struct intel_dp *intel_dp)
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
> index 3f862b4fd34f..aaf0a41582d7 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> @@ -15,6 +15,7 @@ enum pipe;
> enum port;
> struct drm_connector_state;
> struct drm_encoder;
> +struct drm_connector;
Unrelated change.
> struct drm_i915_private;
> struct drm_modeset_acquire_ctx;
> struct drm_dp_vsc_sdp;
--
Jani Nikula, Intel Open Source Graphics Center
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next prev parent reply other threads:[~2020-11-10 10:41 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-22 22:26 [Intel-gfx] [PATCH 00/11] VRR/Adaptive Sync enabling in i915 Manasi Navare
2020-10-22 22:26 ` [Intel-gfx] [PATCH 01/11] drm/i915: Add REG_FIELD_PREP to VRR register def Manasi Navare
2020-11-10 10:13 ` Jani Nikula
2020-12-01 22:41 ` Navare, Manasi
2020-10-22 22:27 ` [Intel-gfx] [PATCH 02/11] drm/i915/display/vrr: Create VRR file and add VRR capability check Manasi Navare
2020-11-10 10:39 ` Jani Nikula
2020-12-01 22:21 ` Navare, Manasi
2020-12-02 22:40 ` Navare, Manasi
2020-12-03 16:35 ` Jani Nikula
2020-12-03 19:38 ` Navare, Manasi
2020-11-10 16:06 ` Ville Syrjälä
2020-11-10 18:48 ` Navare, Manasi
2020-10-22 22:27 ` [Intel-gfx] [PATCH 03/11] drm/i915/display/dp: Attach and set drm connector VRR property Manasi Navare
2020-11-10 10:41 ` Jani Nikula [this message]
2020-12-01 22:46 ` Navare, Manasi
2020-12-03 16:37 ` Jani Nikula
2020-12-03 19:37 ` Navare, Manasi
2020-10-22 22:27 ` [Intel-gfx] [PATCH 04/11] drm/i915/display/dp: Add VRR crtc state variables Manasi Navare
2020-11-10 10:41 ` Jani Nikula
2020-12-01 22:49 ` Navare, Manasi
2020-10-22 22:27 ` [Intel-gfx] [PATCH 05/11] drm/i915/display/dp: Compute VRR state in atomic_check Manasi Navare
2020-11-10 10:47 ` Jani Nikula
2020-12-01 22:52 ` Navare, Manasi
2020-12-02 22:38 ` Navare, Manasi
2020-12-03 16:39 ` Jani Nikula
2020-12-03 19:36 ` Navare, Manasi
2020-10-22 22:27 ` [Intel-gfx] [PATCH 06/11] drm/i915/display/dp: Do not enable PSR if VRR is enabled Manasi Navare
2020-10-22 22:27 ` [Intel-gfx] [PATCH 07/11] drm/i915/display/vrr: Configure and enable VRR in modeset enable Manasi Navare
2020-11-10 10:56 ` Jani Nikula
2020-12-01 22:56 ` Navare, Manasi
2020-12-03 16:40 ` Jani Nikula
2020-10-22 22:27 ` [Intel-gfx] [PATCH 08/11] drm/i915/display/vrr: Send VRR push to flip the frame Manasi Navare
2020-11-10 10:59 ` Jani Nikula
2020-12-01 22:57 ` Navare, Manasi
2020-12-03 19:58 ` Navare, Manasi
2020-10-22 22:27 ` [Intel-gfx] [PATCH 09/11] drm/i915/display/vrr: Disable VRR in modeset disable path Manasi Navare
2020-11-10 11:01 ` Jani Nikula
2020-12-01 22:34 ` Navare, Manasi
2020-10-22 22:27 ` [Intel-gfx] [PATCH 10/11] drm/i915/display/vrr: Set IGNORE_MSA_PAR state in DP Sink Manasi Navare
2020-12-01 22:59 ` Navare, Manasi
2020-12-03 16:49 ` Jani Nikula
2020-12-03 19:33 ` Navare, Manasi
2020-10-22 22:27 ` [Intel-gfx] [PATCH 11/11] drm/i915/display: Add HW state readout for VRR Manasi Navare
2020-10-23 17:42 ` [Intel-gfx] [PATCH v2 " Manasi Navare
2020-10-22 22:37 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for VRR/Adaptive Sync enabling in i915 Patchwork
2020-10-23 17:50 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for VRR/Adaptive Sync enabling in i915 (rev2) Patchwork
2020-10-23 17:51 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-10-23 18:15 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-10-23 21:28 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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