[Intel-gfx] [PATCH i-g-t 0/2] Update intel_error_decode for Gen12

[Intel-gfx] [PATCH i-g-t 0/2] Update intel_error_decode for Gen12

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The error capture decoder was reporting invalid errors in batch
buffers and getting confused about the prescence of the GuC CTB. So
fix those up.

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>


John Harrison (2):
  lib/intel_decode: Decode Gen12 ring/batch instructions correctly
  tools/intel_error_decode: Correctly name the GuC CT buffer

 lib/i915/intel_decode.c    | 15 +++++++++++++--
 tools/intel_error_decode.c |  1 +
 2 files changed, 14 insertions(+), 2 deletions(-)

-- 
2.39.1

[Intel-gfx] [PATCH i-g-t 1/2] lib/intel_decode: Decode Gen12 ring/batch instructions correctly

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Some MI_ instructions have changed (or are just new) for Gen12. So
update the decoder code to match.

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 lib/i915/intel_decode.c | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/lib/i915/intel_decode.c b/lib/i915/intel_decode.c
index 80b92d90c61c..1b6de5edafad 100644
--- a/lib/i915/intel_decode.c
+++ b/lib/i915/intel_decode.c
@@ -236,7 +236,7 @@ decode_mi(struct intel_decode *ctx)
 		{ 0x08, 0, 1, 1, "MI_ARB_ON_OFF" },
 		{ 0x0a, 0, 1, 1, "MI_BATCH_BUFFER_END" },
 		{ 0x30, 0x3f, 3, 3, "MI_BATCH_BUFFER" },
-		{ 0x31, 0x3f, 2, 2, "MI_BATCH_BUFFER_START" },
+		{ 0x31, 0x3f, 2, 3, "MI_BATCH_BUFFER_START" },
 		{ 0x14, 0x3f, 3, 3, "MI_DISPLAY_BUFFER_INFO" },
 		{ 0x04, 0, 1, 1, "MI_FLUSH" },
 		{ 0x22, 0x1f, 3, 3, "MI_LOAD_REGISTER_IMM" },
@@ -256,6 +256,7 @@ decode_mi(struct intel_decode *ctx)
 		{ 0x28, 0x3f, 3, 3, "MI_REPORT_PERF_COUNT" },
 		{ 0x29, 0xff, 3, 3, "MI_LOAD_REGISTER_MEM" },
 		{ 0x0b, 0, 1, 1, "MI_SUSPEND_FLUSH"},
+		{ 0x05, 0, 1, 1, "MI_ARB_CHECK"},
 	}, *opcode_mi = NULL;
 
 	/* check instruction length */
@@ -3623,7 +3624,17 @@ decode_3d_965(struct intel_decode *ctx)
 		return len;
 
 	case 0x7a00:
-		if (IS_GEN6(devid) || IS_GEN7(devid)) {
+		if (IS_GEN12(devid)) {
+			if (len != 6)
+				fprintf(out, "Bad count in PIPE_CONTROL\n");
+			instr_out(ctx, 0, "PIPE_CONTROL\n");
+			instr_out(ctx, 1, "flags\n");
+			instr_out(ctx, 2, "write address low\n");
+			instr_out(ctx, 3, "write address high\n");
+			instr_out(ctx, 4, "write data low\n");
+			instr_out(ctx, 5, "write data high\n");
+			return len;
+		} else if (IS_GEN6(devid) || IS_GEN7(devid)) {
 			if (len != 4 && len != 5)
 				fprintf(out, "Bad count in PIPE_CONTROL\n");
 
-- 
2.39.1

[Intel-gfx] [PATCH i-g-t 2/2] tools/intel_error_decode: Correctly name the GuC CT buffer

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The buffer decoding code doesn't cope well with unknown buffers. So
add an entry for the GuC CTB so that it gets decoded correctly.

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 tools/intel_error_decode.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tools/intel_error_decode.c b/tools/intel_error_decode.c
index 99680bedc785..451608826be3 100644
--- a/tools/intel_error_decode.c
+++ b/tools/intel_error_decode.c
@@ -617,6 +617,7 @@ read_data_file(FILE *file)
 				{ "user", "user", 0 },
 				{ "semaphores", "semaphores", 0 },
 				{ "guc log buffer", "GuC log", 0 },
+				{ "guc ct buffer", "GuC CTB", 0 },
 				{ },
 			}, *b;
 			char *new_ring_name;
-- 
2.39.1

Re: [Intel-gfx] [PATCH i-g-t 2/2] tools/intel_error_decode: Correctly name the GuC CT buffer

[Dixit, Ashutosh]

On Tue, 25 Apr 2023 13:19:26 -0700, John.C.Harrison@Intel.com wrote:
>
> From: John Harrison <John.C.Harrison@Intel.com>
>
> The buffer decoding code doesn't cope well with unknown buffers. So
> add an entry for the GuC CTB so that it gets decoded correctly.

Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>

>
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>  tools/intel_error_decode.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/tools/intel_error_decode.c b/tools/intel_error_decode.c
> index 99680bedc785..451608826be3 100644
> --- a/tools/intel_error_decode.c
> +++ b/tools/intel_error_decode.c
> @@ -617,6 +617,7 @@ read_data_file(FILE *file)
>				{ "user", "user", 0 },
>				{ "semaphores", "semaphores", 0 },
>				{ "guc log buffer", "GuC log", 0 },
> +				{ "guc ct buffer", "GuC CTB", 0 },
>				{ },
>			}, *b;
>			char *new_ring_name;
> --
> 2.39.1
>

Re: [Intel-gfx] [PATCH i-g-t 1/2] lib/intel_decode: Decode Gen12 ring/batch instructions correctly

[Dixit, Ashutosh]

On Tue, 25 Apr 2023 13:19:25 -0700, John.C.Harrison@Intel.com wrote:
>
> @@ -3623,7 +3624,17 @@ decode_3d_965(struct intel_decode *ctx)
>		return len;
>
>	case 0x7a00:
> -		if (IS_GEN6(devid) || IS_GEN7(devid)) {
> +		if (IS_GEN12(devid)) {
> +			if (len != 6)
> +				fprintf(out, "Bad count in PIPE_CONTROL\n");
> +			instr_out(ctx, 0, "PIPE_CONTROL\n");
> +			instr_out(ctx, 1, "flags\n");
> +			instr_out(ctx, 2, "write address low\n");
> +			instr_out(ctx, 3, "write address high\n");
> +			instr_out(ctx, 4, "write data low\n");
> +			instr_out(ctx, 5, "write data high\n");
> +			return len;

Is there a reference for this? I can review but have no idea what's going
on here. The rest of the patch looks good. Thanks.

> +		} else if (IS_GEN6(devid) || IS_GEN7(devid)) {
>			if (len != 4 && len != 5)
>				fprintf(out, "Bad count in PIPE_CONTROL\n");
>
> --
> 2.39.1
>

Re: [Intel-gfx] [PATCH i-g-t 1/2] lib/intel_decode: Decode Gen12 ring/batch instructions correctly

[John Harrison]

On 4/26/2023 14:51, Dixit, Ashutosh wrote:
> On Tue, 25 Apr 2023 13:19:25 -0700, John.C.Harrison@Intel.com wrote:
>> @@ -3623,7 +3624,17 @@ decode_3d_965(struct intel_decode *ctx)
>> 		return len;
>>
>> 	case 0x7a00:
>> -		if (IS_GEN6(devid) || IS_GEN7(devid)) {
>> +		if (IS_GEN12(devid)) {
>> +			if (len != 6)
>> +				fprintf(out, "Bad count in PIPE_CONTROL\n");
>> +			instr_out(ctx, 0, "PIPE_CONTROL\n");
>> +			instr_out(ctx, 1, "flags\n");
>> +			instr_out(ctx, 2, "write address low\n");
>> +			instr_out(ctx, 3, "write address high\n");
>> +			instr_out(ctx, 4, "write data low\n");
>> +			instr_out(ctx, 5, "write data high\n");
>> +			return len;
> Is there a reference for this? I can review but have no idea what's going
> on here. The rest of the patch looks good. Thanks.
Just the bspec definition of PIPE_CONTROL. On later gens it has more 
data - 64bit rather than 32bit addressing I think.

John.

>
>> +		} else if (IS_GEN6(devid) || IS_GEN7(devid)) {
>> 			if (len != 4 && len != 5)
>> 				fprintf(out, "Bad count in PIPE_CONTROL\n");
>>
>> --
>> 2.39.1
>>

Re: [Intel-gfx] [PATCH i-g-t 1/2] lib/intel_decode: Decode Gen12 ring/batch instructions correctly

[Dixit, Ashutosh]

On Mon, 01 May 2023 12:44:14 -0700, John Harrison wrote:
>
> On 4/26/2023 14:51, Dixit, Ashutosh wrote:
> > On Tue, 25 Apr 2023 13:19:25 -0700, John.C.Harrison@Intel.com wrote:
> >> @@ -3623,7 +3624,17 @@ decode_3d_965(struct intel_decode *ctx)
> >>		return len;
> >>
> >>	case 0x7a00:
> >> -		if (IS_GEN6(devid) || IS_GEN7(devid)) {
> >> +		if (IS_GEN12(devid)) {
> >> +			if (len != 6)
> >> +				fprintf(out, "Bad count in PIPE_CONTROL\n");
> >> +			instr_out(ctx, 0, "PIPE_CONTROL\n");
> >> +			instr_out(ctx, 1, "flags\n");
> >> +			instr_out(ctx, 2, "write address low\n");
> >> +			instr_out(ctx, 3, "write address high\n");
> >> +			instr_out(ctx, 4, "write data low\n");
> >> +			instr_out(ctx, 5, "write data high\n");
> >> +			return len;
> > Is there a reference for this? I can review but have no idea what's going
> > on here. The rest of the patch looks good. Thanks.
> Just the bspec definition of PIPE_CONTROL. On later gens it has more data -
> 64bit rather than 32bit addressing I think.

Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>