From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Imre Deak <imre.deak@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 03/22] drm/i915/dp: Skip computing a non-DSC link config if DSC is needed
Date: Mon, 4 Sep 2023 06:24:12 +0300 [thread overview]
Message-ID: <ZPVN3Iz7ACOt1OlA@intel.com> (raw)
In-Reply-To: <20230824080517.693621-4-imre.deak@intel.com>
On Thu, Aug 24, 2023 at 11:04:58AM +0300, Imre Deak wrote:
> Computing the non-DSC mode link config is redundant once it's determined
> that DSC will be needed, so skip computing it. In a follow-up patch this
> simplifies setting the link limits which are dependent on the DSC vs.
> non-DSC mode.
>
> While at it sanitize the debug print about the MST DSC fallback path,
> making it similar to the SST DSC one.
>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 22 ++++++++++++------
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 25 +++++++++++++++------
> 2 files changed, 33 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index cf29562795f75..c580472c06b85 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2246,7 +2246,8 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
> struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> struct link_config_limits limits;
> bool joiner_needs_dsc = false;
> - int ret;
> + bool dsc_needed;
> + int ret = 0;
>
> intel_dp_compute_config_limits(intel_dp, pipe_config,
> respect_downstream_limits, &limits);
> @@ -2262,13 +2263,20 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
> */
> joiner_needs_dsc = DISPLAY_VER(i915) < 13 && pipe_config->bigjoiner_pipes;
>
> - /*
> - * Optimize for slow and wide for everything, because there are some
> - * eDP 1.3 and 1.4 panels don't work well with fast and narrow.
> - */
> - ret = intel_dp_compute_link_config_wide(intel_dp, pipe_config, conn_state, &limits);
> + dsc_needed = joiner_needs_dsc || intel_dp->force_dsc_en;
> +
> + if (!dsc_needed) {
> + /*
> + * Optimize for slow and wide for everything, because there are some
> + * eDP 1.3 and 1.4 panels don't work well with fast and narrow.
> + */
> + ret = intel_dp_compute_link_config_wide(intel_dp, pipe_config,
> + conn_state, &limits);
> + if (ret)
> + dsc_needed = true;
> + }
>
> - if (ret || joiner_needs_dsc || intel_dp->force_dsc_en) {
> + if (dsc_needed) {
> drm_dbg_kms(&i915->drm, "Try DSC (fallback=%s, joiner=%s, force=%s)\n",
> str_yes_no(ret), str_yes_no(joiner_needs_dsc),
> str_yes_no(intel_dp->force_dsc_en));
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 6c1c996c74e62..c077b999ccb74 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -350,7 +350,8 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
> const struct drm_display_mode *adjusted_mode =
> &pipe_config->hw.adjusted_mode;
> struct link_config_limits limits;
> - int ret;
> + bool dsc_needed;
> + int ret = 0;
>
> if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
> return -EINVAL;
> @@ -365,15 +366,25 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
>
> intel_dp_mst_compute_config_limits(intel_dp, pipe_config, &limits);
>
> - ret = intel_dp_mst_compute_link_config(encoder, pipe_config,
> - conn_state, &limits);
> + dsc_needed = intel_dp->force_dsc_en;
>
> - if (ret == -EDEADLK)
> - return ret;
> + if (!dsc_needed) {
> + ret = intel_dp_mst_compute_link_config(encoder, pipe_config,
> + conn_state, &limits);
> +
> + if (ret == -EDEADLK)
> + return ret;
> +
> + if (ret)
> + dsc_needed = true;
> + }
>
> /* enable compression if the mode doesn't fit available BW */
> - drm_dbg_kms(&dev_priv->drm, "Force DSC en = %d\n", intel_dp->force_dsc_en);
> - if (ret || intel_dp->force_dsc_en) {
> + if (dsc_needed) {
> + drm_dbg_kms(&dev_priv->drm, "Try DSC (fallback=%s, force=%s)\n",
> + str_yes_no(ret),
> + str_yes_no(intel_dp->force_dsc_en));
> +
> /*
> * FIXME: As bpc is hardcoded to 8, as mentioned above,
> * WARN and ignore the debug flag force_dsc_bpc for now.
> --
> 2.37.2
--
Ville Syrjälä
Intel
next prev parent reply other threads:[~2023-09-04 3:24 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-24 8:04 [Intel-gfx] [PATCH v2 00/22] drm/i915: Improve BW management on shared display links Imre Deak
2023-08-24 8:04 ` [Intel-gfx] [PATCH v2 01/22] drm/i915/dp: Factor out helpers to compute the link limits Imre Deak
2023-09-04 3:19 ` Ville Syrjälä
2023-09-04 10:25 ` Imre Deak
2023-08-24 8:04 ` [Intel-gfx] [PATCH v2 02/22] drm/i915/dp: Track the pipe and link bpp limits separately Imre Deak
2023-09-14 9:33 ` Luca Coelho
2023-09-14 9:55 ` Imre Deak
2023-09-14 10:51 ` Luca Coelho
2023-09-14 11:08 ` Imre Deak
2023-09-14 12:08 ` Luca Coelho
2023-08-24 8:04 ` [Intel-gfx] [PATCH v2 03/22] drm/i915/dp: Skip computing a non-DSC link config if DSC is needed Imre Deak
2023-09-04 3:24 ` Ville Syrjälä [this message]
2023-08-24 8:04 ` [Intel-gfx] [PATCH v2 04/22] drm/i915/dp: Update the link bpp limits for DSC mode Imre Deak
2023-09-04 3:48 ` Ville Syrjälä
2023-09-04 11:08 ` Imre Deak
2023-09-05 5:25 ` Ville Syrjälä
2023-08-24 8:05 ` [Intel-gfx] [PATCH v2 05/22] drm/i915/dp: Limit the output link bpp in " Imre Deak
2023-08-24 8:05 ` [Intel-gfx] [PATCH v2 06/22] drm/i915: Add helper to modeset a set of pipes Imre Deak
2023-09-08 19:25 ` Ville Syrjälä
2023-09-08 20:08 ` Imre Deak
2023-08-24 8:05 ` [Intel-gfx] [PATCH v2 07/22] drm/i915: Factor out a helper to check/compute all the CRTC states Imre Deak
2023-09-08 19:31 ` Ville Syrjälä
2023-08-24 8:05 ` [Intel-gfx] [PATCH v2 08/22] drm/i915/fdi: Improve FDI BW sharing between pipe B and C Imre Deak
2023-09-11 18:59 ` Ville Syrjälä
2023-09-11 20:42 ` Imre Deak
2023-08-24 8:05 ` [Intel-gfx] [PATCH v2 09/22] drm/dp_mst: Fix fractional bpp scaling in drm_dp_calc_pbn_mode() Imre Deak
2023-08-30 21:27 ` Lyude Paul
2023-09-04 2:53 ` Ville Syrjälä
2023-09-04 10:22 ` Imre Deak
2023-09-06 10:45 ` Ville Syrjälä
2023-09-06 11:14 ` Imre Deak
2023-08-24 8:05 ` [Intel-gfx] [PATCH v2 10/22] drm/dp_mst: Add a way to calculate PBN values with FEC overhead Imre Deak
2023-08-24 8:05 ` [Intel-gfx] [PATCH v2 11/22] drm/dp_mst: Add helper to determine if an MST port is downstream of another port Imre Deak
2023-08-24 8:05 ` [Intel-gfx] [PATCH v2 12/22] drm/dp_mst: Factor out a helper to check the atomic state of a topology manager Imre Deak
2023-08-24 8:05 ` [Intel-gfx] [PATCH v2 13/22] drm/dp_mst: Swap the order of checking root vs. non-root port BW limitations Imre Deak
2023-08-24 8:05 ` [Intel-gfx] [PATCH v2 14/22] drm/i915/dp_mst: Fix PBN calculation with FEC overhead Imre Deak
2023-08-24 8:05 ` [Intel-gfx] [PATCH v2 15/22] drm/i915/dp_mst: Add atomic state for all streams on pre-tgl platforms Imre Deak
2023-08-24 8:05 ` [Intel-gfx] [PATCH v2 16/22] drm/i915/dp_mst: Program the DSC PPS SDP for each stream Imre Deak
2023-08-24 8:05 ` [Intel-gfx] [PATCH v2 17/22] drm/i915/dp: Make sure the DSC PPS SDP is disabled whenever DSC is disabled Imre Deak
2023-08-24 8:05 ` [Intel-gfx] [PATCH v2 18/22] drm/i915/dp_mst: Enable DSC decompression if any stream needs this Imre Deak
2023-08-24 9:31 ` Lisovskiy, Stanislav
2023-08-24 8:05 ` [Intel-gfx] [PATCH v2 19/22] drm/i915/dp_mst: Add missing DSC compression disabling Imre Deak
2023-08-24 9:44 ` Lisovskiy, Stanislav
2023-08-24 10:37 ` Imre Deak
2023-09-11 12:29 ` Lisovskiy, Stanislav
2023-08-24 8:05 ` [Intel-gfx] [PATCH v2 20/22] drm/i915/dp_mst: Allow DSC only for sink ports of the first branch device Imre Deak
2023-08-24 8:05 ` [Intel-gfx] [PATCH v2 21/22] drm/i915/dp_mst: Improve BW sharing between MST streams Imre Deak
2023-08-24 8:05 ` [Intel-gfx] [PATCH v2 22/22] drm/i915/dp_mst: Check BW limitations only after all streams are computed Imre Deak
2023-09-25 7:46 ` Lisovskiy, Stanislav
2023-08-24 9:54 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Improve BW management on shared display links (rev2) Patchwork
2023-08-24 9:54 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-08-24 10:07 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-08-24 17:54 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2023-09-04 7:14 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Improve BW management on shared display links (rev3) Patchwork
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