From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Imre Deak <imre.deak@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 06/22] drm/i915: Add helper to modeset a set of pipes
Date: Fri, 8 Sep 2023 22:25:59 +0300 [thread overview]
Message-ID: <ZPt1RzMEg0s-m91b@intel.com> (raw)
In-Reply-To: <20230824080517.693621-7-imre.deak@intel.com>
On Thu, Aug 24, 2023 at 11:05:01AM +0300, Imre Deak wrote:
> Add intel_modeset_pipes_in_mask() to modeset a provided set of pipes,
> used in a follow-up patch.
>
> While at it add DocBook descriptions for the exported functions.
>
> v2:
> - Add a flag controlling if active planes are force updated as well.
> - Add DockBook descriptions.
>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 43 ++++++++++++++++++--
> drivers/gpu/drm/i915/display/intel_display.h | 3 ++
> 2 files changed, 42 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index db3c26e013e3b..a1956b89fd75d 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -5420,8 +5420,24 @@ intel_verify_planes(struct intel_atomic_state *state)
> plane_state->uapi.visible);
> }
>
> -int intel_modeset_all_pipes(struct intel_atomic_state *state,
> - const char *reason)
> +/**
> + * intel_modeset_pipes_in_mask - force a full modeset on a set of pipes
> + * @state: intel atomic state
> + * @reason: the reason for the full modeset
> + * @mask: mask of pipes to modeset
> + * @update_active_planes: force updating all active planes
> + *
> + * Force a full modeset on CRTCs in @mask due to the description in @reason.
> + * Also force updating all active planes in each modeset CRTC if
> + * @update_active_planes is %true. This flag must be set to %true if the
> + * function is called after new plane states are computed already and
> + * set to %false otherwise.
> + *
> + * Returns 0 in case of success, negative error code otherwise.
> + */
> +int intel_modeset_pipes_in_mask(struct intel_atomic_state *state,
> + const char *reason, u8 mask,
> + bool update_active_planes)
Not really a fan of this parametrized behaviour. Also pretty sure we
have several other places that trigger modesets early in the atomic
check and all those just hand roll currently. So if we want a helper
then it might make more sense to try to combine all those early cases
into a new function. We could rename the current thing _late() or
something to make it clearer when it should be used.
> {
> struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> struct intel_crtc *crtc;
> @@ -5430,7 +5446,7 @@ int intel_modeset_all_pipes(struct intel_atomic_state *state,
> * Add all pipes to the state, and force
> * a modeset on all the active ones.
> */
> - for_each_intel_crtc(&dev_priv->drm, crtc) {
> + for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, crtc, mask) {
> struct intel_crtc_state *crtc_state;
> int ret;
>
> @@ -5461,7 +5477,9 @@ int intel_modeset_all_pipes(struct intel_atomic_state *state,
> if (ret)
> return ret;
>
> - crtc_state->update_planes |= crtc_state->active_planes;
> + if (update_active_planes)
> + crtc_state->update_planes |= crtc_state->active_planes;
> +
> crtc_state->async_flip_planes = 0;
> crtc_state->do_async_flip = false;
> }
> @@ -5469,6 +5487,23 @@ int intel_modeset_all_pipes(struct intel_atomic_state *state,
> return 0;
> }
>
> +/**
> + * intel_modeset_all_pipes - force a full modeset on all pipes
> + * @state: intel atomic state
> + * @reason: the reason for the full modeset
> + *
> + * Force a full modeset on all CRTCs due to the description in @reason.
> + * This function can be called only after new plane states are computed
> + * already.
> + *
> + * Returns 0 in case of success, negative error code otherwise.
> + */
> +int intel_modeset_all_pipes(struct intel_atomic_state *state,
> + const char *reason)
> +{
> + return intel_modeset_pipes_in_mask(state, reason, -1, true);
> +}
> +
> /*
> * This implements the workaround described in the "notes" section of the mode
> * set sequence documentation. When going from no pipes or single pipe to
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
> index 49ac8473b988b..d9a54610d9d5e 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -515,6 +515,9 @@ void intel_update_watermarks(struct drm_i915_private *i915);
> /* modesetting */
> int intel_modeset_all_pipes(struct intel_atomic_state *state,
> const char *reason);
> +int intel_modeset_pipes_in_mask(struct intel_atomic_state *state,
> + const char *reason, u8 pipe_mask,
> + bool update_active_planes);
> void intel_modeset_get_crtc_power_domains(struct intel_crtc_state *crtc_state,
> struct intel_power_domain_mask *old_domains);
> void intel_modeset_put_crtc_power_domains(struct intel_crtc *crtc,
> --
> 2.37.2
--
Ville Syrjälä
Intel
next prev parent reply other threads:[~2023-09-08 19:26 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-24 8:04 [Intel-gfx] [PATCH v2 00/22] drm/i915: Improve BW management on shared display links Imre Deak
2023-08-24 8:04 ` [Intel-gfx] [PATCH v2 01/22] drm/i915/dp: Factor out helpers to compute the link limits Imre Deak
2023-09-04 3:19 ` Ville Syrjälä
2023-09-04 10:25 ` Imre Deak
2023-08-24 8:04 ` [Intel-gfx] [PATCH v2 02/22] drm/i915/dp: Track the pipe and link bpp limits separately Imre Deak
2023-09-14 9:33 ` Luca Coelho
2023-09-14 9:55 ` Imre Deak
2023-09-14 10:51 ` Luca Coelho
2023-09-14 11:08 ` Imre Deak
2023-09-14 12:08 ` Luca Coelho
2023-08-24 8:04 ` [Intel-gfx] [PATCH v2 03/22] drm/i915/dp: Skip computing a non-DSC link config if DSC is needed Imre Deak
2023-09-04 3:24 ` Ville Syrjälä
2023-08-24 8:04 ` [Intel-gfx] [PATCH v2 04/22] drm/i915/dp: Update the link bpp limits for DSC mode Imre Deak
2023-09-04 3:48 ` Ville Syrjälä
2023-09-04 11:08 ` Imre Deak
2023-09-05 5:25 ` Ville Syrjälä
2023-08-24 8:05 ` [Intel-gfx] [PATCH v2 05/22] drm/i915/dp: Limit the output link bpp in " Imre Deak
2023-08-24 8:05 ` [Intel-gfx] [PATCH v2 06/22] drm/i915: Add helper to modeset a set of pipes Imre Deak
2023-09-08 19:25 ` Ville Syrjälä [this message]
2023-09-08 20:08 ` Imre Deak
2023-08-24 8:05 ` [Intel-gfx] [PATCH v2 07/22] drm/i915: Factor out a helper to check/compute all the CRTC states Imre Deak
2023-09-08 19:31 ` Ville Syrjälä
2023-08-24 8:05 ` [Intel-gfx] [PATCH v2 08/22] drm/i915/fdi: Improve FDI BW sharing between pipe B and C Imre Deak
2023-09-11 18:59 ` Ville Syrjälä
2023-09-11 20:42 ` Imre Deak
2023-08-24 8:05 ` [Intel-gfx] [PATCH v2 09/22] drm/dp_mst: Fix fractional bpp scaling in drm_dp_calc_pbn_mode() Imre Deak
2023-08-30 21:27 ` Lyude Paul
2023-09-04 2:53 ` Ville Syrjälä
2023-09-04 10:22 ` Imre Deak
2023-09-06 10:45 ` Ville Syrjälä
2023-09-06 11:14 ` Imre Deak
2023-08-24 8:05 ` [Intel-gfx] [PATCH v2 10/22] drm/dp_mst: Add a way to calculate PBN values with FEC overhead Imre Deak
2023-08-24 8:05 ` [Intel-gfx] [PATCH v2 11/22] drm/dp_mst: Add helper to determine if an MST port is downstream of another port Imre Deak
2023-08-24 8:05 ` [Intel-gfx] [PATCH v2 12/22] drm/dp_mst: Factor out a helper to check the atomic state of a topology manager Imre Deak
2023-08-24 8:05 ` [Intel-gfx] [PATCH v2 13/22] drm/dp_mst: Swap the order of checking root vs. non-root port BW limitations Imre Deak
2023-08-24 8:05 ` [Intel-gfx] [PATCH v2 14/22] drm/i915/dp_mst: Fix PBN calculation with FEC overhead Imre Deak
2023-08-24 8:05 ` [Intel-gfx] [PATCH v2 15/22] drm/i915/dp_mst: Add atomic state for all streams on pre-tgl platforms Imre Deak
2023-08-24 8:05 ` [Intel-gfx] [PATCH v2 16/22] drm/i915/dp_mst: Program the DSC PPS SDP for each stream Imre Deak
2023-08-24 8:05 ` [Intel-gfx] [PATCH v2 17/22] drm/i915/dp: Make sure the DSC PPS SDP is disabled whenever DSC is disabled Imre Deak
2023-08-24 8:05 ` [Intel-gfx] [PATCH v2 18/22] drm/i915/dp_mst: Enable DSC decompression if any stream needs this Imre Deak
2023-08-24 9:31 ` Lisovskiy, Stanislav
2023-08-24 8:05 ` [Intel-gfx] [PATCH v2 19/22] drm/i915/dp_mst: Add missing DSC compression disabling Imre Deak
2023-08-24 9:44 ` Lisovskiy, Stanislav
2023-08-24 10:37 ` Imre Deak
2023-09-11 12:29 ` Lisovskiy, Stanislav
2023-08-24 8:05 ` [Intel-gfx] [PATCH v2 20/22] drm/i915/dp_mst: Allow DSC only for sink ports of the first branch device Imre Deak
2023-08-24 8:05 ` [Intel-gfx] [PATCH v2 21/22] drm/i915/dp_mst: Improve BW sharing between MST streams Imre Deak
2023-08-24 8:05 ` [Intel-gfx] [PATCH v2 22/22] drm/i915/dp_mst: Check BW limitations only after all streams are computed Imre Deak
2023-09-25 7:46 ` Lisovskiy, Stanislav
2023-08-24 9:54 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Improve BW management on shared display links (rev2) Patchwork
2023-08-24 9:54 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-08-24 10:07 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-08-24 17:54 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2023-09-04 7:14 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Improve BW management on shared display links (rev3) Patchwork
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